[dpdk-dev] [PATCH v3 07/10] qede: Add SRIOV support

Rasesh Mody rasesh.mody at qlogic.com
Sat Mar 19 01:53:22 CET 2016


Signed-off-by: Harish Patil <harish.patil at qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody at qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko at qlogic.com>
---
 drivers/net/qede/Makefile              |    2 +
 drivers/net/qede/base/bcm_osal.c       |   57 +-
 drivers/net/qede/base/ecore.h          |    1 +
 drivers/net/qede/base/ecore_dev.c      |  116 +-
 drivers/net/qede/base/ecore_hw.c       |    9 +-
 drivers/net/qede/base/ecore_init_ops.c |    4 +
 drivers/net/qede/base/ecore_int.c      |   31 +-
 drivers/net/qede/base/ecore_iov_api.h  |  933 +++++++++
 drivers/net/qede/base/ecore_l2.c       |  233 ++-
 drivers/net/qede/base/ecore_l2.h       |   50 +
 drivers/net/qede/base/ecore_mcp.c      |   30 +
 drivers/net/qede/base/ecore_spq.c      |    8 +-
 drivers/net/qede/base/ecore_sriov.c    | 3422 ++++++++++++++++++++++++++++++++
 drivers/net/qede/base/ecore_sriov.h    |  390 ++++
 drivers/net/qede/base/ecore_vf.c       | 1322 ++++++++++++
 drivers/net/qede/base/ecore_vf.h       |  415 ++++
 drivers/net/qede/base/ecore_vf_api.h   |  186 ++
 drivers/net/qede/base/ecore_vfpf_if.h  |  590 ++++++
 drivers/net/qede/qede_ethdev.c         |   20 +-
 drivers/net/qede/qede_ethdev.h         |    4 +-
 drivers/net/qede/qede_main.c           |  151 +-
 21 files changed, 7863 insertions(+), 111 deletions(-)
 create mode 100644 drivers/net/qede/base/ecore_iov_api.h
 create mode 100644 drivers/net/qede/base/ecore_sriov.c
 create mode 100644 drivers/net/qede/base/ecore_sriov.h
 create mode 100644 drivers/net/qede/base/ecore_vf.c
 create mode 100644 drivers/net/qede/base/ecore_vf.h
 create mode 100644 drivers/net/qede/base/ecore_vf_api.h
 create mode 100644 drivers/net/qede/base/ecore_vfpf_if.h

diff --git a/drivers/net/qede/Makefile b/drivers/net/qede/Makefile
index eb08635..8970921 100644
--- a/drivers/net/qede/Makefile
+++ b/drivers/net/qede/Makefile
@@ -78,6 +78,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_init_ops.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_mcp.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_int.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/bcm_osal.c
+SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_sriov.c
+SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += base/ecore_vf.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_eth_if.c
 SRCS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede_main.c
diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index 00b27ba..e7720c0 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -14,8 +14,9 @@
 #include "bcm_osal.h"
 #include "ecore.h"
 #include "ecore_hw.h"
+#include "ecore_iov_api.h"
 
-unsigned long log2_align(unsigned long n)
+unsigned long qede_log2_align(unsigned long n)
 {
 	unsigned long ret = n ? 1 : 0;
 	unsigned long _n = n >> 1;
@@ -31,7 +32,7 @@ unsigned long log2_align(unsigned long n)
 	return ret;
 }
 
-u32 osal_log2(u32 val)
+u32 qede_osal_log2(u32 val)
 {
 	u32 log = 0;
 
@@ -41,6 +42,54 @@ u32 osal_log2(u32 val)
 	return log;
 }
 
+inline void qede_set_bit(u32 nr, unsigned long *addr)
+{
+	__sync_fetch_and_or(addr, (1UL << nr));
+}
+
+inline void qede_clr_bit(u32 nr, unsigned long *addr)
+{
+	__sync_fetch_and_and(addr, ~(1UL << nr));
+}
+
+inline bool qede_test_bit(u32 nr, unsigned long *addr)
+{
+	bool res;
+
+	rte_mb();
+	res = ((*addr) & (1UL << nr)) != 0;
+	rte_mb();
+	return res;
+}
+
+static inline u32 qede_ffz(unsigned long word)
+{
+	unsigned long first_zero;
+
+	first_zero = __builtin_ffsl(~word);
+	return first_zero ? (first_zero - 1) : OSAL_BITS_PER_UL;
+}
+
+inline u32 qede_find_first_zero_bit(unsigned long *addr, u32 limit)
+{
+	u32 i;
+	u32 nwords = 0;
+	OSAL_BUILD_BUG_ON(!limit);
+	nwords = (limit - 1) / OSAL_BITS_PER_UL + 1;
+	for (i = 0; i < nwords; i++)
+		if (~(addr[i] != 0))
+			break;
+	return (i == nwords) ? limit : i * OSAL_BITS_PER_UL + qede_ffz(addr[i]);
+}
+
+void qede_vf_fill_driver_data(struct ecore_hwfn *hwfn,
+			      __rte_unused struct vf_pf_resc_request *resc_req,
+			      struct ecore_vf_acquire_sw_info *vf_sw_info)
+{
+	vf_sw_info->os_type = VFPF_ACQUIRE_OS_LINUX_USERSPACE;
+	vf_sw_info->override_fw_version = 1;
+}
+
 void *osal_dma_alloc_coherent(struct ecore_dev *p_dev,
 			      dma_addr_t *phys, size_t size)
 {
@@ -97,8 +146,8 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *p_dev,
 	return mz->addr;
 }
 
-u32 qed_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
-		   u8 *input_buf, u32 max_size, u8 *unzip_buf)
+u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
+		    u8 *input_buf, u32 max_size, u8 *unzip_buf)
 {
 	int rc;
 
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 2cd7a94..942aaee 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -50,6 +50,7 @@ enum ecore_nvm_cmd {
 #ifndef LINUX_REMOVE
 #if !defined(CONFIG_ECORE_L2)
 #define CONFIG_ECORE_L2
+#define CONFIG_ECORE_SRIOV
 #endif
 #endif
 
diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 734d36e..f84266f 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -21,6 +21,8 @@
 #include "ecore_init_fw_funcs.h"
 #include "ecore_sp_commands.h"
 #include "ecore_dev_api.h"
+#include "ecore_sriov.h"
+#include "ecore_vf.h"
 #include "ecore_mcp.h"
 #include "ecore_hw_defs.h"
 #include "mcp_public.h"
@@ -126,6 +128,9 @@ void ecore_resc_free(struct ecore_dev *p_dev)
 {
 	int i;
 
+	if (IS_VF(p_dev))
+		return;
+
 	OSAL_FREE(p_dev, p_dev->fw_data);
 	p_dev->fw_data = OSAL_NULL;
 
@@ -149,6 +154,7 @@ void ecore_resc_free(struct ecore_dev *p_dev)
 		ecore_eq_free(p_hwfn, p_hwfn->p_eq);
 		ecore_consq_free(p_hwfn, p_hwfn->p_consq);
 		ecore_int_free(p_hwfn);
+		ecore_iov_free(p_hwfn);
 		ecore_dmae_info_free(p_hwfn);
 		/* @@@TBD Flush work-queue ? */
 	}
@@ -161,7 +167,11 @@ static enum _ecore_status_t ecore_init_qm_info(struct ecore_hwfn *p_hwfn,
 	struct ecore_qm_info *qm_info = &p_hwfn->qm_info;
 	struct init_qm_port_params *p_qm_port;
 	u16 num_pqs, multi_cos_tcs = 1;
+#ifdef CONFIG_ECORE_SRIOV
+	u16 num_vfs = p_hwfn->p_dev->sriov_info.total_vfs;
+#else
 	u16 num_vfs = 0;
+#endif
 
 	OSAL_MEM_ZERO(qm_info, sizeof(*qm_info));
 
@@ -363,6 +373,9 @@ enum _ecore_status_t ecore_resc_alloc(struct ecore_dev *p_dev)
 	struct ecore_eq *p_eq;
 	int i;
 
+	if (IS_VF(p_dev))
+		return rc;
+
 	p_dev->fw_data = OSAL_ZALLOC(p_dev, GFP_KERNEL,
 				     sizeof(struct ecore_fw_data));
 	if (!p_dev->fw_data)
@@ -440,6 +453,10 @@ enum _ecore_status_t ecore_resc_alloc(struct ecore_dev *p_dev)
 		if (rc)
 			goto alloc_err;
 
+		rc = ecore_iov_alloc(p_hwfn);
+		if (rc)
+			goto alloc_err;
+
 		/* EQ */
 		p_eq = ecore_eq_alloc(p_hwfn, 256);
 		if (!p_eq)
@@ -481,6 +498,9 @@ void ecore_resc_setup(struct ecore_dev *p_dev)
 {
 	int i;
 
+	if (IS_VF(p_dev))
+		return;
+
 	for_each_hwfn(p_dev, i) {
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
 
@@ -496,6 +516,8 @@ void ecore_resc_setup(struct ecore_dev *p_dev)
 			    p_hwfn->mcp_info->mfw_mb_length);
 
 		ecore_int_setup(p_hwfn, p_hwfn->p_main_ptt);
+
+		ecore_iov_setup(p_hwfn, p_hwfn->p_main_ptt);
 	}
 }
 
@@ -1141,23 +1163,6 @@ ecore_hw_init_pf(struct ecore_hwfn *p_hwfn,
 	/* Pure runtime initializations - directly to the HW  */
 	ecore_int_igu_init_pure_rt(p_hwfn, p_ptt, true, true);
 
-	/* PCI relaxed ordering causes a decrease in the performance on some
-	 * systems. Till a root cause is found, disable this attribute in the
-	 * PCI config space.
-	 */
-#if 0				/* @DPDK */
-	pos = OSAL_PCI_FIND_CAPABILITY(p_hwfn->p_dev, PCI_CAP_ID_EXP);
-	if (!pos) {
-		DP_NOTICE(p_hwfn, true,
-			  "Failed to find the PCI Express"
-			  " Capability structure in the PCI config space\n");
-		return ECORE_IO;
-	}
-	OSAL_PCI_READ_CONFIG_WORD(p_hwfn->p_dev, pos + PCI_EXP_DEVCTL, &ctrl);
-	ctrl &= ~PCI_EXP_DEVCTL_RELAX_EN;
-	OSAL_PCI_WRITE_CONFIG_WORD(p_hwfn->p_dev, pos + PCI_EXP_DEVCTL, ctrl);
-#endif /* @DPDK */
-
 	rc = ecore_hw_init_pf_doorbell_bar(p_hwfn, p_ptt);
 	if (rc)
 		return rc;
@@ -1248,13 +1253,22 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
 	u32 load_code, param;
 	int i, j;
 
-	rc = ecore_init_fw_data(p_dev, bin_fw_data);
-	if (rc != ECORE_SUCCESS)
-		return rc;
+	if (IS_PF(p_dev)) {
+		rc = ecore_init_fw_data(p_dev, bin_fw_data);
+		if (rc != ECORE_SUCCESS)
+			return rc;
+	}
 
 	for_each_hwfn(p_dev, i) {
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
 
+		if (IS_VF(p_dev)) {
+			rc = ecore_vf_pf_init(p_hwfn);
+			if (rc)
+				return rc;
+			continue;
+		}
+
 		/* Enable DMAE in PXP */
 		rc = ecore_change_pci_hwfn(p_hwfn, p_hwfn->p_main_ptt, true);
 
@@ -1414,6 +1428,11 @@ enum _ecore_status_t ecore_hw_stop(struct ecore_dev *p_dev)
 
 		DP_VERBOSE(p_hwfn, ECORE_MSG_IFDOWN, "Stopping hw/fw\n");
 
+		if (IS_VF(p_dev)) {
+			ecore_vf_pf_int_cleanup(p_hwfn);
+			continue;
+		}
+
 		/* mark the hw as uninitialized... */
 		p_hwfn->hw_init_done = false;
 
@@ -1452,14 +1471,16 @@ enum _ecore_status_t ecore_hw_stop(struct ecore_dev *p_dev)
 		OSAL_MSLEEP(1);
 	}
 
-	/* Disable DMAE in PXP - in CMT, this should only be done for
-	 * first hw-function, and only after all transactions have
-	 * stopped for all active hw-functions.
-	 */
-	t_rc = ecore_change_pci_hwfn(&p_dev->hwfns[0],
-				     p_dev->hwfns[0].p_main_ptt, false);
-	if (t_rc != ECORE_SUCCESS)
-		rc = t_rc;
+	if (IS_PF(p_dev)) {
+		/* Disable DMAE in PXP - in CMT, this should only be done for
+		 * first hw-function, and only after all transactions have
+		 * stopped for all active hw-functions.
+		 */
+		t_rc = ecore_change_pci_hwfn(&p_dev->hwfns[0],
+					     p_dev->hwfns[0].p_main_ptt, false);
+		if (t_rc != ECORE_SUCCESS)
+			rc = t_rc;
+	}
 
 	return rc;
 }
@@ -1472,6 +1493,11 @@ void ecore_hw_stop_fastpath(struct ecore_dev *p_dev)
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[j];
 		struct ecore_ptt *p_ptt = p_hwfn->p_main_ptt;
 
+		if (IS_VF(p_dev)) {
+			ecore_vf_pf_int_cleanup(p_hwfn);
+			continue;
+		}
+
 		DP_VERBOSE(p_hwfn, ECORE_MSG_IFDOWN,
 			   "Shutting down the fastpath\n");
 
@@ -1497,6 +1523,9 @@ void ecore_hw_start_fastpath(struct ecore_hwfn *p_hwfn)
 {
 	struct ecore_ptt *p_ptt = p_hwfn->p_main_ptt;
 
+	if (IS_VF(p_hwfn->p_dev))
+		return;
+
 	/* Re-open incoming traffic */
 	ecore_wr(p_hwfn, p_hwfn->p_main_ptt,
 		 NIG_REG_RX_LLH_BRB_GATE_DNTFWD_PERPF, 0x0);
@@ -1526,6 +1555,13 @@ enum _ecore_status_t ecore_hw_reset(struct ecore_dev *p_dev)
 	for_each_hwfn(p_dev, i) {
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
 
+		if (IS_VF(p_dev)) {
+			rc = ecore_vf_pf_reset(p_hwfn);
+			if (rc)
+				return rc;
+			continue;
+		}
+
 		DP_VERBOSE(p_hwfn, ECORE_MSG_IFDOWN, "Resetting hw/fw\n");
 
 		/* Check for incorrect states */
@@ -1655,7 +1691,11 @@ static enum _ecore_status_t ecore_hw_get_resc(struct ecore_hwfn *p_hwfn)
 
 	OSAL_MEM_ZERO(&sb_cnt_info, sizeof(sb_cnt_info));
 
+#ifdef CONFIG_ECORE_SRIOV
+	max_vf_vlan_filters = ECORE_ETH_MAX_VF_NUM_VLAN_FILTERS;
+#else
 	max_vf_vlan_filters = 0;
+#endif
 
 	ecore_int_get_num_sbs(p_hwfn, &sb_cnt_info);
 	resc_num[ECORE_SB] = OSAL_MIN_T(u32,
@@ -2018,6 +2058,10 @@ ecore_get_hw_info(struct ecore_hwfn *p_hwfn,
 {
 	enum _ecore_status_t rc;
 
+	rc = ecore_iov_hw_info(p_hwfn, p_hwfn->p_main_ptt);
+	if (rc)
+		return rc;
+
 	/* TODO In get_hw_info, amoungst others:
 	 * Get MCP FW revision and determine according to it the supported
 	 * featrues (e.g. DCB)
@@ -2175,6 +2219,9 @@ void ecore_prepare_hibernate(struct ecore_dev *p_dev)
 {
 	int j;
 
+	if (IS_VF(p_dev))
+		return;
+
 	for_each_hwfn(p_dev, j) {
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[j];
 
@@ -2274,6 +2321,9 @@ enum _ecore_status_t ecore_hw_prepare(struct ecore_dev *p_dev, int personality)
 	struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
 	enum _ecore_status_t rc;
 
+	if (IS_VF(p_dev))
+		return ecore_vf_hw_prepare(p_dev);
+
 	/* Store the precompiled init data ptrs */
 	ecore_init_iro_array(p_dev);
 
@@ -2325,6 +2375,11 @@ void ecore_hw_remove(struct ecore_dev *p_dev)
 	for_each_hwfn(p_dev, i) {
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
 
+		if (IS_VF(p_dev)) {
+			ecore_vf_pf_release(p_hwfn);
+			continue;
+		}
+
 		ecore_init_free(p_hwfn);
 		ecore_hw_hwfn_free(p_hwfn);
 		ecore_mcp_free(p_hwfn);
@@ -2952,6 +3007,11 @@ static enum _ecore_status_t ecore_set_coalesce(struct ecore_hwfn *p_hwfn,
 {
 	struct coalescing_timeset *p_coalesce_timeset;
 
+	if (IS_VF(p_hwfn->p_dev)) {
+		DP_NOTICE(p_hwfn, true, "VF coalescing config not supported\n");
+		return ECORE_INVAL;
+	}
+
 	if (p_hwfn->p_dev->int_coalescing_mode != ECORE_COAL_MODE_ENABLE) {
 		DP_NOTICE(p_hwfn, true,
 			  "Coalescing configuration not enabled\n");
diff --git a/drivers/net/qede/base/ecore_hw.c b/drivers/net/qede/base/ecore_hw.c
index 5a1d173..f21783f 100644
--- a/drivers/net/qede/base/ecore_hw.c
+++ b/drivers/net/qede/base/ecore_hw.c
@@ -13,6 +13,7 @@
 #include "ecore_hw.h"
 #include "reg_addr.h"
 #include "ecore_utils.h"
+#include "ecore_iov_api.h"
 
 #ifndef ASIC_ONLY
 #define ECORE_EMUL_FACTOR 2000
@@ -243,8 +244,12 @@ static void ecore_memcpy_hw(struct ecore_hwfn *p_hwfn,
 		quota = OSAL_MIN_T(osal_size_t, n - done,
 				   PXP_EXTERNAL_BAR_PF_WINDOW_SINGLE_SIZE);
 
-		ecore_ptt_set_win(p_hwfn, p_ptt, hw_addr + done);
-		hw_offset = ecore_ptt_get_bar_addr(p_ptt);
+		if (IS_PF(p_hwfn->p_dev)) {
+			ecore_ptt_set_win(p_hwfn, p_ptt, hw_addr + done);
+			hw_offset = ecore_ptt_get_bar_addr(p_ptt);
+		} else {
+			hw_offset = hw_addr + done;
+		}
 
 		dw_count = quota / 4;
 		host_addr = (u32 *) ((u8 *) addr + done);
diff --git a/drivers/net/qede/base/ecore_init_ops.c b/drivers/net/qede/base/ecore_init_ops.c
index eeaabb6..326eb92 100644
--- a/drivers/net/qede/base/ecore_init_ops.c
+++ b/drivers/net/qede/base/ecore_init_ops.c
@@ -16,6 +16,7 @@
 #include "ecore_init_fw_funcs.h"
 
 #include "ecore_iro_values.h"
+#include "ecore_sriov.h"
 #include "ecore_gtt_values.h"
 #include "reg_addr.h"
 #include "ecore_init_ops.h"
@@ -102,6 +103,9 @@ enum _ecore_status_t ecore_init_alloc(struct ecore_hwfn *p_hwfn)
 {
 	struct ecore_rt_data *rt_data = &p_hwfn->rt_data;
 
+	if (IS_VF(p_hwfn->p_dev))
+		return ECORE_SUCCESS;
+
 	rt_data->b_valid = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
 				       sizeof(bool) * RUNTIME_ARRAY_SIZE);
 	if (!rt_data->b_valid)
diff --git a/drivers/net/qede/base/ecore_int.c b/drivers/net/qede/base/ecore_int.c
index 91e8ad2..f1cc538 100644
--- a/drivers/net/qede/base/ecore_int.c
+++ b/drivers/net/qede/base/ecore_int.c
@@ -16,6 +16,8 @@
 #include "ecore_int.h"
 #include "reg_addr.h"
 #include "ecore_hw.h"
+#include "ecore_sriov.h"
+#include "ecore_vf.h"
 #include "ecore_hw_defs.h"
 #include "ecore_hsi_common.h"
 #include "ecore_mcp.h"
@@ -373,6 +375,9 @@ void ecore_int_cau_conf_pi(struct ecore_hwfn *p_hwfn,
 	struct cau_pi_entry pi_entry;
 	u32 sb_offset, pi_offset;
 
+	if (IS_VF(p_hwfn->p_dev))
+		return;		/* @@@TBD MichalK- VF CAU... */
+
 	sb_offset = igu_sb_id * PIS_PER_SB;
 	OSAL_MEMSET(&pi_entry, 0, sizeof(struct cau_pi_entry));
 
@@ -401,7 +406,8 @@ void ecore_int_sb_setup(struct ecore_hwfn *p_hwfn,
 	sb_info->sb_ack = 0;
 	OSAL_MEMSET(sb_info->sb_virt, 0, sizeof(*sb_info->sb_virt));
 
-	ecore_int_cau_conf_sb(p_hwfn, p_ptt, sb_info->sb_phys,
+	if (IS_PF(p_hwfn->p_dev))
+		ecore_int_cau_conf_sb(p_hwfn, p_ptt, sb_info->sb_phys,
 				      sb_info->igu_sb_id, 0, 0);
 }
 
@@ -421,8 +427,10 @@ static u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id)
 	/* Assuming continuous set of IGU SBs dedicated for given PF */
 	if (sb_id == ECORE_SP_SB_ID)
 		igu_sb_id = p_hwfn->hw_info.p_igu_info->igu_dsb_id;
-	else
+	else if (IS_PF(p_hwfn->p_dev))
 		igu_sb_id = sb_id + p_hwfn->hw_info.p_igu_info->igu_base_sb;
+	else
+		igu_sb_id = ecore_vf_get_igu_sb_id(p_hwfn, sb_id);
 
 	if (sb_id == ECORE_SP_SB_ID)
 		DP_VERBOSE(p_hwfn, ECORE_MSG_INTR,
@@ -457,9 +465,17 @@ enum _ecore_status_t ecore_int_sb_init(struct ecore_hwfn *p_hwfn,
 	/* The igu address will hold the absolute address that needs to be
 	 * written to for a specific status block
 	 */
-	sb_info->igu_addr = (u8 OSAL_IOMEM *) p_hwfn->regview +
+	if (IS_PF(p_hwfn->p_dev)) {
+		sb_info->igu_addr = (u8 OSAL_IOMEM *) p_hwfn->regview +
 		    GTT_BAR0_MAP_REG_IGU_CMD + (sb_info->igu_sb_id << 3);
 
+	} else {
+		sb_info->igu_addr =
+		    (u8 OSAL_IOMEM *) p_hwfn->regview +
+		    PXP_VF_BAR0_START_IGU +
+		    ((IGU_CMD_INT_ACK_BASE + sb_info->igu_sb_id) << 3);
+	}
+
 	sb_info->flags |= ECORE_SB_INFO_INIT;
 
 	ecore_int_sb_setup(p_hwfn, p_ptt, sb_info);
@@ -687,6 +703,9 @@ void ecore_int_igu_disable_int(struct ecore_hwfn *p_hwfn,
 {
 	p_hwfn->b_int_enabled = 0;
 
+	if (IS_VF(p_hwfn->p_dev))
+		return;
+
 	ecore_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, 0);
 }
 
@@ -853,8 +872,14 @@ enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn,
 	p_igu_info->igu_dsb_id = 0xffff;
 	p_igu_info->igu_base_sb_iov = 0xffff;
 
+#ifdef CONFIG_ECORE_SRIOV
+	min_vf = p_hwfn->hw_info.first_vf_in_pf;
+	max_vf = p_hwfn->hw_info.first_vf_in_pf +
+	    p_hwfn->p_dev->sriov_info.total_vfs;
+#else
 	min_vf = 0;
 	max_vf = 0;
+#endif
 
 	for (sb_id = 0; sb_id < ECORE_MAPPING_MEMORY_SIZE(p_hwfn->p_dev);
 	     sb_id++) {
diff --git a/drivers/net/qede/base/ecore_iov_api.h b/drivers/net/qede/base/ecore_iov_api.h
new file mode 100644
index 0000000..6e446f6
--- /dev/null
+++ b/drivers/net/qede/base/ecore_iov_api.h
@@ -0,0 +1,933 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#ifndef __ECORE_SRIOV_API_H__
+#define __ECORE_SRIOV_API_H__
+
+#include "ecore_status.h"
+
+#define ECORE_VF_ARRAY_LENGTH (3)
+
+#define IS_VF(p_dev)		((p_dev)->b_is_vf)
+#define IS_PF(p_dev)		(!((p_dev)->b_is_vf))
+#ifdef CONFIG_ECORE_SRIOV
+#define IS_PF_SRIOV(p_hwfn)	(!!((p_hwfn)->p_dev->sriov_info.total_vfs))
+#else
+#define IS_PF_SRIOV(p_hwfn)	(0)
+#endif
+#define IS_PF_SRIOV_ALLOC(p_hwfn)	(!!((p_hwfn)->pf_iov_info))
+#define IS_PF_PDA(p_hwfn)	0	/* @@TBD Michalk */
+
+/* @@@ TBD MichalK - what should this number be*/
+#define ECORE_MAX_VF_CHAINS_PER_PF 16
+
+/* vport update extended feature tlvs flags */
+enum ecore_iov_vport_update_flag {
+	ECORE_IOV_VP_UPDATE_ACTIVATE = 0,
+	ECORE_IOV_VP_UPDATE_VLAN_STRIP = 1,
+	ECORE_IOV_VP_UPDATE_TX_SWITCH = 2,
+	ECORE_IOV_VP_UPDATE_MCAST = 3,
+	ECORE_IOV_VP_UPDATE_ACCEPT_PARAM = 4,
+	ECORE_IOV_VP_UPDATE_RSS = 5,
+	ECORE_IOV_VP_UPDATE_ACCEPT_ANY_VLAN = 6,
+	ECORE_IOV_VP_UPDATE_SGE_TPA = 7,
+	ECORE_IOV_VP_UPDATE_MAX = 8,
+};
+
+struct ecore_mcp_link_params;
+struct ecore_mcp_link_state;
+struct ecore_mcp_link_capabilities;
+
+/* These defines are used by the hw-channel; should never change order */
+#define VFPF_ACQUIRE_OS_LINUX (0)
+#define VFPF_ACQUIRE_OS_WINDOWS (1)
+#define VFPF_ACQUIRE_OS_ESX (2)
+#define VFPF_ACQUIRE_OS_SOLARIS (3)
+#define VFPF_ACQUIRE_OS_LINUX_USERSPACE (4)
+
+struct ecore_vf_acquire_sw_info {
+	u32 driver_version;
+	u8 os_type;
+	bool override_fw_version;
+};
+
+struct ecore_public_vf_info {
+	/* These copies will later be reflected in the bulletin board,
+	 * but this copy should be newer.
+	 */
+	u8 forced_mac[ETH_ALEN];
+	u16 forced_vlan;
+};
+
+#ifdef CONFIG_ECORE_SW_CHANNEL
+/* This is SW channel related only... */
+enum mbx_state {
+	VF_PF_UNKNOWN_STATE = 0,
+	VF_PF_WAIT_FOR_START_REQUEST = 1,
+	VF_PF_WAIT_FOR_NEXT_CHUNK_OF_REQUEST = 2,
+	VF_PF_REQUEST_IN_PROCESSING = 3,
+	VF_PF_RESPONSE_READY = 4,
+};
+
+struct ecore_iov_sw_mbx {
+	enum mbx_state mbx_state;
+
+	u32 request_size;
+	u32 request_offset;
+
+	u32 response_size;
+	u32 response_offset;
+};
+
+/**
+ * @brief Get the vf sw mailbox params
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return struct ecore_iov_sw_mbx*
+ */
+struct ecore_iov_sw_mbx *ecore_iov_get_vf_sw_mbx(struct ecore_hwfn *p_hwfn,
+						 u16 rel_vf_id);
+#endif
+
+#ifdef CONFIG_ECORE_SRIOV
+/**
+ * @brief mark/clear all VFs before/after an incoming PCIe sriov
+ *        disable.
+ *
+ * @param p_hwfn
+ * @param to_disable
+ */
+void ecore_iov_set_vfs_to_disable(struct ecore_hwfn *p_hwfn, u8 to_disable);
+
+/**
+ * @brief mark/clear chosen VFs before/after an incoming PCIe
+ *        sriov disable.
+ *
+ * @param p_hwfn
+ * @param to_disable
+ */
+void ecore_iov_set_vf_to_disable(struct ecore_hwfn *p_hwfn,
+				 u16 rel_vf_id, u8 to_disable);
+
+/**
+ *
+ * @brief ecore_iov_init_hw_for_vf - initialize the HW for
+ *        enabling access of a VF. Also includes preparing the
+ *        IGU for VF access. This needs to be called AFTER hw is
+ *        initialized and BEFORE VF is loaded inside the VM.
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param rel_vf_id
+ * @param num_rx_queues
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_init_hw_for_vf(struct ecore_hwfn *p_hwfn,
+					      struct ecore_ptt *p_ptt,
+					      u16 rel_vf_id, u16 num_rx_queues);
+
+/**
+ * @brief ecore_iov_process_mbx_req - process a request received
+ *        from the VF
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param vfid
+ */
+void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
+			       struct ecore_ptt *p_ptt, int vfid);
+
+/**
+ * @brief ecore_iov_release_hw_for_vf - called once upper layer
+ *        knows VF is done with - can release any resources
+ *        allocated for VF at this point. this must be done once
+ *        we know VF is no longer loaded in VM.
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param rel_vf_id
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_release_hw_for_vf(struct ecore_hwfn *p_hwfn,
+						 struct ecore_ptt *p_ptt,
+						 u16 rel_vf_id);
+
+#ifndef LINUX_REMOVE
+/**
+ * @brief ecore_iov_set_vf_ctx - set a context for a given VF
+ *
+ * @param p_hwfn
+ * @param vf_id
+ * @param ctx
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_set_vf_ctx(struct ecore_hwfn *p_hwfn,
+					  u16 vf_id, void *ctx);
+#endif
+
+/**
+ * @brief FLR cleanup for all VFs
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
+					      struct ecore_ptt *p_ptt);
+
+/**
+ * @brief FLR cleanup for single VF
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param rel_vf_id
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t
+ecore_iov_single_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
+				struct ecore_ptt *p_ptt, u16 rel_vf_id);
+
+/**
+ * @brief Update the bulletin with link information. Notice this does NOT
+ *        send a bulletin update, only updates the PF's bulletin.
+ *
+ * @param p_hwfn
+ * @param p_vf
+ * @param params - the link params to use for the VF link configuration
+ * @param link - the link output to use for the VF link configuration
+ * @param p_caps - the link default capabilities.
+ */
+void ecore_iov_set_link(struct ecore_hwfn *p_hwfn,
+			u16 vfid,
+			struct ecore_mcp_link_params *params,
+			struct ecore_mcp_link_state *link,
+			struct ecore_mcp_link_capabilities *p_caps);
+
+/**
+ * @brief Returns link information as perceived by VF.
+ *
+ * @param p_hwfn
+ * @param p_vf
+ * @param p_params - the link params visible to vf.
+ * @param p_link - the link state visible to vf.
+ * @param p_caps - the link default capabilities visible to vf.
+ */
+void ecore_iov_get_link(struct ecore_hwfn *p_hwfn,
+			u16 vfid,
+			struct ecore_mcp_link_params *params,
+			struct ecore_mcp_link_state *link,
+			struct ecore_mcp_link_capabilities *p_caps);
+
+/**
+ * @brief return if the VF is pending FLR
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return bool
+ */
+bool ecore_iov_is_vf_pending_flr(struct ecore_hwfn *p_hwfn, u16 rel_vf_id);
+
+/**
+ * @brief Check if given VF ID @vfid is valid
+ *        w.r.t. @b_enabled_only value
+ *        if b_enabled_only = true - only enabled VF id is valid
+ *        else any VF id less than max_vfs is valid
+ *
+ * @param p_hwfn
+ * @param rel_vf_id - Relative VF ID
+ * @param b_enabled_only - consider only enabled VF
+ *
+ * @return bool - true for valid VF ID
+ */
+bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn,
+			     int rel_vf_id, bool b_enabled_only);
+
+/**
+ * @brief Get VF's public info structure
+ *
+ * @param p_hwfn
+ * @param vfid - Relative VF ID
+ * @param b_enabled_only - false if want to access even if vf is disabled
+ *
+ * @return struct ecore_public_vf_info *
+ */
+struct ecore_public_vf_info *ecore_iov_get_public_vf_info(struct ecore_hwfn
+							  *p_hwfn, u16 vfid,
+							  bool b_enabled_only);
+
+/**
+ * @brief Set pending events bitmap for given @vfid
+ *
+ * @param p_hwfn
+ * @param vfid
+ */
+void ecore_iov_pf_add_pending_events(struct ecore_hwfn *p_hwfn, u8 vfid);
+
+/**
+ * @brief Copy pending events bitmap in @events and clear
+ *	  original copy of events
+ *
+ * @param p_hwfn
+ */
+void ecore_iov_pf_get_and_clear_pending_events(struct ecore_hwfn *p_hwfn,
+					       u64 *events);
+
+/**
+ * @brief Copy VF's message to PF's buffer
+ *
+ * @param p_hwfn
+ * @param ptt
+ * @param vfid
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_copy_vf_msg(struct ecore_hwfn *p_hwfn,
+					   struct ecore_ptt *ptt, int vfid);
+/**
+ * @brief Set forced MAC address in PFs copy of bulletin board
+ *        and configures FW/HW to support the configuration.
+ *
+ * @param p_hwfn
+ * @param mac
+ * @param vfid
+ */
+void ecore_iov_bulletin_set_forced_mac(struct ecore_hwfn *p_hwfn,
+				       u8 *mac, int vfid);
+
+/**
+ * @brief Set MAC address in PFs copy of bulletin board without
+ *        configuring FW/HW.
+ *
+ * @param p_hwfn
+ * @param mac
+ * @param vfid
+ */
+enum _ecore_status_t ecore_iov_bulletin_set_mac(struct ecore_hwfn *p_hwfn,
+						u8 *mac, int vfid);
+
+/**
+ * @brief Set forced VLAN [pvid] in PFs copy of bulletin board
+ *        and configures FW/HW to support the configuration.
+ *        Setting of pvid 0 would clear the feature.
+ * @param p_hwfn
+ * @param pvid
+ * @param vfid
+ */
+void ecore_iov_bulletin_set_forced_vlan(struct ecore_hwfn *p_hwfn,
+					u16 pvid, int vfid);
+
+/**
+ * @brief Set default behaviour of VF in case no vlans are configured for it
+ *        whether to accept only untagged traffic or all.
+ *        Must be called prior to the VF vport-start.
+ *
+ * @param p_hwfn
+ * @param b_untagged_only
+ * @param vfid
+ *
+ * @return ECORE_SUCCESS if configuration would stick.
+ */
+enum _ecore_status_t
+ecore_iov_bulletin_set_forced_untagged_default(struct ecore_hwfn *p_hwfn,
+					       bool b_untagged_only, int vfid);
+/**
+ * @brief Get VFs opaque fid.
+ *
+ * @param p_hwfn
+ * @param vfid
+ * @param opaque_fid
+ */
+void ecore_iov_get_vfs_opaque_fid(struct ecore_hwfn *p_hwfn, int vfid,
+				  u16 *opaque_fid);
+
+/**
+ * @brief Get VFs VPORT id.
+ *
+ * @param p_hwfn
+ * @param vfid
+ * @param vport id
+ */
+void ecore_iov_get_vfs_vport_id(struct ecore_hwfn *p_hwfn, int vfid,
+				u8 *p_vport_id);
+
+/**
+ * @brief Check if VF has VPORT instance. This can be used
+ *	  to check if VPORT is active.
+ *
+ * @param p_hwfn
+ */
+bool ecore_iov_vf_has_vport_instance(struct ecore_hwfn *p_hwfn, int vfid);
+
+/**
+ * @brief PF posts the bulletin to the VF
+ *
+ * @param p_hwfn
+ * @param p_vf
+ * @param p_ptt
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_post_vf_bulletin(struct ecore_hwfn *p_hwfn,
+						int vfid,
+						struct ecore_ptt *p_ptt);
+
+/**
+ * @brief Check if given VF (@vfid) is marked as stopped
+ *
+ * @param p_hwfn
+ * @param vfid
+ *
+ * @return bool : true if stopped
+ */
+bool ecore_iov_is_vf_stopped(struct ecore_hwfn *p_hwfn, int vfid);
+
+/**
+ * @brief Configure VF anti spoofing
+ *
+ * @param p_hwfn
+ * @param vfid
+ * @param val - spoofchk value - true/false
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_spoofchk_set(struct ecore_hwfn *p_hwfn,
+					    int vfid, bool val);
+
+/**
+ * @brief Get VF's configured spoof value.
+ *
+ * @param p_hwfn
+ * @param vfid
+ *
+ * @return bool - spoofchk value - true/false
+ */
+bool ecore_iov_spoofchk_get(struct ecore_hwfn *p_hwfn, int vfid);
+
+/**
+ * @brief Check for SRIOV sanity by PF.
+ *
+ * @param p_hwfn
+ * @param vfid
+ *
+ * @return bool - true if sanity checks passes, else false
+ */
+bool ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn, int vfid);
+
+/**
+ * @brief Get the num of VF chains.
+ *
+ * @param p_hwfn
+ *
+ * @return u8
+ */
+u8 ecore_iov_vf_chains_per_pf(struct ecore_hwfn *p_hwfn);
+
+/**
+ * @brief Get vf request mailbox params
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ * @param pp_req_virt_addr
+ * @param p_req_virt_size
+ */
+void ecore_iov_get_vf_req_virt_mbx_params(struct ecore_hwfn *p_hwfn,
+					  u16 rel_vf_id,
+					  void **pp_req_virt_addr,
+					  u16 *p_req_virt_size);
+
+/**
+ * @brief Get vf mailbox params
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ * @param pp_reply_virt_addr
+ * @param p_reply_virt_size
+ */
+void ecore_iov_get_vf_reply_virt_mbx_params(struct ecore_hwfn *p_hwfn,
+					    u16 rel_vf_id,
+					    void **pp_reply_virt_addr,
+					    u16 *p_reply_virt_size);
+
+/**
+ * @brief Validate if the given length is a valid vfpf message
+ *        length
+ *
+ * @param length
+ *
+ * @return bool
+ */
+bool ecore_iov_is_valid_vfpf_msg_length(u32 length);
+
+/**
+ * @brief Return the max pfvf message length
+ *
+ * @return u32
+ */
+u32 ecore_iov_pfvf_msg_length(void);
+
+/**
+ * @brief Returns forced MAC address if one is configured
+ *
+ * @parm p_hwfn
+ * @parm rel_vf_id
+ *
+ * @return OSAL_NULL if mac isn't forced; Otherwise, returns MAC.
+ */
+u8 *ecore_iov_bulletin_get_forced_mac(struct ecore_hwfn *p_hwfn, u16 rel_vf_id);
+
+/**
+ * @brief Returns pvid if one is configured
+ *
+ * @parm p_hwfn
+ * @parm rel_vf_id
+ *
+ * @return 0 if no pvid is configured, otherwise the pvid.
+ */
+u16 ecore_iov_bulletin_get_forced_vlan(struct ecore_hwfn *p_hwfn,
+				       u16 rel_vf_id);
+/**
+ * @brief Configure VFs tx rate
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param vfid
+ * @param val - tx rate value in Mb/sec.
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_configure_tx_rate(struct ecore_hwfn *p_hwfn,
+						 struct ecore_ptt *p_ptt,
+						 int vfid, int val);
+
+/**
+ * @brief - Retrieves the statistics associated with a VF
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param vfid
+ * @param p_stats - this will be filled with the VF statistics
+ *
+ * @return ECORE_SUCCESS iff statistics were retrieved. Error otherwise.
+ */
+enum _ecore_status_t ecore_iov_get_vf_stats(struct ecore_hwfn *p_hwfn,
+					    struct ecore_ptt *p_ptt,
+					    int vfid,
+					    struct ecore_eth_stats *p_stats);
+
+/**
+ * @brief - Retrieves num of rxqs chains
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return num of rxqs chains.
+ */
+u8 ecore_iov_get_vf_num_rxqs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id);
+
+/**
+ * @brief - Retrieves num of active rxqs chains
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return
+ */
+u8 ecore_iov_get_vf_num_active_rxqs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id);
+
+/**
+ * @brief - Retrieves ctx pointer
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return
+ */
+void *ecore_iov_get_vf_ctx(struct ecore_hwfn *p_hwfn, u16 rel_vf_id);
+
+/**
+ * @brief - Retrieves VF`s num sbs
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return
+ */
+u8 ecore_iov_get_vf_num_sbs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id);
+
+/**
+ * @brief - Returm true if VF is waiting for acquire
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return
+ */
+bool ecore_iov_is_vf_wait_for_acquire(struct ecore_hwfn *p_hwfn, u16 rel_vf_id);
+
+/**
+ * @brief - Returm true if VF is acquired but not initialized
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return
+ */
+bool ecore_iov_is_vf_acquired_not_initialized(struct ecore_hwfn *p_hwfn,
+					      u16 rel_vf_id);
+
+/**
+ * @brief - Returm true if VF is acquired and initialized
+ *
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return
+ */
+bool ecore_iov_is_vf_initialized(struct ecore_hwfn *p_hwfn, u16 rel_vf_id);
+
+/**
+ * @brief - Get VF's vport min rate configured.
+ * @param p_hwfn
+ * @param rel_vf_id
+ *
+ * @return - rate in Mbps
+ */
+int ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, int vfid);
+
+/**
+ * @brief - Configure min rate for VF's vport.
+ * @param p_dev
+ * @param vfid
+ * @param - rate in Mbps
+ *
+ * @return
+ */
+enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev *p_dev,
+						     int vfid, u32 rate);
+#else
+static OSAL_INLINE void ecore_iov_set_vfs_to_disable(struct ecore_hwfn *p_hwfn,
+						     u8 to_disable)
+{
+}
+
+static OSAL_INLINE void ecore_iov_set_vf_to_disable(struct ecore_hwfn *p_hwfn,
+						    u16 rel_vf_id,
+						    u8 to_disable)
+{
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_init_hw_for_vf(struct
+								 ecore_hwfn
+								 *p_hwfn,
+								 struct
+								 ecore_ptt
+								 *p_ptt,
+								 u16 rel_vf_id,
+								 u16
+								 num_rx_queues)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
+						  struct ecore_ptt *p_ptt,
+						  int vfid)
+{
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_release_hw_for_vf(struct
+								    ecore_hwfn
+								    *p_hwfn,
+								    struct
+								    ecore_ptt
+								    *p_ptt,
+								    u16
+								    rel_vf_id)
+{
+	return ECORE_SUCCESS;
+}
+
+#ifndef LINUX_REMOVE
+static OSAL_INLINE enum _ecore_status_t ecore_iov_set_vf_ctx(struct ecore_hwfn
+							     *p_hwfn, u16 vf_id,
+							     void *ctx)
+{
+	return ECORE_INVAL;
+}
+#endif
+static OSAL_INLINE enum _ecore_status_t ecore_iov_vf_flr_cleanup(struct
+								 ecore_hwfn
+								 *p_hwfn,
+								 struct
+								 ecore_ptt
+								 *p_ptt)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_single_vf_flr_cleanup(
+	struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u16 rel_vf_id)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE void ecore_iov_set_link(struct ecore_hwfn *p_hwfn, u16 vfid,
+					   struct ecore_mcp_link_params *params,
+					   struct ecore_mcp_link_state *link,
+					   struct ecore_mcp_link_capabilities
+					   *p_caps)
+{
+}
+
+static OSAL_INLINE void ecore_iov_get_link(struct ecore_hwfn *p_hwfn, u16 vfid,
+					   struct ecore_mcp_link_params *params,
+					   struct ecore_mcp_link_state *link,
+					   struct ecore_mcp_link_capabilities
+					   *p_caps)
+{
+}
+
+static OSAL_INLINE bool ecore_iov_is_vf_pending_flr(struct ecore_hwfn *p_hwfn,
+						    u16 rel_vf_id)
+{
+	return false;
+}
+
+static OSAL_INLINE bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn,
+						int rel_vf_id,
+						bool b_enabled_only)
+{
+	return false;
+}
+
+static OSAL_INLINE struct ecore_public_vf_info *
+	ecore_iov_get_public_vf_info(struct ecore_hwfn *p_hwfn, u16 vfid,
+				  bool b_enabled_only)
+{
+	return OSAL_NULL;
+}
+
+static OSAL_INLINE void ecore_iov_pf_add_pending_events(struct ecore_hwfn
+							*p_hwfn, u8 vfid)
+{
+}
+
+static OSAL_INLINE void ecore_iov_pf_get_and_clear_pending_events(struct
+								  ecore_hwfn
+								  *p_hwfn,
+								  u64 *events)
+{
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_copy_vf_msg(struct ecore_hwfn
+							      *p_hwfn,
+							      struct ecore_ptt
+							      *ptt, int vfid)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE void ecore_iov_bulletin_set_forced_mac(struct ecore_hwfn
+							  *p_hwfn, u8 *mac,
+							  int vfid)
+{
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_bulletin_set_mac(struct
+								   ecore_hwfn
+								   *p_hwfn,
+								   u8 *mac,
+								   int vfid)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE void ecore_iov_bulletin_set_forced_vlan(struct ecore_hwfn
+							   p_hwfn, u16 pvid,
+							   int vfid)
+{
+}
+
+static OSAL_INLINE void ecore_iov_get_vfs_opaque_fid(struct ecore_hwfn *p_hwfn,
+						     int vfid, u16 *opaque_fid)
+{
+}
+
+static OSAL_INLINE void ecore_iov_get_vfs_vport_id(struct ecore_hwfn *p_hwfn,
+						   int vfid, u8 *p_vport_id)
+{
+}
+
+static OSAL_INLINE bool ecore_iov_vf_has_vport_instance(struct ecore_hwfn
+							*p_hwfn, int vfid)
+{
+	return false;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_post_vf_bulletin(struct
+								   ecore_hwfn
+								   *p_hwfn,
+								   int vfid,
+								   struct
+								   ecore_ptt
+								   *p_ptt)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE bool ecore_iov_is_vf_stopped(struct ecore_hwfn *p_hwfn,
+						int vfid)
+{
+	return false;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_spoofchk_set(struct ecore_hwfn
+							       *p_hwfn,
+							       int vfid,
+							       bool val)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE bool ecore_iov_spoofchk_get(struct ecore_hwfn *p_hwfn,
+					       int vfid)
+{
+	return false;
+}
+
+static OSAL_INLINE bool ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn,
+						  int vfid)
+{
+	return false;
+}
+
+static OSAL_INLINE u8 ecore_iov_vf_chains_per_pf(struct ecore_hwfn *p_hwfn)
+{
+	return 0;
+}
+
+static OSAL_INLINE void ecore_iov_get_vf_req_virt_mbx_params(struct ecore_hwfn
+							     *p_hwfn,
+							     u16 rel_vf_id,
+							     void
+							     **pp_req_virt_addr,
+							     u16 *
+							     p_req_virt_size)
+{
+}
+
+static OSAL_INLINE void ecore_iov_get_vf_reply_virt_mbx_params(struct ecore_hwfn
+							       *p_hwfn,
+							       u16 rel_vf_id,
+							       void
+						       **pp_reply_virt_addr,
+							       u16 *
+						       p_reply_virt_size)
+{
+}
+
+static OSAL_INLINE bool ecore_iov_is_valid_vfpf_msg_length(u32 length)
+{
+	return false;
+}
+
+static OSAL_INLINE u32 ecore_iov_pfvf_msg_length(void)
+{
+	return 0;
+}
+
+static OSAL_INLINE u8 *ecore_iov_bulletin_get_forced_mac(struct ecore_hwfn
+							 *p_hwfn, u16 rel_vf_id)
+{
+	return OSAL_NULL;
+}
+
+static OSAL_INLINE u16 ecore_iov_bulletin_get_forced_vlan(struct ecore_hwfn
+							  *p_hwfn,
+							  u16 rel_vf_id)
+{
+	return 0;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_configure_tx_rate(struct
+								    ecore_hwfn
+								    *p_hwfn,
+								    struct
+								    ecore_ptt
+								    *p_ptt,
+								    int vfid,
+								    int val)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE u8 ecore_iov_get_vf_num_rxqs(struct ecore_hwfn *p_hwfn,
+						u16 rel_vf_id)
+{
+	return 0;
+}
+
+static OSAL_INLINE u8 ecore_iov_get_vf_num_active_rxqs(struct ecore_hwfn
+						       *p_hwfn, u16 rel_vf_id)
+{
+	return 0;
+}
+
+static OSAL_INLINE void *ecore_iov_get_vf_ctx(struct ecore_hwfn *p_hwfn,
+					      u16 rel_vf_id)
+{
+	return OSAL_NULL;
+}
+
+static OSAL_INLINE u8 ecore_iov_get_vf_num_sbs(struct ecore_hwfn *p_hwfn,
+					       u16 rel_vf_id)
+{
+	return 0;
+}
+
+static OSAL_INLINE bool ecore_iov_is_vf_wait_for_acquire(struct ecore_hwfn
+							 *p_hwfn, u16 rel_vf_id)
+{
+	return false;
+}
+
+static OSAL_INLINE bool ecore_iov_is_vf_acquired_not_initialized(struct
+								 ecore_hwfn
+								 *p_hwfn,
+								 u16 rel_vf_id)
+{
+	return false;
+}
+
+static OSAL_INLINE bool ecore_iov_is_vf_initialized(struct ecore_hwfn *p_hwfn,
+						    u16 rel_vf_id)
+{
+	return false;
+}
+
+static OSAL_INLINE int ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn,
+						 int vfid)
+{
+	return 0;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_configure_min_tx_rate(
+	struct ecore_dev *p_dev, int vfid, u32 rate)
+{
+	return ECORE_INVAL;
+}
+#endif
+#endif
diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index 8d713e7..23ea426 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -22,6 +22,8 @@
 #include "reg_addr.h"
 #include "ecore_int.h"
 #include "ecore_hw.h"
+#include "ecore_vf.h"
+#include "ecore_sriov.h"
 #include "ecore_mcp.h"
 
 #define ECORE_MAX_SGES_NUM 16
@@ -106,6 +108,14 @@ enum _ecore_status_t
 ecore_sp_vport_start(struct ecore_hwfn *p_hwfn,
 		     struct ecore_sp_vport_start_params *p_params)
 {
+	if (IS_VF(p_hwfn->p_dev))
+		return ecore_vf_pf_vport_start(p_hwfn, p_params->vport_id,
+					       p_params->mtu,
+					       p_params->remove_inner_vlan,
+					       p_params->tpa_mode,
+					       p_params->max_buffers_per_cqe,
+					       p_params->only_untagged);
+
 	return ecore_sp_eth_vport_start(p_hwfn, p_params);
 }
 
@@ -339,6 +349,11 @@ ecore_sp_vport_update(struct ecore_hwfn *p_hwfn,
 	u8 abs_vport_id = 0, val;
 	u16 wordval;
 
+	if (IS_VF(p_hwfn->p_dev)) {
+		rc = ecore_vf_pf_vport_update(p_hwfn, p_params);
+		return rc;
+	}
+
 	rc = ecore_fw_vport(p_hwfn, p_params->vport_id, &abs_vport_id);
 	if (rc != ECORE_SUCCESS)
 		return rc;
@@ -428,6 +443,9 @@ enum _ecore_status_t ecore_sp_vport_stop(struct ecore_hwfn *p_hwfn,
 	enum _ecore_status_t rc;
 	u8 abs_vport_id = 0;
 
+	if (IS_VF(p_hwfn->p_dev))
+		return ecore_vf_pf_vport_stop(p_hwfn);
+
 	rc = ecore_fw_vport(p_hwfn, vport_id, &abs_vport_id);
 	if (rc != ECORE_SUCCESS)
 		return rc;
@@ -450,6 +468,19 @@ enum _ecore_status_t ecore_sp_vport_stop(struct ecore_hwfn *p_hwfn,
 	return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 }
 
+static enum _ecore_status_t
+ecore_vf_pf_accept_flags(struct ecore_hwfn *p_hwfn,
+			 struct ecore_filter_accept_flags *p_accept_flags)
+{
+	struct ecore_sp_vport_update_params s_params;
+
+	OSAL_MEMSET(&s_params, 0, sizeof(s_params));
+	OSAL_MEMCPY(&s_params.accept_flags, p_accept_flags,
+		    sizeof(struct ecore_filter_accept_flags));
+
+	return ecore_vf_pf_vport_update(p_hwfn, &s_params);
+}
+
 enum _ecore_status_t
 ecore_filter_accept_cmd(struct ecore_dev *p_dev,
 			u8 vport,
@@ -474,6 +505,13 @@ ecore_filter_accept_cmd(struct ecore_dev *p_dev,
 
 		update_params.opaque_fid = p_hwfn->hw_info.opaque_fid;
 
+		if (IS_VF(p_dev)) {
+			rc = ecore_vf_pf_accept_flags(p_hwfn, &accept_flags);
+			if (rc != ECORE_SUCCESS)
+				return rc;
+			continue;
+		}
+
 		rc = ecore_sp_vport_update(p_hwfn, &update_params,
 					   comp_mode, p_comp_data);
 		if (rc != ECORE_SUCCESS) {
@@ -593,6 +631,17 @@ enum _ecore_status_t ecore_sp_eth_rx_queue_start(struct ecore_hwfn *p_hwfn,
 	enum _ecore_status_t rc;
 	u64 init_prod_val = 0;
 
+	if (IS_VF(p_hwfn->p_dev)) {
+		return ecore_vf_pf_rxq_start(p_hwfn,
+					     rx_queue_id,
+					     sb,
+					     sb_index,
+					     bd_max_bytes,
+					     bd_chain_phys_addr,
+					     cqe_pbl_addr,
+					     cqe_pbl_size, pp_prod);
+	}
+
 	rc = ecore_fw_l2_queue(p_hwfn, rx_queue_id, &abs_l2_queue);
 	if (rc != ECORE_SUCCESS)
 		return rc;
@@ -651,6 +700,13 @@ ecore_sp_eth_rx_queues_update(struct ecore_hwfn *p_hwfn,
 	u16 qid, abs_rx_q_id = 0;
 	u8 i;
 
+	if (IS_VF(p_hwfn->p_dev))
+		return ecore_vf_pf_rxqs_update(p_hwfn,
+					       rx_queue_id,
+					       num_rxqs,
+					       complete_cqe_flg,
+					       complete_event_flg);
+
 	OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 	init_data.comp_mode = comp_mode;
 	init_data.p_comp_data = p_comp_data;
@@ -697,6 +753,10 @@ ecore_sp_eth_rx_queue_stop(struct ecore_hwfn *p_hwfn,
 	struct ecore_sp_init_data init_data;
 	u16 abs_rx_q_id = 0;
 
+	if (IS_VF(p_hwfn->p_dev))
+		return ecore_vf_pf_rxq_stop(p_hwfn, rx_queue_id,
+					    cqe_completion);
+
 	/* Get SPQ entry */
 	OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 	init_data.cid = p_rx_cid->cid;
@@ -814,6 +874,14 @@ enum _ecore_status_t ecore_sp_eth_tx_queue_start(struct ecore_hwfn *p_hwfn,
 	enum _ecore_status_t rc;
 	u8 abs_stats_id = 0;
 
+	if (IS_VF(p_hwfn->p_dev)) {
+		return ecore_vf_pf_txq_start(p_hwfn,
+					     tx_queue_id,
+					     sb,
+					     sb_index,
+					     pbl_addr, pbl_size, pp_doorbell);
+	}
+
 	rc = ecore_fw_vport(p_hwfn, stats_id, &abs_stats_id);
 	if (rc != ECORE_SUCCESS)
 		return rc;
@@ -867,6 +935,9 @@ enum _ecore_status_t ecore_sp_eth_tx_queue_stop(struct ecore_hwfn *p_hwfn,
 	enum _ecore_status_t rc = ECORE_NOTIMPL;
 	struct ecore_sp_init_data init_data;
 
+	if (IS_VF(p_hwfn->p_dev))
+		return ecore_vf_pf_txq_stop(p_hwfn, tx_queue_id);
+
 	/* Get SPQ entry */
 	OSAL_MEMSET(&init_data, 0, sizeof(init_data));
 	init_data.cid = p_tx_cid->cid;
@@ -1274,6 +1345,11 @@ ecore_filter_mcast_cmd(struct ecore_dev *p_dev,
 	for_each_hwfn(p_dev, i) {
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
 
+		if (IS_VF(p_dev)) {
+			ecore_vf_pf_filter_mcast(p_hwfn, p_filter_cmd);
+			continue;
+		}
+
 		rc = ecore_sp_eth_filter_mcast(p_hwfn,
 					       p_hwfn->hw_info.opaque_fid,
 					       p_filter_cmd,
@@ -1297,6 +1373,11 @@ ecore_filter_ucast_cmd(struct ecore_dev *p_dev,
 	for_each_hwfn(p_dev, i) {
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
 
+		if (IS_VF(p_dev)) {
+			rc = ecore_vf_pf_filter_ucast(p_hwfn, p_filter_cmd);
+			continue;
+		}
+
 		rc = ecore_sp_eth_filter_ucast(p_hwfn,
 					       p_hwfn->hw_info.opaque_fid,
 					       p_filter_cmd,
@@ -1308,14 +1389,96 @@ ecore_filter_ucast_cmd(struct ecore_dev *p_dev,
 	return rc;
 }
 
+/* IOV related */
+enum _ecore_status_t ecore_sp_vf_start(struct ecore_hwfn *p_hwfn,
+				       u32 concrete_vfid, u16 opaque_vfid)
+{
+	struct vf_start_ramrod_data *p_ramrod = OSAL_NULL;
+	struct ecore_spq_entry *p_ent = OSAL_NULL;
+	enum _ecore_status_t rc = ECORE_NOTIMPL;
+	struct ecore_sp_init_data init_data;
+
+	/* Get SPQ entry */
+	OSAL_MEMSET(&init_data, 0, sizeof(init_data));
+	init_data.cid = ecore_spq_get_cid(p_hwfn);
+	init_data.opaque_fid = opaque_vfid;
+	init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
+
+	rc = ecore_sp_init_request(p_hwfn, &p_ent,
+				   COMMON_RAMROD_VF_START,
+				   PROTOCOLID_COMMON, &init_data);
+	if (rc != ECORE_SUCCESS)
+		return rc;
+
+	p_ramrod = &p_ent->ramrod.vf_start;
+
+	p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
+	p_ramrod->opaque_fid = OSAL_CPU_TO_LE16(opaque_vfid);
+
+	switch (p_hwfn->hw_info.personality) {
+	case ECORE_PCI_ETH:
+		p_ramrod->personality = PERSONALITY_ETH;
+		break;
+	case ECORE_PCI_ETH_ROCE:
+		p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
+		break;
+	default:
+		DP_NOTICE(p_hwfn, true, "Unkown VF personality %d\n",
+			  p_hwfn->hw_info.personality);
+		return ECORE_INVAL;
+	}
+
+	return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
+}
+
+enum _ecore_status_t ecore_sp_vf_update(struct ecore_hwfn *p_hwfn)
+{
+	return ECORE_NOTIMPL;
+}
+
+enum _ecore_status_t ecore_sp_vf_stop(struct ecore_hwfn *p_hwfn,
+				      u32 concrete_vfid, u16 opaque_vfid)
+{
+	enum _ecore_status_t rc = ECORE_NOTIMPL;
+	struct vf_stop_ramrod_data *p_ramrod = OSAL_NULL;
+	struct ecore_spq_entry *p_ent = OSAL_NULL;
+	struct ecore_sp_init_data init_data;
+
+	/* Get SPQ entry */
+	OSAL_MEMSET(&init_data, 0, sizeof(init_data));
+	init_data.cid = ecore_spq_get_cid(p_hwfn);
+	init_data.opaque_fid = opaque_vfid;
+	init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
+
+	rc = ecore_sp_init_request(p_hwfn, &p_ent,
+				   COMMON_RAMROD_VF_STOP,
+				   PROTOCOLID_COMMON, &init_data);
+	if (rc != ECORE_SUCCESS)
+		return rc;
+
+	p_ramrod = &p_ent->ramrod.vf_stop;
+
+	p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
+
+	return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
+}
+
 /* Statistics related code */
 static void __ecore_get_vport_pstats_addrlen(struct ecore_hwfn *p_hwfn,
 					     u32 *p_addr, u32 *p_len,
 					     u16 statistics_bin)
 {
-	*p_addr = BAR0_MAP_REG_PSDM_RAM +
+	if (IS_PF(p_hwfn->p_dev)) {
+		*p_addr = BAR0_MAP_REG_PSDM_RAM +
 		    PSTORM_QUEUE_STAT_OFFSET(statistics_bin);
-	*p_len = sizeof(struct eth_pstorm_per_queue_stat);
+		*p_len = sizeof(struct eth_pstorm_per_queue_stat);
+	} else {
+		struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+		struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
+
+		*p_addr = p_resp->pfdev_info.stats_info.pstats.address;
+		*p_len = p_resp->pfdev_info.stats_info.pstats.len;
+	}
 }
 
 static void __ecore_get_vport_pstats(struct ecore_hwfn *p_hwfn,
@@ -1349,9 +1512,17 @@ static void __ecore_get_vport_tstats(struct ecore_hwfn *p_hwfn,
 	struct tstorm_per_port_stat tstats;
 	u32 tstats_addr, tstats_len;
 
-	tstats_addr = BAR0_MAP_REG_TSDM_RAM +
+	if (IS_PF(p_hwfn->p_dev)) {
+		tstats_addr = BAR0_MAP_REG_TSDM_RAM +
 		    TSTORM_PORT_STAT_OFFSET(MFW_PORT(p_hwfn));
-	tstats_len = sizeof(struct tstorm_per_port_stat);
+		tstats_len = sizeof(struct tstorm_per_port_stat);
+	} else {
+		struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+		struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
+
+		tstats_addr = p_resp->pfdev_info.stats_info.tstats.address;
+		tstats_len = p_resp->pfdev_info.stats_info.tstats.len;
+	}
 
 	OSAL_MEMSET(&tstats, 0, sizeof(tstats));
 	ecore_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, tstats_len);
@@ -1366,9 +1537,17 @@ static void __ecore_get_vport_ustats_addrlen(struct ecore_hwfn *p_hwfn,
 					     u32 *p_addr, u32 *p_len,
 					     u16 statistics_bin)
 {
-	*p_addr = BAR0_MAP_REG_USDM_RAM +
+	if (IS_PF(p_hwfn->p_dev)) {
+		*p_addr = BAR0_MAP_REG_USDM_RAM +
 		    USTORM_QUEUE_STAT_OFFSET(statistics_bin);
-	*p_len = sizeof(struct eth_ustorm_per_queue_stat);
+		*p_len = sizeof(struct eth_ustorm_per_queue_stat);
+	} else {
+		struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+		struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
+
+		*p_addr = p_resp->pfdev_info.stats_info.ustats.address;
+		*p_len = p_resp->pfdev_info.stats_info.ustats.len;
+	}
 }
 
 static void __ecore_get_vport_ustats(struct ecore_hwfn *p_hwfn,
@@ -1397,9 +1576,17 @@ static void __ecore_get_vport_mstats_addrlen(struct ecore_hwfn *p_hwfn,
 					     u32 *p_addr, u32 *p_len,
 					     u16 statistics_bin)
 {
-	*p_addr = BAR0_MAP_REG_MSDM_RAM +
+	if (IS_PF(p_hwfn->p_dev)) {
+		*p_addr = BAR0_MAP_REG_MSDM_RAM +
 		    MSTORM_QUEUE_STAT_OFFSET(statistics_bin);
-	*p_len = sizeof(struct eth_mstorm_per_queue_stat);
+		*p_len = sizeof(struct eth_mstorm_per_queue_stat);
+	} else {
+		struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+		struct pfvf_acquire_resp_tlv *p_resp = &p_iov->acquire_resp;
+
+		*p_addr = p_resp->pfdev_info.stats_info.mstats.address;
+		*p_len = p_resp->pfdev_info.stats_info.mstats.len;
+	}
 }
 
 static void __ecore_get_vport_mstats(struct ecore_hwfn *p_hwfn,
@@ -1524,24 +1711,28 @@ static void _ecore_get_vport_stats(struct ecore_dev *p_dev,
 
 	for_each_hwfn(p_dev, i) {
 		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
-		struct ecore_ptt *p_ptt = ecore_ptt_acquire(p_hwfn);
-
-		/* The main vport index is relative first */
-		if (ecore_fw_vport(p_hwfn, 0, &fw_vport)) {
-			DP_ERR(p_hwfn, "No vport available!\n");
-			goto out;
+		struct ecore_ptt *p_ptt = IS_PF(p_dev) ?
+		    ecore_ptt_acquire(p_hwfn) : OSAL_NULL;
+
+		if (IS_PF(p_dev)) {
+			/* The main vport index is relative first */
+			if (ecore_fw_vport(p_hwfn, 0, &fw_vport)) {
+				DP_ERR(p_hwfn, "No vport available!\n");
+				goto out;
+			}
 		}
 
-		if (!p_ptt) {
+		if (IS_PF(p_dev) && !p_ptt) {
 			DP_ERR(p_hwfn, "Failed to acquire ptt\n");
 			continue;
 		}
 
 		__ecore_get_vport_stats(p_hwfn, p_ptt, stats, fw_vport,
-					true);
+					IS_PF(p_dev) ? true : false);
 
 out:
-		ecore_ptt_release(p_hwfn, p_ptt);
+		if (IS_PF(p_dev))
+			ecore_ptt_release(p_hwfn, p_ptt);
 	}
 }
 
@@ -1575,10 +1766,11 @@ void ecore_reset_vport_stats(struct ecore_dev *p_dev)
 		struct eth_mstorm_per_queue_stat mstats;
 		struct eth_ustorm_per_queue_stat ustats;
 		struct eth_pstorm_per_queue_stat pstats;
-		struct ecore_ptt *p_ptt = ecore_ptt_acquire(p_hwfn);
+		struct ecore_ptt *p_ptt = IS_PF(p_dev) ?
+		    ecore_ptt_acquire(p_hwfn) : OSAL_NULL;
 		u32 addr = 0, len = 0;
 
-		if (!p_ptt) {
+		if (IS_PF(p_dev) && !p_ptt) {
 			DP_ERR(p_hwfn, "Failed to acquire ptt\n");
 			continue;
 		}
@@ -1595,7 +1787,8 @@ void ecore_reset_vport_stats(struct ecore_dev *p_dev)
 		__ecore_get_vport_pstats_addrlen(p_hwfn, &addr, &len, 0);
 		ecore_memcpy_to(p_hwfn, p_ptt, addr, &pstats, len);
 
-		ecore_ptt_release(p_hwfn, p_ptt);
+		if (IS_PF(p_dev))
+			ecore_ptt_release(p_hwfn, p_ptt);
 	}
 
 	/* PORT statistics are not necessarily reset, so we need to
diff --git a/drivers/net/qede/base/ecore_l2.h b/drivers/net/qede/base/ecore_l2.h
index 658af45..b0850ca 100644
--- a/drivers/net/qede/base/ecore_l2.h
+++ b/drivers/net/qede/base/ecore_l2.h
@@ -15,6 +15,56 @@
 #include "ecore_l2_api.h"
 
 /**
+ * @brief ecore_sp_vf_start -  VF Function Start
+ *
+ * This ramrod is sent to initialize a virtual function (VF) is loaded.
+ * It will configure the function related parameters.
+ *
+ * @note Final phase API.
+ *
+ * @param p_hwfn
+ * @param concrete_vfid				VF ID
+ * @param opaque_vfid
+ *
+ * @return enum _ecore_status_t
+ */
+
+enum _ecore_status_t ecore_sp_vf_start(struct ecore_hwfn *p_hwfn,
+				       u32 concrete_vfid, u16 opaque_vfid);
+
+/**
+ * @brief ecore_sp_vf_update - VF Function Update Ramrod
+ *
+ * This ramrod performs updates of a virtual function (VF).
+ * It currently contains no functionality.
+ *
+ * @note Final phase API.
+ *
+ * @param p_hwfn
+ *
+ * @return enum _ecore_status_t
+ */
+
+enum _ecore_status_t ecore_sp_vf_update(struct ecore_hwfn *p_hwfn);
+
+/**
+ * @brief ecore_sp_vf_stop - VF Function Stop Ramrod
+ *
+ * This ramrod is sent to unload a virtual function (VF).
+ *
+ * @note Final phase API.
+ *
+ * @param p_hwfn
+ * @param concrete_vfid
+ * @param opaque_vfid
+ *
+ * @return enum _ecore_status_t
+ */
+
+enum _ecore_status_t ecore_sp_vf_stop(struct ecore_hwfn *p_hwfn,
+				      u32 concrete_vfid, u16 opaque_vfid);
+
+/**
  * @brief ecore_sp_eth_tx_queue_update -
  *
  * This ramrod updates a TX queue. It is used for setting the active
diff --git a/drivers/net/qede/base/ecore_mcp.c b/drivers/net/qede/base/ecore_mcp.c
index e51de24..7dff695 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -14,6 +14,8 @@
 #include "reg_addr.h"
 #include "ecore_hw.h"
 #include "ecore_init_fw_funcs.h"
+#include "ecore_sriov.h"
+#include "ecore_iov_api.h"
 #include "ecore_gtt_reg_addr.h"
 #include "ecore_iro.h"
 
@@ -517,6 +519,9 @@ static void ecore_mcp_handle_vf_flr(struct ecore_hwfn *p_hwfn,
 			   "FLR-ed VFs [%08x,...,%08x] - %08x\n",
 			   i * 32, (i + 1) * 32 - 1, disabled_vfs[i]);
 	}
+
+	if (ecore_iov_mark_vf_flr(p_hwfn, disabled_vfs))
+		OSAL_VF_FLR_UPDATE(p_hwfn);
 }
 
 enum _ecore_status_t ecore_mcp_ack_vf_flr(struct ecore_hwfn *p_hwfn,
@@ -793,6 +798,10 @@ u32 ecore_get_process_kill_counter(struct ecore_hwfn *p_hwfn,
 {
 	u32 path_offsize_addr, path_offsize, path_addr, proc_kill_cnt;
 
+	/* TODO - Add support for VFs */
+	if (IS_VF(p_hwfn->p_dev))
+		return ECORE_INVAL;
+
 	path_offsize_addr = SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->public_base,
 						 PUBLIC_PATH);
 	path_offsize = ecore_rd(p_hwfn, p_ptt, path_offsize_addr);
@@ -1050,6 +1059,20 @@ enum _ecore_status_t ecore_mcp_get_mfw_ver(struct ecore_dev *p_dev,
 	}
 #endif
 
+	if (IS_VF(p_dev)) {
+		if (p_hwfn->vf_iov_info) {
+			struct pfvf_acquire_resp_tlv *p_resp;
+
+			p_resp = &p_hwfn->vf_iov_info->acquire_resp;
+			*p_mfw_ver = p_resp->pfdev_info.mfw_ver;
+			return ECORE_SUCCESS;
+		} else {
+			DP_VERBOSE(p_dev, ECORE_MSG_IOV,
+				   "VF requested MFW vers prior to ACQUIRE\n");
+			return ECORE_INVAL;
+		}
+	}
+
 	global_offsize = ecore_rd(p_hwfn, p_ptt,
 				  SECTION_OFFSIZE_ADDR(p_hwfn->mcp_info->
 						       public_base,
@@ -1076,6 +1099,10 @@ enum _ecore_status_t ecore_mcp_get_media_type(struct ecore_dev *p_dev,
 	struct ecore_hwfn *p_hwfn = &p_dev->hwfns[0];
 	struct ecore_ptt *p_ptt;
 
+	/* TODO - Add support for VFs */
+	if (IS_VF(p_dev))
+		return ECORE_INVAL;
+
 	if (!ecore_mcp_is_init(p_hwfn)) {
 		DP_NOTICE(p_hwfn, true, "MFW is not initialized !\n");
 		return ECORE_BUSY;
@@ -1291,6 +1318,9 @@ enum _ecore_status_t ecore_mcp_get_flash_size(struct ecore_hwfn *p_hwfn,
 	}
 #endif
 
+	if (IS_VF(p_hwfn->p_dev))
+		return ECORE_INVAL;
+
 	flash_size = ecore_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4);
 	flash_size = (flash_size & MCP_REG_NVM_CFG4_FLASH_SIZE) >>
 	    MCP_REG_NVM_CFG4_FLASH_SIZE_SHIFT;
diff --git a/drivers/net/qede/base/ecore_spq.c b/drivers/net/qede/base/ecore_spq.c
index e7743cd..80d234f 100644
--- a/drivers/net/qede/base/ecore_spq.c
+++ b/drivers/net/qede/base/ecore_spq.c
@@ -20,6 +20,7 @@
 #include "ecore_dev_api.h"
 #include "ecore_mcp.h"
 #include "ecore_hw.h"
+#include "ecore_sriov.h"
 
 /***************************************************************************
  * Structures & Definitions
@@ -250,7 +251,9 @@ ecore_async_event_completion(struct ecore_hwfn *p_hwfn,
 {
 	switch (p_eqe->protocol_id) {
 	case PROTOCOLID_COMMON:
-		return ECORE_SUCCESS;
+		return ecore_sriov_eqe_event(p_hwfn,
+					     p_eqe->opcode,
+					     p_eqe->echo, &p_eqe->data);
 	default:
 		DP_NOTICE(p_hwfn,
 			  true, "Unknown Async completion for protocol: %d\n",
@@ -386,6 +389,9 @@ static enum _ecore_status_t ecore_cqe_completion(struct ecore_hwfn *p_hwfn,
 						 *cqe,
 						 enum protocol_type protocol)
 {
+	if (IS_VF(p_hwfn->p_dev))
+		return OSAL_VF_CQE_COMPLETION(p_hwfn, cqe, protocol);
+
 	/* @@@tmp - it's possible we'll eventually want to handle some
 	 * actual commands that can arrive here, but for now this is only
 	 * used to complete the ramrod using the echo value on the cqe
diff --git a/drivers/net/qede/base/ecore_sriov.c b/drivers/net/qede/base/ecore_sriov.c
new file mode 100644
index 0000000..eb74080
--- /dev/null
+++ b/drivers/net/qede/base/ecore_sriov.c
@@ -0,0 +1,3422 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#include "bcm_osal.h"
+#include "ecore.h"
+#include "reg_addr.h"
+#include "ecore_sriov.h"
+#include "ecore_status.h"
+#include "ecore_hw.h"
+#include "ecore_hw_defs.h"
+#include "ecore_int.h"
+#include "ecore_hsi_eth.h"
+#include "ecore_l2.h"
+#include "ecore_vfpf_if.h"
+#include "ecore_rt_defs.h"
+#include "ecore_init_ops.h"
+#include "ecore_gtt_reg_addr.h"
+#include "ecore_iro.h"
+#include "ecore_mcp.h"
+#include "ecore_cxt.h"
+#include "ecore_vf.h"
+#include "ecore_init_fw_funcs.h"
+
+/* TEMPORARY until we implement print_enums... */
+const char *ecore_channel_tlvs_string[] = {
+	"CHANNEL_TLV_NONE",	/* ends tlv sequence */
+	"CHANNEL_TLV_ACQUIRE",
+	"CHANNEL_TLV_VPORT_START",
+	"CHANNEL_TLV_VPORT_UPDATE",
+	"CHANNEL_TLV_VPORT_TEARDOWN",
+	"CHANNEL_TLV_START_RXQ",
+	"CHANNEL_TLV_START_TXQ",
+	"CHANNEL_TLV_STOP_RXQ",
+	"CHANNEL_TLV_STOP_TXQ",
+	"CHANNEL_TLV_UPDATE_RXQ",
+	"CHANNEL_TLV_INT_CLEANUP",
+	"CHANNEL_TLV_CLOSE",
+	"CHANNEL_TLV_RELEASE",
+	"CHANNEL_TLV_LIST_END",
+	"CHANNEL_TLV_UCAST_FILTER",
+	"CHANNEL_TLV_VPORT_UPDATE_ACTIVATE",
+	"CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH",
+	"CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP",
+	"CHANNEL_TLV_VPORT_UPDATE_MCAST",
+	"CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM",
+	"CHANNEL_TLV_VPORT_UPDATE_RSS",
+	"CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN",
+	"CHANNEL_TLV_VPORT_UPDATE_SGE_TPA",
+	"CHANNEL_TLV_MAX"
+};
+
+/* TODO - this is linux crc32; Need a way to ifdef it out for linux */
+u32 ecore_crc32(u32 crc, u8 *ptr, u32 length)
+{
+	int i;
+
+	while (length--) {
+		crc ^= *ptr++;
+		for (i = 0; i < 8; i++)
+			crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
+	}
+	return crc;
+}
+
+enum _ecore_status_t ecore_iov_post_vf_bulletin(struct ecore_hwfn *p_hwfn,
+						int vfid,
+						struct ecore_ptt *p_ptt)
+{
+	struct ecore_bulletin_content *p_bulletin;
+	struct ecore_dmae_params params;
+	struct ecore_vf_info *p_vf;
+	int crc_size = sizeof(p_bulletin->crc);
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!p_vf)
+		return ECORE_INVAL;
+
+	/* TODO - check VF is in a state where it can accept message */
+	if (!p_vf->vf_bulletin)
+		return ECORE_INVAL;
+
+	p_bulletin = p_vf->bulletin.p_virt;
+
+	/* Increment bulletin board version and compute crc */
+	p_bulletin->version++;
+	p_bulletin->crc = ecore_crc32(0, (u8 *)p_bulletin + crc_size,
+				      p_vf->bulletin.size - crc_size);
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
+		   p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
+
+	/* propagate bulletin board via dmae to vm memory */
+	OSAL_MEMSET(&params, 0, sizeof(params));
+	params.flags = ECORE_DMAE_FLAG_VF_DST;
+	params.dst_vfid = p_vf->abs_vf_id;
+	return ecore_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
+				    p_vf->vf_bulletin, p_vf->bulletin.size / 4,
+				    &params);
+}
+
+static enum _ecore_status_t ecore_iov_pci_cfg_info(struct ecore_dev *p_dev)
+{
+	struct ecore_hw_sriov_info *iov = &p_dev->sriov_info;
+	int pos = iov->pos;
+
+	DP_VERBOSE(p_dev, ECORE_MSG_IOV, "sriov ext pos %d\n", pos);
+	OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
+
+	OSAL_PCI_READ_CONFIG_WORD(p_dev,
+				  pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
+	OSAL_PCI_READ_CONFIG_WORD(p_dev,
+				  pos + PCI_SRIOV_INITIAL_VF,
+				  &iov->initial_vfs);
+
+	OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
+	if (iov->num_vfs) {
+		/* @@@TODO - in future we might want to add an OSAL here to
+		 * allow each OS to decide on its own how to act.
+		 */
+		DP_VERBOSE(p_dev, ECORE_MSG_IOV,
+			   "Number of VFs are already set to non-zero value."
+			   " Ignoring PCI configuration value\n");
+		iov->num_vfs = 0;
+	}
+
+	OSAL_PCI_READ_CONFIG_WORD(p_dev,
+				  pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
+
+	OSAL_PCI_READ_CONFIG_WORD(p_dev,
+				  pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
+
+	OSAL_PCI_READ_CONFIG_WORD(p_dev,
+				  pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
+
+	OSAL_PCI_READ_CONFIG_DWORD(p_dev,
+				   pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
+
+	OSAL_PCI_READ_CONFIG_DWORD(p_dev, pos + PCI_SRIOV_CAP, &iov->cap);
+
+	OSAL_PCI_READ_CONFIG_BYTE(p_dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
+
+	DP_VERBOSE(p_dev, ECORE_MSG_IOV, "IOV info[%d]: nres %d, cap 0x%x,"
+		   "ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d,"
+		   " stride %d, page size 0x%x\n", 0,
+		   iov->nres, iov->cap, iov->ctrl,
+		   iov->total_vfs, iov->initial_vfs, iov->nr_virtfn,
+		   iov->offset, iov->stride, iov->pgsz);
+
+	/* Some sanity checks */
+	if (iov->num_vfs > NUM_OF_VFS(p_dev) ||
+	    iov->total_vfs > NUM_OF_VFS(p_dev)) {
+		/* This can happen only due to a bug. In this case we set
+		 * num_vfs to zero to avoid memory corruption in the code that
+		 * assumes max number of vfs
+		 */
+		DP_NOTICE(p_dev, false,
+			  "IOV: Unexpected number of vfs set: %d"
+			  " setting num_vf to zero\n",
+			  iov->num_vfs);
+
+		iov->num_vfs = 0;
+		iov->total_vfs = 0;
+	}
+
+	return ECORE_SUCCESS;
+}
+
+static void ecore_iov_clear_vf_igu_blocks(struct ecore_hwfn *p_hwfn,
+					  struct ecore_ptt *p_ptt)
+{
+	struct ecore_igu_block *p_sb;
+	u16 sb_id;
+	u32 val;
+
+	if (!p_hwfn->hw_info.p_igu_info) {
+		DP_ERR(p_hwfn,
+		       "ecore_iov_clear_vf_igu_blocks IGU Info not inited\n");
+		return;
+	}
+
+	for (sb_id = 0;
+	     sb_id < ECORE_MAPPING_MEMORY_SIZE(p_hwfn->p_dev); sb_id++) {
+		p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
+		if ((p_sb->status & ECORE_IGU_STATUS_FREE) &&
+		    !(p_sb->status & ECORE_IGU_STATUS_PF)) {
+			val = ecore_rd(p_hwfn, p_ptt,
+				       IGU_REG_MAPPING_MEMORY + sb_id * 4);
+			SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
+			ecore_wr(p_hwfn, p_ptt,
+				 IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
+		}
+	}
+}
+
+static void ecore_iov_setup_vfdb(struct ecore_hwfn *p_hwfn)
+{
+	u16 num_vfs = p_hwfn->p_dev->sriov_info.total_vfs;
+	union pfvf_tlvs *p_reply_virt_addr;
+	union vfpf_tlvs *p_req_virt_addr;
+	struct ecore_bulletin_content *p_bulletin_virt;
+	struct ecore_pf_iov *p_iov_info;
+	dma_addr_t req_p, rply_p, bulletin_p;
+	u8 idx = 0;
+
+	p_iov_info = p_hwfn->pf_iov_info;
+
+	OSAL_MEMSET(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
+
+	p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
+	req_p = p_iov_info->mbx_msg_phys_addr;
+	p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
+	rply_p = p_iov_info->mbx_reply_phys_addr;
+	p_bulletin_virt = p_iov_info->p_bulletins;
+	bulletin_p = p_iov_info->bulletins_phys;
+	if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
+		DP_ERR(p_hwfn,
+		       "ecore_iov_setup_vfdb called without alloc mem first\n");
+		return;
+	}
+
+	p_iov_info->base_vport_id = 1;	/* @@@TBD resource allocation */
+
+	for (idx = 0; idx < num_vfs; idx++) {
+		struct ecore_vf_info *vf = &p_iov_info->vfs_array[idx];
+		u32 concrete;
+
+		vf->vf_mbx.req_virt = p_req_virt_addr + idx;
+		vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
+		vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
+		vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
+
+#ifdef CONFIG_ECORE_SW_CHANNEL
+		vf->vf_mbx.sw_mbx.request_size = sizeof(union vfpf_tlvs);
+		vf->vf_mbx.sw_mbx.mbx_state = VF_PF_WAIT_FOR_START_REQUEST;
+#endif
+		vf->state = VF_STOPPED;
+
+		vf->bulletin.phys = idx *
+		    sizeof(struct ecore_bulletin_content) + bulletin_p;
+		vf->bulletin.p_virt = p_bulletin_virt + idx;
+		vf->bulletin.size = sizeof(struct ecore_bulletin_content);
+
+		vf->relative_vf_id = idx;
+		vf->abs_vf_id = idx + p_hwfn->hw_info.first_vf_in_pf;
+		concrete = ecore_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
+		vf->concrete_fid = concrete;
+		/* TODO - need to devise a better way of getting opaque */
+		vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
+		    (vf->abs_vf_id << 8);
+		/* @@TBD MichalK - add base vport_id of VFs to equation */
+		vf->vport_id = p_iov_info->base_vport_id + idx;
+	}
+}
+
+static enum _ecore_status_t ecore_iov_allocate_vfdb(struct ecore_hwfn *p_hwfn)
+{
+	struct ecore_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
+	void **p_v_addr;
+	u16 num_vfs = 0;
+
+	num_vfs = p_hwfn->p_dev->sriov_info.total_vfs;
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "ecore_iov_allocate_vfdb for %d VFs\n", num_vfs);
+
+	/* Allocate PF Mailbox buffer (per-VF) */
+	p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
+	p_v_addr = &p_iov_info->mbx_msg_virt_addr;
+	*p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
+					    &p_iov_info->mbx_msg_phys_addr,
+					    p_iov_info->mbx_msg_size);
+	if (!*p_v_addr)
+		return ECORE_NOMEM;
+
+	/* Allocate PF Mailbox Reply buffer (per-VF) */
+	p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
+	p_v_addr = &p_iov_info->mbx_reply_virt_addr;
+	*p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
+					    &p_iov_info->mbx_reply_phys_addr,
+					    p_iov_info->mbx_reply_size);
+	if (!*p_v_addr)
+		return ECORE_NOMEM;
+
+	p_iov_info->bulletins_size = sizeof(struct ecore_bulletin_content) *
+	    num_vfs;
+	p_v_addr = &p_iov_info->p_bulletins;
+	*p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
+					    &p_iov_info->bulletins_phys,
+					    p_iov_info->bulletins_size);
+	if (!*p_v_addr)
+		return ECORE_NOMEM;
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "PF's Requests mailbox [%p virt 0x%lx phys],  Response"
+		   " mailbox [%p virt 0x%lx phys] Bulletins"
+		   " [%p virt 0x%lx phys]\n",
+		   p_iov_info->mbx_msg_virt_addr,
+		   (u64)p_iov_info->mbx_msg_phys_addr,
+		   p_iov_info->mbx_reply_virt_addr,
+		   (u64)p_iov_info->mbx_reply_phys_addr,
+		   p_iov_info->p_bulletins, (u64)p_iov_info->bulletins_phys);
+
+	/* @@@TBD MichalK - statistics / RSS */
+
+	return ECORE_SUCCESS;
+}
+
+static void ecore_iov_free_vfdb(struct ecore_hwfn *p_hwfn)
+{
+	struct ecore_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
+
+	if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
+		OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
+				       p_iov_info->mbx_msg_virt_addr,
+				       p_iov_info->mbx_msg_phys_addr,
+				       p_iov_info->mbx_msg_size);
+
+	if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
+		OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
+				       p_iov_info->mbx_reply_virt_addr,
+				       p_iov_info->mbx_reply_phys_addr,
+				       p_iov_info->mbx_reply_size);
+
+	if (p_iov_info->p_bulletins)
+		OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
+				       p_iov_info->p_bulletins,
+				       p_iov_info->bulletins_phys,
+				       p_iov_info->bulletins_size);
+
+	/* @@@TBD MichalK - statistics / RSS */
+}
+
+enum _ecore_status_t ecore_iov_alloc(struct ecore_hwfn *p_hwfn)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	struct ecore_pf_iov *p_sriov;
+
+	if (!IS_PF_SRIOV(p_hwfn)) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "No SR-IOV - no need for IOV db\n");
+		return rc;
+	}
+
+	p_sriov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_sriov));
+	if (!p_sriov) {
+		DP_NOTICE(p_hwfn, true,
+			  "Failed to allocate `struct ecore_sriov'");
+		return ECORE_NOMEM;
+	}
+
+	p_hwfn->pf_iov_info = p_sriov;
+
+	rc = ecore_iov_allocate_vfdb(p_hwfn);
+
+	return rc;
+}
+
+void ecore_iov_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
+{
+	if (!IS_PF_SRIOV(p_hwfn) || !p_hwfn->pf_iov_info)
+		return;
+
+	ecore_iov_setup_vfdb(p_hwfn);
+	ecore_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
+}
+
+void ecore_iov_free(struct ecore_hwfn *p_hwfn)
+{
+	if (p_hwfn->pf_iov_info) {
+		ecore_iov_free_vfdb(p_hwfn);
+		OSAL_FREE(p_hwfn->p_dev, p_hwfn->pf_iov_info);
+	}
+}
+
+enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn *p_hwfn,
+				       struct ecore_ptt *p_ptt)
+{
+	enum _ecore_status_t rc;
+
+	/* @@@ TBD get this information from shmem / pci cfg */
+	if (IS_VF(p_hwfn->p_dev))
+		return ECORE_SUCCESS;
+
+	/* First hwfn should learn the PCI configuration */
+	if (IS_LEAD_HWFN(p_hwfn)) {
+		struct ecore_dev *p_dev = p_hwfn->p_dev;
+		int *pos = &p_hwfn->p_dev->sriov_info.pos;
+
+		*pos = OSAL_PCI_FIND_EXT_CAPABILITY(p_hwfn->p_dev,
+						    PCI_EXT_CAP_ID_SRIOV);
+		if (!*pos) {
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "No PCIe IOV support\n");
+			return ECORE_SUCCESS;
+		}
+
+		rc = ecore_iov_pci_cfg_info(p_dev);
+		if (rc)
+			return rc;
+	} else if (!p_hwfn->p_dev->sriov_info.pos) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "No PCIe IOV support\n");
+		return ECORE_SUCCESS;
+	}
+
+	/* Calculate the first VF index - this is a bit tricky; Basically,
+	 * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
+	 * after the first engine's VFs.
+	 */
+	p_hwfn->hw_info.first_vf_in_pf = p_hwfn->p_dev->sriov_info.offset +
+	    p_hwfn->abs_pf_id - 16;
+	if (ECORE_PATH_ID(p_hwfn))
+		p_hwfn->hw_info.first_vf_in_pf -= MAX_NUM_VFS_BB;
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "First VF in hwfn 0x%08x\n", p_hwfn->hw_info.first_vf_in_pf);
+
+	return ECORE_SUCCESS;
+}
+
+struct ecore_vf_info *ecore_iov_get_vf_info(struct ecore_hwfn *p_hwfn,
+					    u16 relative_vf_id,
+					    bool b_enabled_only)
+{
+	struct ecore_vf_info *vf = OSAL_NULL;
+
+	if (!p_hwfn->pf_iov_info) {
+		DP_NOTICE(p_hwfn->p_dev, true, "No iov info\n");
+		return OSAL_NULL;
+	}
+
+	if (ecore_iov_is_valid_vfid(p_hwfn, relative_vf_id, b_enabled_only))
+		vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
+	else
+		DP_ERR(p_hwfn, "ecore_iov_get_vf_info: VF[%d] is not enabled\n",
+		       relative_vf_id);
+
+	return vf;
+}
+
+void ecore_iov_set_vf_to_disable(struct ecore_hwfn *p_hwfn,
+				 u16 rel_vf_id, u8 to_disable)
+{
+	struct ecore_vf_info *vf;
+
+	vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
+	if (!vf)
+		return;
+
+	vf->to_disable = to_disable;
+}
+
+void ecore_iov_set_vfs_to_disable(struct ecore_hwfn *p_hwfn, u8 to_disable)
+{
+	u16 i;
+
+	for (i = 0; i < p_hwfn->p_dev->sriov_info.total_vfs; i++)
+		ecore_iov_set_vf_to_disable(p_hwfn, i, to_disable);
+}
+
+#ifndef LINUX_REMOVE
+/* @@@TBD Consider taking outside of ecore... */
+enum _ecore_status_t ecore_iov_set_vf_ctx(struct ecore_hwfn *p_hwfn,
+					  u16 vf_id, void *ctx)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	struct ecore_vf_info *vf = ecore_iov_get_vf_info(p_hwfn, vf_id, true);
+
+	if (vf != OSAL_NULL) {
+		vf->ctx = ctx;
+#ifdef CONFIG_ECORE_SW_CHANNEL
+		vf->vf_mbx.sw_mbx.mbx_state = VF_PF_WAIT_FOR_START_REQUEST;
+#endif
+	} else {
+		rc = ECORE_UNKNOWN_ERROR;
+	}
+	return rc;
+}
+#endif
+
+/**
+ * VF enable primitives
+ *
+ * when pretend is required the caller is reponsible
+ * for calling pretend prioir to calling these routines
+ */
+
+/* clears vf error in all semi blocks
+ * Assumption: called under VF pretend...
+ */
+static OSAL_INLINE void ecore_iov_vf_semi_clear_err(struct ecore_hwfn *p_hwfn,
+						    struct ecore_ptt *p_ptt)
+{
+	ecore_wr(p_hwfn, p_ptt, TSEM_REG_VF_ERROR, 1);
+	ecore_wr(p_hwfn, p_ptt, USEM_REG_VF_ERROR, 1);
+	ecore_wr(p_hwfn, p_ptt, MSEM_REG_VF_ERROR, 1);
+	ecore_wr(p_hwfn, p_ptt, XSEM_REG_VF_ERROR, 1);
+	ecore_wr(p_hwfn, p_ptt, YSEM_REG_VF_ERROR, 1);
+	ecore_wr(p_hwfn, p_ptt, PSEM_REG_VF_ERROR, 1);
+}
+
+static void ecore_iov_vf_pglue_clear_err(struct ecore_hwfn *p_hwfn,
+					 struct ecore_ptt *p_ptt, u8 abs_vfid)
+{
+	ecore_wr(p_hwfn, p_ptt,
+		 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
+		 1 << (abs_vfid & 0x1f));
+}
+
+static void ecore_iov_vf_igu_reset(struct ecore_hwfn *p_hwfn,
+				   struct ecore_ptt *p_ptt,
+				   struct ecore_vf_info *vf)
+{
+	int i;
+	u16 igu_sb_id;
+
+	/* Set VF masks and configuration - pretend */
+	ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
+
+	ecore_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "value in VF_CONFIGURATION of vf %d after write %x\n",
+		   vf->abs_vf_id,
+		   ecore_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION));
+
+	/* unpretend */
+	ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
+
+	/* iterate ove all queues, clear sb consumer */
+	for (i = 0; i < vf->num_sbs; i++) {
+		igu_sb_id = vf->igu_sbs[i];
+		/* Set then clear... */
+		ecore_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 1,
+					 vf->opaque_fid);
+		ecore_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 0,
+					 vf->opaque_fid);
+	}
+}
+
+static void ecore_iov_vf_igu_set_int(struct ecore_hwfn *p_hwfn,
+				     struct ecore_ptt *p_ptt,
+				     struct ecore_vf_info *vf, bool enable)
+{
+	u32 igu_vf_conf;
+
+	ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
+
+	igu_vf_conf = ecore_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
+
+	if (enable)
+		igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
+	else
+		igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
+
+	ecore_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
+
+	/* unpretend */
+	ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
+}
+
+static enum _ecore_status_t
+ecore_iov_enable_vf_access(struct ecore_hwfn *p_hwfn,
+			   struct ecore_ptt *p_ptt, struct ecore_vf_info *vf)
+{
+	u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
+	enum _ecore_status_t rc;
+
+	if (vf->to_disable)
+		return ECORE_SUCCESS;
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "Enable internal access for vf %x [abs %x]\n", vf->abs_vf_id,
+		   ECORE_VF_ABS_ID(p_hwfn, vf));
+
+	ecore_iov_vf_pglue_clear_err(p_hwfn, p_ptt,
+				     ECORE_VF_ABS_ID(p_hwfn, vf));
+
+	rc = ecore_mcp_config_vf_msix(p_hwfn, p_ptt,
+				      vf->abs_vf_id, vf->num_sbs);
+	if (rc)
+		return rc;
+
+	ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
+
+	SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
+	STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
+
+	ecore_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
+		       p_hwfn->hw_info.hw_mode);
+
+	/* unpretend */
+	ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
+
+	if (vf->state != VF_STOPPED) {
+		DP_NOTICE(p_hwfn, true, "VF[%02x] is already started\n",
+			  vf->abs_vf_id);
+		return ECORE_INVAL;
+	}
+
+	/* Start VF */
+	rc = ecore_sp_vf_start(p_hwfn, vf->concrete_fid, vf->opaque_fid);
+	if (rc != ECORE_SUCCESS)
+		DP_NOTICE(p_hwfn, true, "Failed to start VF[%02x]\n",
+			  vf->abs_vf_id);
+
+	vf->state = VF_FREE;
+
+	return rc;
+}
+
+/**
+ *
+ * @brief ecore_iov_config_perm_table - configure the permission
+ *      zone table.
+ *      In E4, queue zone permission table size is 320x9. There
+ *      are 320 VF queues for single engine device (256 for dual
+ *      engine device), and each entry has the following format:
+ *      {Valid, VF[7:0]}
+ * @param p_hwfn
+ * @param p_ptt
+ * @param vf
+ * @param enable
+ */
+static void ecore_iov_config_perm_table(struct ecore_hwfn *p_hwfn,
+					struct ecore_ptt *p_ptt,
+					struct ecore_vf_info *vf, u8 enable)
+{
+	u32 reg_addr;
+	u32 val;
+	u16 qzone_id = 0;
+	int qid;
+
+	for (qid = 0; qid < vf->num_rxqs; qid++) {
+		ecore_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
+				  &qzone_id);
+
+		reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
+		val = enable ? (vf->abs_vf_id | (1 << 8)) : 0;
+		ecore_wr(p_hwfn, p_ptt, reg_addr, val);
+	}
+}
+
+static void ecore_iov_enable_vf_traffic(struct ecore_hwfn *p_hwfn,
+					struct ecore_ptt *p_ptt,
+					struct ecore_vf_info *vf)
+{
+	/* Reset vf in IGU interrupts are still disabled */
+	ecore_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
+
+	ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1 /* enable */);
+
+	/* Permission Table */
+	ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, true /* enable */);
+}
+
+static u8 ecore_iov_alloc_vf_igu_sbs(struct ecore_hwfn *p_hwfn,
+				     struct ecore_ptt *p_ptt,
+				     struct ecore_vf_info *vf,
+				     u16 num_rx_queues)
+{
+	int igu_id = 0;
+	int qid = 0;
+	u32 val = 0;
+	struct ecore_igu_block *igu_blocks =
+	    p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
+
+	if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
+		num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
+
+	p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
+
+	SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
+	SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
+	SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
+
+	while ((qid < num_rx_queues) &&
+	       (igu_id < ECORE_MAPPING_MEMORY_SIZE(p_hwfn->p_dev))) {
+		if (igu_blocks[igu_id].status & ECORE_IGU_STATUS_FREE) {
+			struct cau_sb_entry sb_entry;
+
+			vf->igu_sbs[qid] = (u16)igu_id;
+			igu_blocks[igu_id].status &= ~ECORE_IGU_STATUS_FREE;
+
+			SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
+
+			ecore_wr(p_hwfn, p_ptt,
+				 IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
+				 val);
+
+			/* Configure igu sb in CAU which were marked valid */
+			ecore_init_cau_sb_entry(p_hwfn, &sb_entry,
+						p_hwfn->rel_pf_id,
+						vf->abs_vf_id, 1);
+			ecore_dmae_host2grc(p_hwfn, p_ptt,
+					    (u64)(osal_uintptr_t)&sb_entry,
+					    CAU_REG_SB_VAR_MEMORY +
+					    igu_id * sizeof(u64), 2, 0);
+			qid++;
+		}
+		igu_id++;
+	}
+
+	vf->num_sbs = (u8)num_rx_queues;
+
+	return vf->num_sbs;
+}
+
+/**
+ *
+ * @brief The function invalidates all the VF entries,
+ *        technically this isn't required, but added for
+ *        cleaness and ease of debugging incase a VF attempts to
+ *        produce an interrupt after it has been taken down.
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ * @param vf
+ */
+static void ecore_iov_free_vf_igu_sbs(struct ecore_hwfn *p_hwfn,
+				      struct ecore_ptt *p_ptt,
+				      struct ecore_vf_info *vf)
+{
+	struct ecore_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
+	int idx, igu_id;
+	u32 addr, val;
+
+	/* Invalidate igu CAM lines and mark them as free */
+	for (idx = 0; idx < vf->num_sbs; idx++) {
+		igu_id = vf->igu_sbs[idx];
+		addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
+
+		val = ecore_rd(p_hwfn, p_ptt, addr);
+		SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
+		ecore_wr(p_hwfn, p_ptt, addr, val);
+
+		p_info->igu_map.igu_blocks[igu_id].status |=
+		    ECORE_IGU_STATUS_FREE;
+
+		p_hwfn->hw_info.p_igu_info->free_blks++;
+	}
+
+	vf->num_sbs = 0;
+}
+
+enum _ecore_status_t ecore_iov_init_hw_for_vf(struct ecore_hwfn *p_hwfn,
+					      struct ecore_ptt *p_ptt,
+					      u16 rel_vf_id, u16 num_rx_queues)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	struct ecore_vf_info *vf = OSAL_NULL;
+	u8 num_of_vf_avaiable_chains = 0;
+	u32 cids;
+	u8 i;
+
+	if (ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, rel_vf_id)) {
+		DP_NOTICE(p_hwfn, true, "VF[%d] is already active.\n",
+			  rel_vf_id);
+		return ECORE_INVAL;
+	}
+
+	vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
+	if (!vf) {
+		DP_ERR(p_hwfn, "ecore_iov_init_hw_for_vf : vf is OSAL_NULL\n");
+		return ECORE_UNKNOWN_ERROR;
+	}
+
+	/* Limit number of queues according to number of CIDs */
+	ecore_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "VF[%d] - requesting to initialize for 0x%04x queues"
+		   " [0x%04x CIDs available]\n",
+		   vf->relative_vf_id, num_rx_queues, (u16)cids);
+	num_rx_queues = OSAL_MIN_T(u16, num_rx_queues, ((u16)cids));
+
+	num_of_vf_avaiable_chains = ecore_iov_alloc_vf_igu_sbs(p_hwfn,
+							       p_ptt,
+							       vf,
+							       num_rx_queues);
+	if (num_of_vf_avaiable_chains == 0) {
+		DP_ERR(p_hwfn, "no available igu sbs\n");
+		return ECORE_NOMEM;
+	}
+
+	/* Choose queue number and index ranges */
+	vf->num_rxqs = num_of_vf_avaiable_chains;
+	vf->num_txqs = num_of_vf_avaiable_chains;
+
+	for (i = 0; i < vf->num_rxqs; i++) {
+		u16 queue_id = ecore_int_queue_id_from_sb_id(p_hwfn,
+							     vf->igu_sbs[i]);
+
+		if (queue_id > RESC_NUM(p_hwfn, ECORE_L2_QUEUE)) {
+			DP_NOTICE(p_hwfn, true,
+				  "VF[%d] will require utilizing of"
+				  " out-of-bounds queues - %04x\n",
+				  vf->relative_vf_id, queue_id);
+			/* TODO - cleanup the already allocate SBs */
+			return ECORE_INVAL;
+		}
+
+		/* CIDs are per-VF, so no problem having them 0-based. */
+		vf->vf_queues[i].fw_rx_qid = queue_id;
+		vf->vf_queues[i].fw_tx_qid = queue_id;
+		vf->vf_queues[i].fw_cid = i;
+
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "VF[%d] - [%d] SB %04x, Tx/Rx queue %04x CID %04x\n",
+			   vf->relative_vf_id, i, vf->igu_sbs[i], queue_id, i);
+	}
+
+	rc = ecore_iov_enable_vf_access(p_hwfn, p_ptt, vf);
+
+	if (rc == ECORE_SUCCESS) {
+		struct ecore_hw_sriov_info *p_iov = &p_hwfn->p_dev->sriov_info;
+		u16 vf_id = vf->relative_vf_id;
+
+		p_iov->num_vfs++;
+		p_iov->active_vfs[vf_id / 64] |= (1ULL << (vf_id % 64));
+	}
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_iov_release_hw_for_vf(struct ecore_hwfn *p_hwfn,
+						 struct ecore_ptt *p_ptt,
+						 u16 rel_vf_id)
+{
+	struct ecore_vf_info *vf = OSAL_NULL;
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+
+	vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!vf) {
+		DP_ERR(p_hwfn, "ecore_iov_release_hw_for_vf : vf is NULL\n");
+		return ECORE_UNKNOWN_ERROR;
+	}
+
+	if (vf->state != VF_STOPPED) {
+		/* Stopping the VF */
+		rc = ecore_sp_vf_stop(p_hwfn, vf->concrete_fid, vf->opaque_fid);
+
+		if (rc != ECORE_SUCCESS) {
+			DP_ERR(p_hwfn, "ecore_sp_vf_stop returned error %d\n",
+			       rc);
+			return rc;
+		}
+
+		vf->state = VF_STOPPED;
+	}
+
+	/* disablng interrupts and resetting permission table was done during
+	 * vf-close, however, we could get here without going through vf_close
+	 */
+	/* Disable Interrupts for VF */
+	ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0 /* disable */);
+
+	/* Reset Permission table */
+	ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, 0 /* disable */);
+
+	vf->num_rxqs = 0;
+	vf->num_txqs = 0;
+	ecore_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
+
+	if (ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, rel_vf_id)) {
+		struct ecore_hw_sriov_info *p_iov = &p_hwfn->p_dev->sriov_info;
+		u16 vf_id = vf->relative_vf_id;
+
+		p_iov->num_vfs--;
+		p_iov->active_vfs[vf_id / 64] &= ~(1ULL << (vf_id % 64));
+	}
+
+	return ECORE_SUCCESS;
+}
+
+static bool ecore_iov_tlv_supported(u16 tlvtype)
+{
+	return tlvtype > CHANNEL_TLV_NONE && tlvtype < CHANNEL_TLV_MAX;
+}
+
+static void ecore_iov_lock_vf_pf_channel(struct ecore_hwfn *p_hwfn,
+					 struct ecore_vf_info *vf, u16 tlv)
+{
+	/* we don't lock the channel for unsupported tlvs */
+	if (!ecore_iov_tlv_supported(tlv))
+		return;
+
+	/* lock the channel */
+	/* mutex_lock(&vf->op_mutex); @@@TBD MichalK - add lock... */
+
+	/* record the locking op */
+	/* vf->op_current = tlv; @@@TBD MichalK */
+
+	/* log the lock */
+	DP_VERBOSE(p_hwfn,
+		   ECORE_MSG_IOV,
+		   "VF[%d]: vf pf channel locked by     %s\n",
+		   vf->abs_vf_id, ecore_channel_tlvs_string[tlv]);
+}
+
+static void ecore_iov_unlock_vf_pf_channel(struct ecore_hwfn *p_hwfn,
+					   struct ecore_vf_info *vf,
+					   u16 expected_tlv)
+{
+	/* we don't unlock the channel for unsupported tlvs */
+	if (!ecore_iov_tlv_supported(expected_tlv))
+		return;
+
+	/* WARN(expected_tlv != vf->op_current,
+	 * "lock mismatch: expected %s found %s",
+	 * channel_tlvs_string[expected_tlv],
+	 * channel_tlvs_string[vf->op_current]);
+	 * @@@TBD MichalK
+	 */
+
+	/* lock the channel */
+	/* mutex_unlock(&vf->op_mutex); @@@TBD MichalK add the lock */
+
+	/* log the unlock */
+	DP_VERBOSE(p_hwfn,
+		   ECORE_MSG_IOV,
+		   "VF[%d]: vf pf channel unlocked by %s\n",
+		   vf->abs_vf_id, ecore_channel_tlvs_string[expected_tlv]);
+
+	/* record the locking op */
+	/* vf->op_current = CHANNEL_TLV_NONE; */
+}
+
+/* place a given tlv on the tlv buffer, continuing current tlv list */
+void *ecore_add_tlv(struct ecore_hwfn *p_hwfn,
+		    u8 **offset, u16 type, u16 length)
+{
+	struct channel_tlv *tl = (struct channel_tlv *)*offset;
+
+	tl->type = type;
+	tl->length = length;
+
+	/* Offset should keep pointing to next TLV (the end of the last) */
+	*offset += length;
+
+	/* Return a pointer to the start of the added tlv */
+	return *offset - length;
+}
+
+/* list the types and lengths of the tlvs on the buffer */
+void ecore_dp_tlv_list(struct ecore_hwfn *p_hwfn, void *tlvs_list)
+{
+	u16 i = 1, total_length = 0;
+	struct channel_tlv *tlv;
+
+	do {
+		/* cast current tlv list entry to channel tlv header */
+		tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
+
+		/* output tlv */
+		if (ecore_iov_tlv_supported(tlv->type))
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "TLV number %d: type %s, length %d\n",
+				   i, ecore_channel_tlvs_string[tlv->type],
+				   tlv->length);
+		else
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "TLV number %d: type %d, length %d\n",
+				   i, tlv->type, tlv->length);
+
+		if (tlv->type == CHANNEL_TLV_LIST_END)
+			return;
+
+		/* Validate entry - protect against malicious VFs */
+		if (!tlv->length) {
+			DP_NOTICE(p_hwfn, false, "TLV of length 0 found\n");
+			return;
+		}
+		total_length += tlv->length;
+		if (total_length >= sizeof(struct tlv_buffer_size)) {
+			DP_NOTICE(p_hwfn, false, "TLV ==> Buffer overflow\n");
+			return;
+		}
+
+		i++;
+	} while (1);
+}
+
+static void ecore_iov_send_response(struct ecore_hwfn *p_hwfn,
+				    struct ecore_ptt *p_ptt,
+				    struct ecore_vf_info *p_vf,
+				    u16 length, u8 status)
+{
+	struct ecore_iov_vf_mbx *mbx = &p_vf->vf_mbx;
+	struct ecore_dmae_params params;
+	u8 eng_vf_id;
+
+	mbx->reply_virt->default_resp.hdr.status = status;
+
+#ifdef CONFIG_ECORE_SW_CHANNEL
+	mbx->sw_mbx.response_size =
+	    length + sizeof(struct channel_list_end_tlv);
+#endif
+
+	ecore_dp_tlv_list(p_hwfn, mbx->reply_virt);
+
+	if (!p_hwfn->p_dev->sriov_info.b_hw_channel)
+		return;
+
+	eng_vf_id = p_vf->abs_vf_id;
+
+	OSAL_MEMSET(&params, 0, sizeof(struct ecore_dmae_params));
+	params.flags = ECORE_DMAE_FLAG_VF_DST;
+	params.dst_vfid = eng_vf_id;
+
+	ecore_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
+			     mbx->req_virt->first_tlv.reply_address +
+			     sizeof(u64),
+			     (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
+			     &params);
+
+	ecore_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
+			     mbx->req_virt->first_tlv.reply_address,
+			     sizeof(u64) / 4, &params);
+
+	REG_WR(p_hwfn,
+	       GTT_BAR0_MAP_REG_USDM_RAM +
+	       USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
+}
+
+static u16 ecore_iov_vport_to_tlv(struct ecore_hwfn *p_hwfn,
+				  enum ecore_iov_vport_update_flag flag)
+{
+	switch (flag) {
+	case ECORE_IOV_VP_UPDATE_ACTIVATE:
+		return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
+	case ECORE_IOV_VP_UPDATE_VLAN_STRIP:
+		return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
+	case ECORE_IOV_VP_UPDATE_TX_SWITCH:
+		return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
+	case ECORE_IOV_VP_UPDATE_MCAST:
+		return CHANNEL_TLV_VPORT_UPDATE_MCAST;
+	case ECORE_IOV_VP_UPDATE_ACCEPT_PARAM:
+		return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
+	case ECORE_IOV_VP_UPDATE_RSS:
+		return CHANNEL_TLV_VPORT_UPDATE_RSS;
+	case ECORE_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
+		return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
+	case ECORE_IOV_VP_UPDATE_SGE_TPA:
+		return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
+	default:
+		return 0;
+	}
+}
+
+static u16 ecore_iov_prep_vp_update_resp_tlvs(struct ecore_hwfn *p_hwfn,
+					      struct ecore_vf_info *p_vf,
+					      struct ecore_iov_vf_mbx *p_mbx,
+					      u8 status, u16 tlvs_mask,
+					      u16 tlvs_accepted)
+{
+	struct pfvf_def_resp_tlv *resp;
+	u16 size, total_len, i;
+
+	OSAL_MEMSET(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
+	p_mbx->offset = (u8 *)(p_mbx->reply_virt);
+	size = sizeof(struct pfvf_def_resp_tlv);
+	total_len = size;
+
+	ecore_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
+
+	/* Prepare response for all extended tlvs if they are found by PF */
+	for (i = 0; i < ECORE_IOV_VP_UPDATE_MAX; i++) {
+		if (!(tlvs_mask & (1 << i)))
+			continue;
+
+		resp = ecore_add_tlv(p_hwfn, &p_mbx->offset,
+				     ecore_iov_vport_to_tlv(p_hwfn, i), size);
+
+		if (tlvs_accepted & (1 << i))
+			resp->hdr.status = status;
+		else
+			resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
+
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "VF[%d] - vport_update resp: TLV %d, status %02x\n",
+			   p_vf->relative_vf_id,
+			   ecore_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
+
+		total_len += size;
+	}
+
+	ecore_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	return total_len;
+}
+
+static void ecore_iov_prepare_resp(struct ecore_hwfn *p_hwfn,
+				   struct ecore_ptt *p_ptt,
+				   struct ecore_vf_info *vf_info,
+				   u16 type, u16 length, u8 status)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf_info->vf_mbx;
+
+	mbx->offset = (u8 *)(mbx->reply_virt);
+
+	ecore_add_tlv(p_hwfn, &mbx->offset, type, length);
+	ecore_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	ecore_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
+}
+
+static void ecore_iov_vf_cleanup(struct ecore_hwfn *p_hwfn,
+				 struct ecore_vf_info *p_vf)
+{
+	p_vf->vf_bulletin = 0;
+	p_vf->vport_instance = 0;
+	p_vf->num_mac_filters = 0;
+	p_vf->num_vlan_filters = 0;
+	p_vf->num_mc_filters = 0;
+	p_vf->configured_features = 0;
+
+	/* If VF previously requested less resources, go back to default */
+	p_vf->num_rxqs = p_vf->num_sbs;
+	p_vf->num_txqs = p_vf->num_sbs;
+
+	p_vf->num_active_rxqs = 0;
+
+	OSAL_MEMSET(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
+	OSAL_IOV_VF_CLEANUP(p_hwfn, p_vf->relative_vf_id);
+}
+
+static void ecore_iov_vf_mbx_acquire(struct ecore_hwfn *p_hwfn,
+				     struct ecore_ptt *p_ptt,
+				     struct ecore_vf_info *vf)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
+	struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
+	struct pf_vf_resc *resc = &resp->resc;
+	struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
+	u16 length;
+	u8 i, vfpf_status = PFVF_STATUS_SUCCESS;
+
+	/* Validate FW compatibility */
+	if (req->vfdev_info.fw_major != FW_MAJOR_VERSION ||
+	    req->vfdev_info.fw_minor != FW_MINOR_VERSION ||
+	    req->vfdev_info.fw_revision != FW_REVISION_VERSION ||
+	    req->vfdev_info.fw_engineering != FW_ENGINEERING_VERSION) {
+		DP_INFO(p_hwfn,
+			"VF[%d] is running an incompatible driver [VF needs"
+			" FW %02x:%02x:%02x:%02x but Hypervisor is"
+			" using %02x:%02x:%02x:%02x]\n",
+			vf->abs_vf_id, req->vfdev_info.fw_major,
+			req->vfdev_info.fw_minor, req->vfdev_info.fw_revision,
+			req->vfdev_info.fw_engineering, FW_MAJOR_VERSION,
+			FW_MINOR_VERSION, FW_REVISION_VERSION,
+			FW_ENGINEERING_VERSION);
+		vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
+		goto out;
+	}
+#ifndef __EXTRACT__LINUX__
+	if (OSAL_IOV_VF_ACQUIRE(p_hwfn, vf->relative_vf_id) != ECORE_SUCCESS) {
+		vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
+		goto out;
+	}
+#endif
+
+	OSAL_MEMSET(resp, 0, sizeof(*resp));
+
+	/* Fill in vf info stuff : @@@TBD MichalK Hard Coded for now... */
+	vf->opaque_fid = req->vfdev_info.opaque_fid;
+	vf->num_mac_filters = 1;
+	vf->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
+	vf->num_mc_filters = ECORE_MAX_MC_ADDRS;
+
+	vf->vf_bulletin = req->bulletin_addr;
+	vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
+	    vf->bulletin.size : req->bulletin_size;
+
+	/* fill in pfdev info */
+	pfdev_info->chip_num = p_hwfn->p_dev->chip_num;
+	pfdev_info->db_size = 0;	/* @@@ TBD MichalK Vf Doorbells */
+	pfdev_info->indices_per_sb = PIS_PER_SB;
+	pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED;
+
+	pfdev_info->stats_info.mstats.address =
+	    PXP_VF_BAR0_START_MSDM_ZONE_B +
+	    OFFSETOF(struct mstorm_vf_zone, non_trigger.eth_queue_stat);
+	pfdev_info->stats_info.mstats.len =
+	    sizeof(struct eth_mstorm_per_queue_stat);
+
+	pfdev_info->stats_info.ustats.address =
+	    PXP_VF_BAR0_START_USDM_ZONE_B +
+	    OFFSETOF(struct ustorm_vf_zone, non_trigger.eth_queue_stat);
+	pfdev_info->stats_info.ustats.len =
+	    sizeof(struct eth_ustorm_per_queue_stat);
+
+	pfdev_info->stats_info.pstats.address =
+	    PXP_VF_BAR0_START_PSDM_ZONE_B +
+	    OFFSETOF(struct pstorm_vf_zone, non_trigger.eth_queue_stat);
+	pfdev_info->stats_info.pstats.len =
+	    sizeof(struct eth_pstorm_per_queue_stat);
+
+	pfdev_info->stats_info.tstats.address = 0;
+	pfdev_info->stats_info.tstats.len = 0;
+
+	OSAL_MEMCPY(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr,
+		    ETH_ALEN);
+
+	pfdev_info->fw_major = FW_MAJOR_VERSION;
+	pfdev_info->fw_minor = FW_MINOR_VERSION;
+	pfdev_info->fw_rev = FW_REVISION_VERSION;
+	pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
+	pfdev_info->os_type = OSAL_IOV_GET_OS_TYPE();
+	ecore_mcp_get_mfw_ver(p_hwfn->p_dev, p_ptt, &pfdev_info->mfw_ver,
+			      OSAL_NULL);
+
+	pfdev_info->dev_type = p_hwfn->p_dev->type;
+	pfdev_info->chip_rev = p_hwfn->p_dev->chip_rev;
+
+	/* Fill in resc : @@@TBD MichalK Hard Coded for now... */
+	resc->num_rxqs = vf->num_rxqs;
+	resc->num_txqs = vf->num_txqs;
+	resc->num_sbs = vf->num_sbs;
+	for (i = 0; i < resc->num_sbs; i++) {
+		resc->hw_sbs[i].hw_sb_id = vf->igu_sbs[i];
+		resc->hw_sbs[i].sb_qid = 0;
+	}
+
+	for (i = 0; i < resc->num_rxqs; i++) {
+		ecore_fw_l2_queue(p_hwfn, vf->vf_queues[i].fw_rx_qid,
+				  (u16 *)&resc->hw_qid[i]);
+		resc->cid[i] = vf->vf_queues[i].fw_cid;
+	}
+
+	resc->num_mac_filters = OSAL_MIN_T(u8, vf->num_mac_filters,
+					   req->resc_request.num_mac_filters);
+	resc->num_vlan_filters = OSAL_MIN_T(u8, vf->num_vlan_filters,
+					    req->resc_request.num_vlan_filters);
+	resc->num_mc_filters = OSAL_MIN_T(u8, vf->num_mc_filters,
+					  req->resc_request.num_mc_filters);
+
+	/* Fill agreed size of bulletin board in response, and post
+	 * an initial image to the bulletin board.
+	 */
+	resp->bulletin_size = vf->bulletin.size;
+	ecore_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x,"
+		   " db_size=%d, idx_per_sb=%d, pf_cap=0x%lx\n"
+		   "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d,"
+		   " n_vlans-%d, n_mcs-%d\n",
+		   vf->abs_vf_id, resp->pfdev_info.chip_num,
+		   resp->pfdev_info.db_size, resp->pfdev_info.indices_per_sb,
+		   resp->pfdev_info.capabilities, resc->num_rxqs,
+		   resc->num_txqs, resc->num_sbs, resc->num_mac_filters,
+		   resc->num_vlan_filters, resc->num_mc_filters);
+
+	vf->state = VF_ACQUIRED;
+
+	/* Prepare Response */
+	length = sizeof(struct pfvf_acquire_resp_tlv);
+
+out:
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
+			       length, vfpf_status);
+
+	/* @@@TBD Bulletin */
+}
+
+static enum _ecore_status_t
+__ecore_iov_spoofchk_set(struct ecore_hwfn *p_hwfn,
+			 struct ecore_vf_info *p_vf, bool val)
+{
+	struct ecore_sp_vport_update_params params;
+	enum _ecore_status_t rc;
+
+	if (val == p_vf->spoof_chk) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "Spoofchk value[%d] is already configured\n", val);
+		return ECORE_SUCCESS;
+	}
+
+	OSAL_MEMSET(&params, 0, sizeof(struct ecore_sp_vport_update_params));
+	params.opaque_fid = p_vf->opaque_fid;
+	params.vport_id = p_vf->vport_id;
+	params.update_anti_spoofing_en_flg = 1;
+	params.anti_spoofing_en = val;
+
+	rc = ecore_sp_vport_update(p_hwfn, &params, ECORE_SPQ_MODE_EBLOCK,
+				   OSAL_NULL);
+	if (rc == ECORE_SUCCESS) {
+		p_vf->spoof_chk = val;
+		p_vf->req_spoofchk_val = p_vf->spoof_chk;
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "Spoofchk val[%d] configured\n", val);
+	} else {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "Spoofchk configuration[val:%d] failed for VF[%d]\n",
+			   val, p_vf->relative_vf_id);
+	}
+
+	return rc;
+}
+
+static enum _ecore_status_t
+ecore_iov_reconfigure_unicast_vlan(struct ecore_hwfn *p_hwfn,
+				   struct ecore_vf_info *p_vf)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	struct ecore_filter_ucast filter;
+	int i;
+
+	OSAL_MEMSET(&filter, 0, sizeof(filter));
+	filter.is_rx_filter = 1;
+	filter.is_tx_filter = 1;
+	filter.vport_to_add_to = p_vf->vport_id;
+	filter.opcode = ECORE_FILTER_ADD;
+
+	/* Reconfigure vlans */
+	for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
+		if (p_vf->shadow_config.vlans[i].used) {
+			filter.type = ECORE_FILTER_VLAN;
+			filter.vlan = p_vf->shadow_config.vlans[i].vid;
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "Reconfig VLAN [0x%04x] for VF [%04x]\n",
+				   filter.vlan, p_vf->relative_vf_id);
+			rc = ecore_sp_eth_filter_ucast(p_hwfn,
+						       p_vf->opaque_fid,
+						       &filter,
+						       ECORE_SPQ_MODE_CB,
+						       OSAL_NULL);
+			if (rc) {
+				DP_NOTICE(p_hwfn, true,
+					  "Failed to configure VLAN [%04x]"
+					  " to VF [%04x]\n",
+					  filter.vlan, p_vf->relative_vf_id);
+				break;
+			}
+		}
+	}
+
+	return rc;
+}
+
+static enum _ecore_status_t
+ecore_iov_reconfigure_unicast_shadow(struct ecore_hwfn *p_hwfn,
+				     struct ecore_vf_info *p_vf, u64 events)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+
+	/*TODO - what about MACs? */
+
+	if ((events & (1 << VLAN_ADDR_FORCED)) &&
+	    !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
+		rc = ecore_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
+
+	return rc;
+}
+
+static int ecore_iov_configure_vport_forced(struct ecore_hwfn *p_hwfn,
+					    struct ecore_vf_info *p_vf,
+					    u64 events)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	struct ecore_filter_ucast filter;
+
+	if (!p_vf->vport_instance)
+		return ECORE_INVAL;
+
+	if (events & (1 << MAC_ADDR_FORCED)) {
+		/* Since there's no way [currently] of removing the MAC,
+		 * we can always assume this means we need to force it.
+		 */
+		OSAL_MEMSET(&filter, 0, sizeof(filter));
+		filter.type = ECORE_FILTER_MAC;
+		filter.opcode = ECORE_FILTER_REPLACE;
+		filter.is_rx_filter = 1;
+		filter.is_tx_filter = 1;
+		filter.vport_to_add_to = p_vf->vport_id;
+		OSAL_MEMCPY(filter.mac, p_vf->bulletin.p_virt->mac, ETH_ALEN);
+
+		rc = ecore_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
+					       &filter,
+					       ECORE_SPQ_MODE_CB, OSAL_NULL);
+		if (rc) {
+			DP_NOTICE(p_hwfn, true,
+				  "PF failed to configure MAC for VF\n");
+			return rc;
+		}
+
+		p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
+	}
+
+	if (events & (1 << VLAN_ADDR_FORCED)) {
+		struct ecore_sp_vport_update_params vport_update;
+		u8 removal;
+		int i;
+
+		OSAL_MEMSET(&filter, 0, sizeof(filter));
+		filter.type = ECORE_FILTER_VLAN;
+		filter.is_rx_filter = 1;
+		filter.is_tx_filter = 1;
+		filter.vport_to_add_to = p_vf->vport_id;
+		filter.vlan = p_vf->bulletin.p_virt->pvid;
+		filter.opcode = filter.vlan ? ECORE_FILTER_REPLACE :
+		    ECORE_FILTER_FLUSH;
+
+		/* Send the ramrod */
+		rc = ecore_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
+					       &filter,
+					       ECORE_SPQ_MODE_CB, OSAL_NULL);
+		if (rc) {
+			DP_NOTICE(p_hwfn, true,
+				  "PF failed to configure VLAN for VF\n");
+			return rc;
+		}
+
+		/* Update the default-vlan & silent vlan stripping */
+		OSAL_MEMSET(&vport_update, 0, sizeof(vport_update));
+		vport_update.opaque_fid = p_vf->opaque_fid;
+		vport_update.vport_id = p_vf->vport_id;
+		vport_update.update_default_vlan_enable_flg = 1;
+		vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
+		vport_update.update_default_vlan_flg = 1;
+		vport_update.default_vlan = filter.vlan;
+
+		vport_update.update_inner_vlan_removal_flg = 1;
+		removal = filter.vlan ?
+		    1 : p_vf->shadow_config.inner_vlan_removal;
+		vport_update.inner_vlan_removal_flg = removal;
+		vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
+		rc = ecore_sp_vport_update(p_hwfn, &vport_update,
+					   ECORE_SPQ_MODE_EBLOCK, OSAL_NULL);
+		if (rc) {
+			DP_NOTICE(p_hwfn, true,
+				  "PF failed to configure VF vport for vlan\n");
+			return rc;
+		}
+
+		/* Update all the Rx queues */
+		for (i = 0; i < ECORE_MAX_VF_CHAINS_PER_PF; i++) {
+			u16 qid;
+
+			if (!p_vf->vf_queues[i].rxq_active)
+				continue;
+
+			qid = p_vf->vf_queues[i].fw_rx_qid;
+
+			rc = ecore_sp_eth_rx_queues_update(p_hwfn, qid,
+						   1, 0, 1,
+						   ECORE_SPQ_MODE_EBLOCK,
+						   OSAL_NULL);
+			if (rc) {
+				DP_NOTICE(p_hwfn, true,
+					  "Failed to send Rx update"
+					  " queue[0x%04x]\n",
+					  qid);
+				return rc;
+			}
+		}
+
+		if (filter.vlan)
+			p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
+		else
+			p_vf->configured_features &= ~(1 << VLAN_ADDR_FORCED);
+	}
+
+	/* If forced features are terminated, we need to configure the shadow
+	 * configuration back again.
+	 */
+	if (events)
+		ecore_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
+
+	return rc;
+}
+
+static void ecore_iov_vf_mbx_start_vport(struct ecore_hwfn *p_hwfn,
+					 struct ecore_ptt *p_ptt,
+					 struct ecore_vf_info *vf)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct vfpf_vport_start_tlv *start = &mbx->req_virt->start_vport;
+	struct ecore_sp_vport_start_params params = { 0 };
+	u8 status = PFVF_STATUS_SUCCESS;
+	struct ecore_vf_info *vf_info;
+	enum _ecore_status_t rc;
+	u64 *p_bitmap;
+	int sb_id;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vf->relative_vf_id, true);
+	if (!vf_info) {
+		DP_NOTICE(p_hwfn->p_dev, true,
+			  "Failed to get VF info, invalid vfid [%d]\n",
+			  vf->relative_vf_id);
+		return;
+	}
+
+	vf->state = VF_ENABLED;
+
+	/* Initialize Status block in CAU */
+	for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
+		if (!start->sb_addr[sb_id]) {
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VF[%d] did not fill the address of SB %d\n",
+				   vf->relative_vf_id, sb_id);
+			break;
+		}
+
+		ecore_int_cau_conf_sb(p_hwfn, p_ptt,
+				      start->sb_addr[sb_id],
+				      vf->igu_sbs[sb_id],
+				      vf->abs_vf_id, 1 /* VF Valid */);
+	}
+	ecore_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
+
+	vf->mtu = start->mtu;
+	vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
+
+	/* Take into consideration configuration forced by hypervisor;
+	 * If none is configured, use the supplied VF values [for old
+	 * vfs that would still be fine, since they passed '0' as padding].
+	 */
+	p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
+	if (!(*p_bitmap & (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
+		u8 vf_req = start->only_untagged;
+
+		vf_info->bulletin.p_virt->default_only_untagged = vf_req;
+		*p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
+	}
+
+	params.tpa_mode = start->tpa_mode;
+	params.remove_inner_vlan = start->inner_vlan_removal;
+	params.tx_switching = true;
+
+#ifndef ASIC_ONLY
+	if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) {
+		DP_NOTICE(p_hwfn, false,
+			  "FPGA: Don't confi VF for Tx-switching [no pVFC]\n");
+		params.tx_switching = false;
+	}
+#endif
+
+	params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
+	params.drop_ttl0 = false;
+	params.concrete_fid = vf->concrete_fid;
+	params.opaque_fid = vf->opaque_fid;
+	params.vport_id = vf->vport_id;
+	params.max_buffers_per_cqe = start->max_buffers_per_cqe;
+	params.mtu = vf->mtu;
+
+	rc = ecore_sp_eth_vport_start(p_hwfn, &params);
+	if (rc != ECORE_SUCCESS) {
+		DP_ERR(p_hwfn,
+		       "ecore_iov_vf_mbx_start_vport returned error %d\n", rc);
+		status = PFVF_STATUS_FAILURE;
+	} else {
+		vf->vport_instance++;
+
+		/* Force configuration if needed on the newly opened vport */
+		ecore_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
+		OSAL_IOV_POST_START_VPORT(p_hwfn, vf->relative_vf_id,
+					  vf->vport_id, vf->opaque_fid);
+		__ecore_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
+	}
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
+			       sizeof(struct pfvf_def_resp_tlv), status);
+}
+
+static void ecore_iov_vf_mbx_stop_vport(struct ecore_hwfn *p_hwfn,
+					struct ecore_ptt *p_ptt,
+					struct ecore_vf_info *vf)
+{
+	u8 status = PFVF_STATUS_SUCCESS;
+	enum _ecore_status_t rc;
+
+	vf->vport_instance--;
+	vf->spoof_chk = false;
+
+	rc = ecore_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
+	if (rc != ECORE_SUCCESS) {
+		DP_ERR(p_hwfn,
+		       "ecore_iov_vf_mbx_stop_vport returned error %d\n", rc);
+		status = PFVF_STATUS_FAILURE;
+	}
+
+	/* Forget the configuration on the vport */
+	vf->configured_features = 0;
+	OSAL_MEMSET(&vf->shadow_config, 0, sizeof(vf->shadow_config));
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
+			       sizeof(struct pfvf_def_resp_tlv), status);
+}
+
+static void ecore_iov_vf_mbx_start_rxq(struct ecore_hwfn *p_hwfn,
+				       struct ecore_ptt *p_ptt,
+				       struct ecore_vf_info *vf)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct vfpf_start_rxq_tlv *req = &mbx->req_virt->start_rxq;
+	u16 length = sizeof(struct pfvf_def_resp_tlv);
+	u8 status = PFVF_STATUS_SUCCESS;
+	enum _ecore_status_t rc;
+
+	rc = ecore_sp_eth_rxq_start_ramrod(p_hwfn, vf->opaque_fid,
+					   vf->vf_queues[req->rx_qid].fw_cid,
+					   vf->vf_queues[req->rx_qid].fw_rx_qid,
+					   vf->vport_id,
+					   vf->abs_vf_id + 0x10,
+					   req->hw_sb,
+					   req->sb_index,
+					   req->bd_max_bytes,
+					   req->rxq_addr,
+					   req->cqe_pbl_addr,
+					   req->cqe_pbl_size);
+
+	if (rc) {
+		status = PFVF_STATUS_FAILURE;
+	} else {
+		vf->vf_queues[req->rx_qid].rxq_active = true;
+		vf->num_active_rxqs++;
+	}
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_START_RXQ,
+			       length, status);
+}
+
+static void ecore_iov_vf_mbx_start_txq(struct ecore_hwfn *p_hwfn,
+				       struct ecore_ptt *p_ptt,
+				       struct ecore_vf_info *vf)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct vfpf_start_txq_tlv *req = &mbx->req_virt->start_txq;
+	u16 length = sizeof(struct pfvf_def_resp_tlv);
+	union ecore_qm_pq_params pq_params;
+	u8 status = PFVF_STATUS_SUCCESS;
+	enum _ecore_status_t rc;
+
+	/* Prepare the parameters which would choose the right PQ */
+	OSAL_MEMSET(&pq_params, 0, sizeof(pq_params));
+	pq_params.eth.is_vf = 1;
+	pq_params.eth.vf_id = vf->relative_vf_id;
+
+	rc = ecore_sp_eth_txq_start_ramrod(p_hwfn,
+					   vf->opaque_fid,
+					   vf->vf_queues[req->tx_qid].fw_tx_qid,
+					   vf->vf_queues[req->tx_qid].fw_cid,
+					   vf->vport_id,
+					   vf->abs_vf_id + 0x10,
+					   req->hw_sb,
+					   req->sb_index,
+					   req->pbl_addr,
+					   req->pbl_size, &pq_params);
+
+	if (rc)
+		status = PFVF_STATUS_FAILURE;
+	else
+		vf->vf_queues[req->tx_qid].txq_active = true;
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_START_TXQ,
+			       length, status);
+}
+
+static enum _ecore_status_t ecore_iov_vf_stop_rxqs(struct ecore_hwfn *p_hwfn,
+						   struct ecore_vf_info *vf,
+						   u16 rxq_id,
+						   u8 num_rxqs,
+						   bool cqe_completion)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	int qid;
+
+	if (rxq_id + num_rxqs > OSAL_ARRAY_SIZE(vf->vf_queues))
+		return ECORE_INVAL;
+
+	for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
+		if (vf->vf_queues[qid].rxq_active) {
+			rc = ecore_sp_eth_rx_queue_stop(p_hwfn,
+							vf->vf_queues[qid].
+							fw_rx_qid, false,
+							cqe_completion);
+
+			if (rc)
+				return rc;
+		}
+		vf->vf_queues[qid].rxq_active = false;
+		vf->num_active_rxqs--;
+	}
+
+	return rc;
+}
+
+static enum _ecore_status_t ecore_iov_vf_stop_txqs(struct ecore_hwfn *p_hwfn,
+						   struct ecore_vf_info *vf,
+						   u16 txq_id, u8 num_txqs)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	int qid;
+
+	if (txq_id + num_txqs > OSAL_ARRAY_SIZE(vf->vf_queues))
+		return ECORE_INVAL;
+
+	for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
+		if (vf->vf_queues[qid].txq_active) {
+			rc = ecore_sp_eth_tx_queue_stop(p_hwfn,
+							vf->vf_queues[qid].
+							fw_tx_qid);
+
+			if (rc)
+				return rc;
+		}
+		vf->vf_queues[qid].txq_active = false;
+	}
+	return rc;
+}
+
+static void ecore_iov_vf_mbx_stop_rxqs(struct ecore_hwfn *p_hwfn,
+				       struct ecore_ptt *p_ptt,
+				       struct ecore_vf_info *vf)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct vfpf_stop_rxqs_tlv *req = &mbx->req_virt->stop_rxqs;
+	u16 length = sizeof(struct pfvf_def_resp_tlv);
+	u8 status = PFVF_STATUS_SUCCESS;
+	enum _ecore_status_t rc;
+
+	/* We give the option of starting from qid != 0, in this case we
+	 * need to make sure that qid + num_qs doesn't exceed the actual
+	 * amount of queues that exist.
+	 */
+	rc = ecore_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
+				    req->num_rxqs, req->cqe_completion);
+	if (rc)
+		status = PFVF_STATUS_FAILURE;
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
+			       length, status);
+}
+
+static void ecore_iov_vf_mbx_stop_txqs(struct ecore_hwfn *p_hwfn,
+				       struct ecore_ptt *p_ptt,
+				       struct ecore_vf_info *vf)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct vfpf_stop_txqs_tlv *req = &mbx->req_virt->stop_txqs;
+	u16 length = sizeof(struct pfvf_def_resp_tlv);
+	u8 status = PFVF_STATUS_SUCCESS;
+	enum _ecore_status_t rc;
+
+	/* We give the option of starting from qid != 0, in this case we
+	 * need to make sure that qid + num_qs doesn't exceed the actual
+	 * amount of queues that exist.
+	 */
+	rc = ecore_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
+	if (rc)
+		status = PFVF_STATUS_FAILURE;
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
+			       length, status);
+}
+
+static void ecore_iov_vf_mbx_update_rxqs(struct ecore_hwfn *p_hwfn,
+					 struct ecore_ptt *p_ptt,
+					 struct ecore_vf_info *vf)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct vfpf_update_rxq_tlv *req = &mbx->req_virt->update_rxq;
+	u16 length = sizeof(struct pfvf_def_resp_tlv);
+	u8 status = PFVF_STATUS_SUCCESS;
+	u8 complete_event_flg;
+	u8 complete_cqe_flg;
+	enum _ecore_status_t rc;
+	u16 qid;
+	u8 i;
+
+	complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
+	complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
+
+	for (i = 0; i < req->num_rxqs; i++) {
+		qid = req->rx_qid + i;
+
+		if (!vf->vf_queues[qid].rxq_active) {
+			DP_NOTICE(p_hwfn, true,
+				  "VF rx_qid = %d isn`t active!\n", qid);
+			status = PFVF_STATUS_FAILURE;
+			break;
+		}
+
+		rc = ecore_sp_eth_rx_queues_update(p_hwfn,
+						   vf->vf_queues[qid].fw_rx_qid,
+						   1,
+						   complete_cqe_flg,
+						   complete_event_flg,
+						   ECORE_SPQ_MODE_EBLOCK,
+						   OSAL_NULL);
+
+		if (rc) {
+			status = PFVF_STATUS_FAILURE;
+			break;
+		}
+	}
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
+			       length, status);
+}
+
+void *ecore_iov_search_list_tlvs(struct ecore_hwfn *p_hwfn,
+				 void *p_tlvs_list, u16 req_type)
+{
+	struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
+	int len = 0;
+
+	do {
+		if (!p_tlv->length) {
+			DP_NOTICE(p_hwfn, true, "Zero length TLV found\n");
+			return OSAL_NULL;
+		}
+
+		if (p_tlv->type == req_type) {
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "Extended tlv type %s, length %d found\n",
+				   ecore_channel_tlvs_string[p_tlv->type],
+				   p_tlv->length);
+			return p_tlv;
+		}
+
+		len += p_tlv->length;
+		p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
+
+		if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
+			DP_NOTICE(p_hwfn, true,
+				  "TLVs has overrun the buffer size\n");
+			return OSAL_NULL;
+		}
+	} while (p_tlv->type != CHANNEL_TLV_LIST_END);
+
+	return OSAL_NULL;
+}
+
+static void
+ecore_iov_vp_update_act_param(struct ecore_hwfn *p_hwfn,
+			      struct ecore_sp_vport_update_params *p_data,
+			      struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
+{
+	struct vfpf_vport_update_activate_tlv *p_act_tlv;
+	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
+
+	p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
+	    ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
+	if (p_act_tlv) {
+		p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
+		p_data->vport_active_rx_flg = p_act_tlv->active_rx;
+		p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
+		p_data->vport_active_tx_flg = p_act_tlv->active_tx;
+		*tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACTIVATE;
+	}
+}
+
+static void
+ecore_iov_vp_update_vlan_param(struct ecore_hwfn *p_hwfn,
+			       struct ecore_sp_vport_update_params *p_data,
+			       struct ecore_vf_info *p_vf,
+			       struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
+{
+	struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
+	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
+
+	p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
+	    ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
+	if (!p_vlan_tlv)
+		return;
+
+	p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
+
+	/* Ignore the VF request if we're forcing a vlan */
+	if (!(p_vf->configured_features & (1 << VLAN_ADDR_FORCED))) {
+		p_data->update_inner_vlan_removal_flg = 1;
+		p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
+	}
+
+	*tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_VLAN_STRIP;
+}
+
+static void
+ecore_iov_vp_update_tx_switch(struct ecore_hwfn *p_hwfn,
+			      struct ecore_sp_vport_update_params *p_data,
+			      struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
+{
+	struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
+	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
+
+	p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
+	    ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
+
+#ifndef ASIC_ONLY
+	if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) {
+		DP_NOTICE(p_hwfn, false,
+			  "FPGA: Ignore tx-switching configuration originating from VFs\n");
+		return;
+	}
+#endif
+
+	if (p_tx_switch_tlv) {
+		p_data->update_tx_switching_flg = 1;
+		p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
+		*tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_TX_SWITCH;
+	}
+}
+
+static void
+ecore_iov_vp_update_mcast_bin_param(struct ecore_hwfn *p_hwfn,
+				    struct ecore_sp_vport_update_params *p_data,
+				    struct ecore_iov_vf_mbx *p_mbx,
+				    u16 *tlvs_mask)
+{
+	struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
+	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
+
+	p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
+	    ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
+
+	if (p_mcast_tlv) {
+		p_data->update_approx_mcast_flg = 1;
+		OSAL_MEMCPY(p_data->bins, p_mcast_tlv->bins,
+			    sizeof(unsigned long) *
+			    ETH_MULTICAST_MAC_BINS_IN_REGS);
+		*tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_MCAST;
+	}
+}
+
+static void
+ecore_iov_vp_update_accept_flag(struct ecore_hwfn *p_hwfn,
+				struct ecore_sp_vport_update_params *p_data,
+				struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
+{
+	struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
+	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
+
+	p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
+	    ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
+
+	if (p_accept_tlv) {
+		p_data->accept_flags.update_rx_mode_config =
+		    p_accept_tlv->update_rx_mode;
+		p_data->accept_flags.rx_accept_filter =
+		    p_accept_tlv->rx_accept_filter;
+		p_data->accept_flags.update_tx_mode_config =
+		    p_accept_tlv->update_tx_mode;
+		p_data->accept_flags.tx_accept_filter =
+		    p_accept_tlv->tx_accept_filter;
+		*tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACCEPT_PARAM;
+	}
+}
+
+static void
+ecore_iov_vp_update_accept_any_vlan(struct ecore_hwfn *p_hwfn,
+				    struct ecore_sp_vport_update_params *p_data,
+				    struct ecore_iov_vf_mbx *p_mbx,
+				    u16 *tlvs_mask)
+{
+	struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
+	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
+
+	p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
+	    ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
+
+	if (p_accept_any_vlan) {
+		p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
+		p_data->update_accept_any_vlan_flg =
+		    p_accept_any_vlan->update_accept_any_vlan_flg;
+		*tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
+	}
+}
+
+static void
+ecore_iov_vp_update_rss_param(struct ecore_hwfn *p_hwfn,
+			      struct ecore_vf_info *vf,
+			      struct ecore_sp_vport_update_params *p_data,
+			      struct ecore_rss_params *p_rss,
+			      struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
+{
+	struct vfpf_vport_update_rss_tlv *p_rss_tlv;
+	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
+	u16 table_size;
+	u16 i, q_idx, max_q_idx;
+
+	p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
+	    ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
+	if (p_rss_tlv) {
+		OSAL_MEMSET(p_rss, 0, sizeof(struct ecore_rss_params));
+
+		p_rss->update_rss_config =
+		    !!(p_rss_tlv->update_rss_flags &
+			VFPF_UPDATE_RSS_CONFIG_FLAG);
+		p_rss->update_rss_capabilities =
+		    !!(p_rss_tlv->update_rss_flags &
+			VFPF_UPDATE_RSS_CAPS_FLAG);
+		p_rss->update_rss_ind_table =
+		    !!(p_rss_tlv->update_rss_flags &
+			VFPF_UPDATE_RSS_IND_TABLE_FLAG);
+		p_rss->update_rss_key =
+		    !!(p_rss_tlv->update_rss_flags & VFPF_UPDATE_RSS_KEY_FLAG);
+
+		p_rss->rss_enable = p_rss_tlv->rss_enable;
+		p_rss->rss_eng_id = vf->relative_vf_id + 1;
+		p_rss->rss_caps = p_rss_tlv->rss_caps;
+		p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
+		OSAL_MEMCPY(p_rss->rss_ind_table, p_rss_tlv->rss_ind_table,
+			    sizeof(p_rss->rss_ind_table));
+		OSAL_MEMCPY(p_rss->rss_key, p_rss_tlv->rss_key,
+			    sizeof(p_rss->rss_key));
+
+		table_size = OSAL_MIN_T(u16,
+					OSAL_ARRAY_SIZE(p_rss->rss_ind_table),
+					(1 << p_rss_tlv->rss_table_size_log));
+
+		max_q_idx = OSAL_ARRAY_SIZE(vf->vf_queues);
+
+		for (i = 0; i < table_size; i++) {
+			q_idx = p_rss->rss_ind_table[i];
+			if (q_idx >= max_q_idx) {
+				DP_NOTICE(p_hwfn, true,
+					  "rss_ind_table[%d] = %d, rxq is out of range\n",
+					  i, q_idx);
+				/* TBD: fail the request mark VF as malicious */
+				p_rss->rss_ind_table[i] =
+				    vf->vf_queues[0].fw_rx_qid;
+			} else if (!vf->vf_queues[q_idx].rxq_active) {
+				DP_NOTICE(p_hwfn, true,
+					  "rss_ind_table[%d] = %d, rxq is not active\n",
+					  i, q_idx);
+				/* TBD: fail the request mark VF as malicious */
+				p_rss->rss_ind_table[i] =
+				    vf->vf_queues[0].fw_rx_qid;
+			} else {
+				p_rss->rss_ind_table[i] =
+				    vf->vf_queues[q_idx].fw_rx_qid;
+			}
+		}
+
+		p_data->rss_params = p_rss;
+		*tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_RSS;
+	} else {
+		p_data->rss_params = OSAL_NULL;
+	}
+}
+
+static void
+ecore_iov_vp_update_sge_tpa_param(struct ecore_hwfn *p_hwfn,
+				  struct ecore_vf_info *vf,
+				  struct ecore_sp_vport_update_params *p_data,
+				  struct ecore_sge_tpa_params *p_sge_tpa,
+				  struct ecore_iov_vf_mbx *p_mbx,
+				  u16 *tlvs_mask)
+{
+	struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
+	u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
+
+	p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
+	    ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
+
+	if (!p_sge_tpa_tlv) {
+		p_data->sge_tpa_params = OSAL_NULL;
+		return;
+	}
+
+	OSAL_MEMSET(p_sge_tpa, 0, sizeof(struct ecore_sge_tpa_params));
+
+	p_sge_tpa->update_tpa_en_flg =
+	    !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
+	p_sge_tpa->update_tpa_param_flg =
+	    !!(p_sge_tpa_tlv->update_sge_tpa_flags &
+		VFPF_UPDATE_TPA_PARAM_FLAG);
+
+	p_sge_tpa->tpa_ipv4_en_flg =
+	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
+	p_sge_tpa->tpa_ipv6_en_flg =
+	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
+	p_sge_tpa->tpa_pkt_split_flg =
+	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
+	p_sge_tpa->tpa_hdr_data_split_flg =
+	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
+	p_sge_tpa->tpa_gro_consistent_flg =
+	    !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
+
+	p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
+	p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
+	p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
+	p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
+	p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
+
+	p_data->sge_tpa_params = p_sge_tpa;
+
+	*tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_SGE_TPA;
+}
+
+static void ecore_iov_vf_mbx_vport_update(struct ecore_hwfn *p_hwfn,
+					  struct ecore_ptt *p_ptt,
+					  struct ecore_vf_info *vf)
+{
+	struct ecore_sp_vport_update_params params;
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct ecore_sge_tpa_params sge_tpa_params;
+	struct ecore_rss_params rss_params;
+	u8 status = PFVF_STATUS_SUCCESS;
+	enum _ecore_status_t rc;
+	u16 tlvs_mask = 0, tlvs_accepted;
+	u16 length;
+
+	OSAL_MEMSET(&params, 0, sizeof(params));
+	params.opaque_fid = vf->opaque_fid;
+	params.vport_id = vf->vport_id;
+	params.rss_params = OSAL_NULL;
+
+	/* Search for extended tlvs list and update values
+	 * from VF in struct ecore_sp_vport_update_params.
+	 */
+	ecore_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
+	ecore_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
+	ecore_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
+	ecore_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
+	ecore_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
+	ecore_iov_vp_update_rss_param(p_hwfn, vf, &params, &rss_params,
+				      mbx, &tlvs_mask);
+	ecore_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
+	ecore_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
+					  &sge_tpa_params, mbx, &tlvs_mask);
+
+	/* Just log a message if there is no single extended tlv in buffer.
+	 * When all features of vport update ramrod would be requested by VF
+	 * as extended TLVs in buffer then an error can be returned in response
+	 * if there is no extended TLV present in buffer.
+	 */
+	tlvs_accepted = tlvs_mask;
+
+#ifndef __EXTRACT__LINUX__
+	if (OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vf->relative_vf_id,
+				     &params, &tlvs_accepted) !=
+	    ECORE_SUCCESS) {
+		tlvs_accepted = 0;
+		status = PFVF_STATUS_NOT_SUPPORTED;
+		goto out;
+	}
+#endif
+
+	if (!tlvs_accepted) {
+		if (tlvs_mask)
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "Upper-layer prevents said VF configuration\n");
+		else
+			DP_NOTICE(p_hwfn, true,
+				  "No feature tlvs found for vport update\n");
+		status = PFVF_STATUS_NOT_SUPPORTED;
+		goto out;
+	}
+
+	rc = ecore_sp_vport_update(p_hwfn, &params, ECORE_SPQ_MODE_EBLOCK,
+				   OSAL_NULL);
+
+	if (rc)
+		status = PFVF_STATUS_FAILURE;
+
+out:
+	length = ecore_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
+						    tlvs_mask, tlvs_accepted);
+	ecore_iov_send_response(p_hwfn, p_ptt, vf, length, status);
+}
+
+static enum _ecore_status_t
+ecore_iov_vf_update_unicast_shadow(struct ecore_hwfn *p_hwfn,
+				   struct ecore_vf_info *p_vf,
+				   struct ecore_filter_ucast *p_params)
+{
+	int i;
+
+	/* TODO - do we need a MAC shadow registery? */
+	if (p_params->type == ECORE_FILTER_MAC)
+		return ECORE_SUCCESS;
+
+	/* First remove entries and then add new ones */
+	if (p_params->opcode == ECORE_FILTER_REMOVE) {
+		for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
+			if (p_vf->shadow_config.vlans[i].used &&
+			    p_vf->shadow_config.vlans[i].vid ==
+			    p_params->vlan) {
+				p_vf->shadow_config.vlans[i].used = false;
+				break;
+			}
+		if (i == ECORE_ETH_VF_NUM_VLAN_FILTERS + 1) {
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VF [%d] - Tries to remove a non-existing vlan\n",
+				   p_vf->relative_vf_id);
+			return ECORE_INVAL;
+		}
+	} else if (p_params->opcode == ECORE_FILTER_REPLACE ||
+		   p_params->opcode == ECORE_FILTER_FLUSH) {
+		for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
+			p_vf->shadow_config.vlans[i].used = false;
+	}
+
+	/* In forced mode, we're willing to remove entries - but we don't add
+	 * new ones.
+	 */
+	if (p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED))
+		return ECORE_SUCCESS;
+
+	if (p_params->opcode == ECORE_FILTER_ADD ||
+	    p_params->opcode == ECORE_FILTER_REPLACE) {
+		for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
+			if (!p_vf->shadow_config.vlans[i].used) {
+				p_vf->shadow_config.vlans[i].used = true;
+				p_vf->shadow_config.vlans[i].vid =
+				    p_params->vlan;
+				break;
+			}
+		if (i == ECORE_ETH_VF_NUM_VLAN_FILTERS + 1) {
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VF [%d] - Tries to configure more than %d vlan filters\n",
+				   p_vf->relative_vf_id,
+				   ECORE_ETH_VF_NUM_VLAN_FILTERS + 1);
+			return ECORE_INVAL;
+		}
+	}
+
+	return ECORE_SUCCESS;
+}
+
+static void ecore_iov_vf_mbx_ucast_filter(struct ecore_hwfn *p_hwfn,
+					  struct ecore_ptt *p_ptt,
+					  struct ecore_vf_info *vf)
+{
+	struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
+	struct vfpf_ucast_filter_tlv *req = &mbx->req_virt->ucast_filter;
+	struct ecore_bulletin_content *p_bulletin = vf->bulletin.p_virt;
+	struct ecore_filter_ucast params;
+	u8 status = PFVF_STATUS_SUCCESS;
+	enum _ecore_status_t rc;
+
+	/* Prepare the unicast filter params */
+	OSAL_MEMSET(&params, 0, sizeof(struct ecore_filter_ucast));
+	params.opcode = (enum ecore_filter_opcode)req->opcode;
+	params.type = (enum ecore_filter_ucast_type)req->type;
+
+	/* @@@TBD - We might need logic on HV side in determining this */
+	params.is_rx_filter = 1;
+	params.is_tx_filter = 1;
+	params.vport_to_remove_from = vf->vport_id;
+	params.vport_to_add_to = vf->vport_id;
+	OSAL_MEMCPY(params.mac, req->mac, ETH_ALEN);
+	params.vlan = req->vlan;
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
+		   vf->abs_vf_id, params.opcode, params.type,
+		   params.is_rx_filter ? "RX" : "",
+		   params.is_tx_filter ? "TX" : "",
+		   params.vport_to_add_to,
+		   params.mac[0], params.mac[1], params.mac[2],
+		   params.mac[3], params.mac[4], params.mac[5], params.vlan);
+
+	if (!vf->vport_instance) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
+			   vf->abs_vf_id);
+		status = PFVF_STATUS_FAILURE;
+		goto out;
+	}
+
+	/* Update shadow copy of the VF configuration */
+	if (ecore_iov_vf_update_unicast_shadow(p_hwfn, vf, &params) !=
+	    ECORE_SUCCESS) {
+		status = PFVF_STATUS_FAILURE;
+		goto out;
+	}
+
+	/* Determine if the unicast filtering is acceptible by PF */
+	if ((p_bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)) &&
+	    (params.type == ECORE_FILTER_VLAN ||
+	     params.type == ECORE_FILTER_MAC_VLAN)) {
+		/* Once VLAN is forced or PVID is set, do not allow
+		 * to add/replace any further VLANs.
+		 */
+		if (params.opcode == ECORE_FILTER_ADD ||
+		    params.opcode == ECORE_FILTER_REPLACE)
+			status = PFVF_STATUS_FORCED;
+		goto out;
+	}
+
+	if ((p_bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) &&
+	    (params.type == ECORE_FILTER_MAC ||
+	     params.type == ECORE_FILTER_MAC_VLAN)) {
+		if (OSAL_MEMCMP(p_bulletin->mac, params.mac, ETH_ALEN) ||
+		    (params.opcode != ECORE_FILTER_ADD &&
+		     params.opcode != ECORE_FILTER_REPLACE))
+			status = PFVF_STATUS_FORCED;
+		goto out;
+	}
+
+	rc = OSAL_IOV_CHK_UCAST(p_hwfn, vf->relative_vf_id, &params);
+	if (rc == ECORE_EXISTS) {
+		goto out;
+	} else if (rc == ECORE_INVAL) {
+		status = PFVF_STATUS_FAILURE;
+		goto out;
+	}
+
+	rc = ecore_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
+				       ECORE_SPQ_MODE_CB, OSAL_NULL);
+	if (rc)
+		status = PFVF_STATUS_FAILURE;
+
+out:
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
+			       sizeof(struct pfvf_def_resp_tlv), status);
+}
+
+static void ecore_iov_vf_mbx_int_cleanup(struct ecore_hwfn *p_hwfn,
+					 struct ecore_ptt *p_ptt,
+					 struct ecore_vf_info *vf)
+{
+	int i;
+
+	/* Reset the SBs */
+	for (i = 0; i < vf->num_sbs; i++)
+		ecore_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
+						  vf->igu_sbs[i],
+						  vf->opaque_fid, false);
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
+			       sizeof(struct pfvf_def_resp_tlv),
+			       PFVF_STATUS_SUCCESS);
+}
+
+static void ecore_iov_vf_mbx_close(struct ecore_hwfn *p_hwfn,
+				   struct ecore_ptt *p_ptt,
+				   struct ecore_vf_info *vf)
+{
+	u16 length = sizeof(struct pfvf_def_resp_tlv);
+	u8 status = PFVF_STATUS_SUCCESS;
+
+	/* Disable Interrupts for VF */
+	ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0 /* disable */);
+
+	/* Reset Permission table */
+	ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, 0 /* disable */);
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
+			       length, status);
+}
+
+static void ecore_iov_vf_mbx_release(struct ecore_hwfn *p_hwfn,
+				     struct ecore_ptt *p_ptt,
+				     struct ecore_vf_info *p_vf)
+{
+	u16 length = sizeof(struct pfvf_def_resp_tlv);
+
+	ecore_iov_vf_cleanup(p_hwfn, p_vf);
+
+	ecore_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
+			       length, PFVF_STATUS_SUCCESS);
+}
+
+static enum _ecore_status_t
+ecore_iov_vf_flr_poll_dorq(struct ecore_hwfn *p_hwfn,
+			   struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)
+{
+	int cnt;
+	u32 val;
+
+	ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_vf->concrete_fid);
+
+	for (cnt = 0; cnt < 50; cnt++) {
+		val = ecore_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
+		if (!val)
+			break;
+		OSAL_MSLEEP(20);
+	}
+	ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
+
+	if (cnt == 50) {
+		DP_ERR(p_hwfn,
+		       "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
+		       p_vf->abs_vf_id, val);
+		return ECORE_TIMEOUT;
+	}
+
+	return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_iov_vf_flr_poll_pbf(struct ecore_hwfn *p_hwfn,
+			  struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)
+{
+	u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
+	int i, cnt;
+
+	/* Read initial consumers & producers */
+	for (i = 0; i < MAX_NUM_VOQS; i++) {
+		u32 prod;
+
+		cons[i] = ecore_rd(p_hwfn, p_ptt,
+				   PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
+				   i * 0x40);
+		prod = ecore_rd(p_hwfn, p_ptt,
+				PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
+				i * 0x40);
+		distance[i] = prod - cons[i];
+	}
+
+	/* Wait for consumers to pass the producers */
+	i = 0;
+	for (cnt = 0; cnt < 50; cnt++) {
+		for (; i < MAX_NUM_VOQS; i++) {
+			u32 tmp;
+
+			tmp = ecore_rd(p_hwfn, p_ptt,
+				       PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
+				       i * 0x40);
+			if (distance[i] > tmp - cons[i])
+				break;
+		}
+
+		if (i == MAX_NUM_VOQS)
+			break;
+
+		OSAL_MSLEEP(20);
+	}
+
+	if (cnt == 50) {
+		DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
+		       p_vf->abs_vf_id, i);
+		return ECORE_TIMEOUT;
+	}
+
+	return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_iov_vf_flr_poll_prs(struct ecore_hwfn *p_hwfn,
+			  struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)
+{
+	u16 tc_cons[NUM_OF_TCS], tc_lb_cons[NUM_OF_TCS];
+	u16 prod[NUM_OF_TCS];
+	int i, cnt;
+
+	/* Read initial consumers & producers */
+	for (i = 0; i < NUM_OF_TCS; i++) {
+		tc_cons[i] = (u16)ecore_rd(p_hwfn, p_ptt,
+					   PRS_REG_MSG_CT_MAIN_0 + i * 0x4);
+		tc_lb_cons[i] = (u16)ecore_rd(p_hwfn, p_ptt,
+					      PRS_REG_MSG_CT_LB_0 + i * 0x4);
+		prod[i] = (u16)ecore_rd(p_hwfn, p_ptt,
+					BRB_REG_PER_TC_COUNTERS +
+					p_hwfn->port_id * 0x20 + i * 0x4);
+	}
+
+	/* Wait for consumers to pass the producers */
+	i = 0;
+	for (cnt = 0; cnt < 50; cnt++) {
+		for (; i < NUM_OF_TCS; i++) {
+			u16 cons;
+
+			cons = (u16)ecore_rd(p_hwfn, p_ptt,
+					     PRS_REG_MSG_CT_MAIN_0 + i * 0x4);
+			if (prod[i] - tc_cons[i] > cons - tc_cons[i])
+				break;
+
+			cons = (u16)ecore_rd(p_hwfn, p_ptt,
+					     PRS_REG_MSG_CT_LB_0 + i * 0x4);
+			if (prod[i] - tc_lb_cons[i] > cons - tc_lb_cons[i])
+				break;
+		}
+
+		if (i == NUM_OF_TCS)
+			break;
+
+		/* 16-bit counters; Delay instead of sleep... */
+		OSAL_UDELAY(10);
+	}
+
+	/* This is only optional polling for BB, since registers are only
+	 * 16-bit wide and guarantee is not good enough. Don't fail things
+	 * if polling didn't return the expected results.
+	 */
+	if (cnt == 50)
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "VF[%d] - prs polling failed on TC %d\n",
+			   p_vf->abs_vf_id, i);
+
+	return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t ecore_iov_vf_flr_poll(struct ecore_hwfn *p_hwfn,
+						  struct ecore_vf_info *p_vf,
+						  struct ecore_ptt *p_ptt)
+{
+	enum _ecore_status_t rc;
+
+	/* TODO - add SRC and TM polling once we add storage IOV */
+
+	rc = ecore_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
+	if (rc)
+		return rc;
+
+	rc = ecore_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
+	if (rc)
+		return rc;
+
+	rc = ecore_iov_vf_flr_poll_prs(p_hwfn, p_vf, p_ptt);
+	if (rc)
+		return rc;
+
+	return ECORE_SUCCESS;
+}
+
+static enum _ecore_status_t
+ecore_iov_execute_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
+				 struct ecore_ptt *p_ptt,
+				 u16 rel_vf_id, u32 *ack_vfs)
+{
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
+	if (!p_vf)
+		return ECORE_SUCCESS;
+
+	if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
+	    (1ULL << (rel_vf_id % 64))) {
+		u16 vfid = p_vf->abs_vf_id;
+
+		/* TODO - should we lock channel? */
+
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "VF[%d] - Handling FLR\n", vfid);
+
+		ecore_iov_vf_cleanup(p_hwfn, p_vf);
+
+		/* If VF isn't active, no need for anything but SW */
+		if (!ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, p_vf->relative_vf_id))
+			goto cleanup;
+
+		/* TODO - what to do in case of failure? */
+		rc = ecore_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
+		if (rc != ECORE_SUCCESS)
+			goto cleanup;
+
+		rc = ecore_final_cleanup(p_hwfn, p_ptt, vfid, true);
+		if (rc) {
+			/* TODO - what's now? What a mess.... */
+			DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
+			return rc;
+		}
+
+		/* VF_STOPPED has to be set only after final cleanup
+		 * but prior to re-enabling the VF.
+		 */
+		p_vf->state = VF_STOPPED;
+
+		rc = ecore_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
+		if (rc) {
+			/* TODO - again, a mess... */
+			DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
+			       vfid);
+			return rc;
+		}
+cleanup:
+		/* Mark VF for ack and clean pending state */
+		if (p_vf->state == VF_RESET)
+			p_vf->state = VF_STOPPED;
+		ack_vfs[vfid / 32] |= (1 << (vfid % 32));
+		p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
+		    ~(1ULL << (rel_vf_id % 64));
+		p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
+		    ~(1ULL << (rel_vf_id % 64));
+	}
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_iov_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
+					      struct ecore_ptt *p_ptt)
+{
+	u32 ack_vfs[VF_MAX_STATIC / 32];
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+	u16 i;
+
+	OSAL_MEMSET(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
+
+	for (i = 0; i < p_hwfn->p_dev->sriov_info.total_vfs; i++)
+		ecore_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
+
+	rc = ecore_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
+	return rc;
+}
+
+enum _ecore_status_t
+ecore_iov_single_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
+				struct ecore_ptt *p_ptt, u16 rel_vf_id)
+{
+	u32 ack_vfs[VF_MAX_STATIC / 32];
+	enum _ecore_status_t rc = ECORE_SUCCESS;
+
+	OSAL_MEMSET(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
+
+	ecore_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, rel_vf_id, ack_vfs);
+
+	rc = ecore_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
+	return rc;
+}
+
+int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *p_disabled_vfs)
+{
+	u16 i, found = 0;
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "Marking FLR-ed VFs\n");
+	for (i = 0; i < (VF_MAX_STATIC / 32); i++)
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "[%08x,...,%08x]: %08x\n",
+			   i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
+
+	/* Mark VFs */
+	for (i = 0; i < p_hwfn->p_dev->sriov_info.total_vfs; i++) {
+		struct ecore_vf_info *p_vf;
+		u8 vfid;
+
+		p_vf = ecore_iov_get_vf_info(p_hwfn, i, false);
+		if (!p_vf)
+			continue;
+
+		vfid = p_vf->abs_vf_id;
+		if ((1 << (vfid % 32)) & p_disabled_vfs[vfid / 32]) {
+			u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
+			u16 rel_vf_id = p_vf->relative_vf_id;
+
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VF[%d] [rel %d] got FLR-ed\n",
+				   vfid, rel_vf_id);
+
+			p_vf->state = VF_RESET;
+
+			/* No need to lock here, since pending_flr should
+			 * only change here and before ACKing MFw. Since
+			 * MFW will not trigger an additional attention for
+			 * VF flr until ACKs, we're safe.
+			 */
+			p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
+			found = 1;
+		}
+	}
+
+	return found;
+}
+
+void ecore_iov_set_link(struct ecore_hwfn *p_hwfn,
+			u16 vfid,
+			struct ecore_mcp_link_params *params,
+			struct ecore_mcp_link_state *link,
+			struct ecore_mcp_link_capabilities *p_caps)
+{
+	struct ecore_vf_info *p_vf = ecore_iov_get_vf_info(p_hwfn, vfid, false);
+	struct ecore_bulletin_content *p_bulletin;
+
+	if (!p_vf)
+		return;
+
+	p_bulletin = p_vf->bulletin.p_virt;
+	p_bulletin->req_autoneg = params->speed.autoneg;
+	p_bulletin->req_adv_speed = params->speed.advertised_speeds;
+	p_bulletin->req_forced_speed = params->speed.forced_speed;
+	p_bulletin->req_autoneg_pause = params->pause.autoneg;
+	p_bulletin->req_forced_rx = params->pause.forced_rx;
+	p_bulletin->req_forced_tx = params->pause.forced_tx;
+	p_bulletin->req_loopback = params->loopback_mode;
+
+	p_bulletin->link_up = link->link_up;
+	p_bulletin->speed = link->speed;
+	p_bulletin->full_duplex = link->full_duplex;
+	p_bulletin->autoneg = link->an;
+	p_bulletin->autoneg_complete = link->an_complete;
+	p_bulletin->parallel_detection = link->parallel_detection;
+	p_bulletin->pfc_enabled = link->pfc_enabled;
+	p_bulletin->partner_adv_speed = link->partner_adv_speed;
+	p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
+	p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
+	p_bulletin->partner_adv_pause = link->partner_adv_pause;
+	p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
+
+	p_bulletin->capability_speed = p_caps->speed_capabilities;
+}
+
+void ecore_iov_get_link(struct ecore_hwfn *p_hwfn,
+			u16 vfid,
+			struct ecore_mcp_link_params *p_params,
+			struct ecore_mcp_link_state *p_link,
+			struct ecore_mcp_link_capabilities *p_caps)
+{
+	struct ecore_vf_info *p_vf = ecore_iov_get_vf_info(p_hwfn, vfid, false);
+	struct ecore_bulletin_content *p_bulletin;
+
+	if (!p_vf)
+		return;
+
+	p_bulletin = p_vf->bulletin.p_virt;
+
+	if (p_params)
+		__ecore_vf_get_link_params(p_hwfn, p_params, p_bulletin);
+	if (p_link)
+		__ecore_vf_get_link_state(p_hwfn, p_link, p_bulletin);
+	if (p_caps)
+		__ecore_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
+}
+
+void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
+			       struct ecore_ptt *p_ptt, int vfid)
+{
+	struct ecore_iov_vf_mbx *mbx;
+	struct ecore_vf_info *p_vf;
+	int i;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!p_vf)
+		return;
+
+	mbx = &p_vf->vf_mbx;
+
+	/* ecore_iov_process_mbx_request */
+	DP_VERBOSE(p_hwfn,
+		   ECORE_MSG_IOV,
+		   "ecore_iov_process_mbx_req vfid %d\n", p_vf->abs_vf_id);
+
+	mbx->first_tlv = mbx->req_virt->first_tlv;
+
+	/* check if tlv type is known */
+	if (ecore_iov_tlv_supported(mbx->first_tlv.tl.type)) {
+		/* Lock the per vf op mutex and note the locker's identity.
+		 * The unlock will take place in mbx response.
+		 */
+		ecore_iov_lock_vf_pf_channel(p_hwfn,
+					     p_vf, mbx->first_tlv.tl.type);
+
+		/* switch on the opcode */
+		switch (mbx->first_tlv.tl.type) {
+		case CHANNEL_TLV_ACQUIRE:
+			ecore_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_VPORT_START:
+			ecore_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_VPORT_TEARDOWN:
+			ecore_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_START_RXQ:
+			ecore_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_START_TXQ:
+			ecore_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_STOP_RXQS:
+			ecore_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_STOP_TXQS:
+			ecore_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_UPDATE_RXQ:
+			ecore_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_VPORT_UPDATE:
+			ecore_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_UCAST_FILTER:
+			ecore_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_CLOSE:
+			ecore_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_INT_CLEANUP:
+			ecore_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
+			break;
+		case CHANNEL_TLV_RELEASE:
+			ecore_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
+			break;
+		}
+
+		ecore_iov_unlock_vf_pf_channel(p_hwfn,
+					       p_vf, mbx->first_tlv.tl.type);
+
+	} else {
+		/* unknown TLV - this may belong to a VF driver from the future
+		 * - a version written after this PF driver was written, which
+		 * supports features unknown as of yet. Too bad since we don't
+		 * support them. Or this may be because someone wrote a crappy
+		 * VF driver and is sending garbage over the channel.
+		 */
+		DP_ERR(p_hwfn,
+		       "unknown TLV. type %d length %d. first 20 bytes of mailbox buffer:\n",
+		       mbx->first_tlv.tl.type, mbx->first_tlv.tl.length);
+
+		for (i = 0; i < 20; i++) {
+			DP_VERBOSE(p_hwfn,
+				   ECORE_MSG_IOV,
+				   "%x ",
+				   mbx->req_virt->tlv_buf_size.tlv_buffer[i]);
+		}
+
+		/* test whether we can respond to the VF (do we have an address
+		 * for it?)
+		 */
+		if (p_vf->state == VF_ACQUIRED)
+			DP_ERR(p_hwfn, "UNKNOWN TLV Not supported yet\n");
+	}
+
+#ifdef CONFIG_ECORE_SW_CHANNEL
+	mbx->sw_mbx.mbx_state = VF_PF_RESPONSE_READY;
+	mbx->sw_mbx.response_offset = 0;
+#endif
+}
+
+static enum _ecore_status_t ecore_sriov_vfpf_msg(struct ecore_hwfn *p_hwfn,
+						 __le16 vfid,
+						 struct regpair *vf_msg)
+{
+	struct ecore_vf_info *p_vf;
+	u8 min, max;
+
+	if (!p_hwfn->pf_iov_info || !p_hwfn->pf_iov_info->vfs_array) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "Got a message from VF while PF is not initialized for IOV support\n");
+		return ECORE_SUCCESS;
+	}
+
+	/* Find the VF record - message comes with realtive [engine] vfid */
+	min = (u8)p_hwfn->hw_info.first_vf_in_pf;
+	max = min + p_hwfn->p_dev->sriov_info.total_vfs;
+	/* @@@TBD - for BE machines, should echo field be reversed? */
+	if ((u8)vfid < min || (u8)vfid >= max) {
+		DP_INFO(p_hwfn,
+			"Got a message from VF with relative id 0x%08x, but PF's range is [0x%02x,...,0x%02x)\n",
+			(u8)vfid, min, max);
+		return ECORE_INVAL;
+	}
+	p_vf = &p_hwfn->pf_iov_info->vfs_array[(u8)vfid - min];
+
+	/* List the physical address of the request so that handler
+	 * could later on copy the message from it.
+	 */
+	p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
+
+	return OSAL_PF_VF_MSG(p_hwfn, p_vf->relative_vf_id);
+}
+
+enum _ecore_status_t ecore_sriov_eqe_event(struct ecore_hwfn *p_hwfn,
+					   u8 opcode,
+					   __le16 echo,
+					   union event_ring_data *data)
+{
+	switch (opcode) {
+	case COMMON_EVENT_VF_PF_CHANNEL:
+		return ecore_sriov_vfpf_msg(p_hwfn, echo,
+					    &data->vf_pf_channel.msg_addr);
+	case COMMON_EVENT_VF_FLR:
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "VF-FLR is still not supported\n");
+		return ECORE_SUCCESS;
+	default:
+		DP_INFO(p_hwfn->p_dev, "Unknown sriov eqe event 0x%02x\n",
+			opcode);
+		return ECORE_INVAL;
+	}
+}
+
+bool ecore_iov_is_vf_pending_flr(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
+{
+	return !!(p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
+		   (1ULL << (rel_vf_id % 64)));
+}
+
+bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn, int rel_vf_id,
+			     bool b_enabled_only)
+{
+	if (!p_hwfn->pf_iov_info) {
+		DP_NOTICE(p_hwfn->p_dev, true, "No iov info\n");
+		return false;
+	}
+
+	return b_enabled_only ? ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, rel_vf_id) :
+	    (rel_vf_id < p_hwfn->p_dev->sriov_info.total_vfs);
+}
+
+struct ecore_public_vf_info *ecore_iov_get_public_vf_info(struct ecore_hwfn
+							  *p_hwfn,
+							  u16 relative_vf_id,
+							  bool b_enabled_only)
+{
+	struct ecore_vf_info *vf = OSAL_NULL;
+
+	vf = ecore_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
+	if (!vf)
+		return OSAL_NULL;
+
+	return &vf->p_vf_info;
+}
+
+void ecore_iov_pf_add_pending_events(struct ecore_hwfn *p_hwfn, u8 vfid)
+{
+	u64 add_bit = 1ULL << (vfid % 64);
+
+	/* TODO - add locking mechanisms [no atomics in ecore, so we can't
+	 * add the lock inside the ecore_pf_iov struct].
+	 */
+	p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
+}
+
+void ecore_iov_pf_get_and_clear_pending_events(struct ecore_hwfn *p_hwfn,
+					       u64 *events)
+{
+	u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
+
+	/* TODO - Take a lock */
+	OSAL_MEMCPY(events, p_pending_events,
+		    sizeof(u64) * ECORE_VF_ARRAY_LENGTH);
+	OSAL_MEMSET(p_pending_events, 0, sizeof(u64) * ECORE_VF_ARRAY_LENGTH);
+}
+
+enum _ecore_status_t ecore_iov_copy_vf_msg(struct ecore_hwfn *p_hwfn,
+					   struct ecore_ptt *ptt, int vfid)
+{
+	struct ecore_dmae_params params;
+	struct ecore_vf_info *vf_info;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info)
+		return ECORE_INVAL;
+
+	OSAL_MEMSET(&params, 0, sizeof(struct ecore_dmae_params));
+	params.flags = ECORE_DMAE_FLAG_VF_SRC | ECORE_DMAE_FLAG_COMPLETION_DST;
+	params.src_vfid = vf_info->abs_vf_id;
+
+	if (ecore_dmae_host2host(p_hwfn, ptt,
+				 vf_info->vf_mbx.pending_req,
+				 vf_info->vf_mbx.req_phys,
+				 sizeof(union vfpf_tlvs) / 4, &params)) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "Failed to copy message from VF 0x%02x\n", vfid);
+
+		return ECORE_IO;
+	}
+
+	return ECORE_SUCCESS;
+}
+
+void ecore_iov_bulletin_set_forced_mac(struct ecore_hwfn *p_hwfn,
+				       u8 *mac, int vfid)
+{
+	struct ecore_vf_info *vf_info;
+	u64 feature;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info) {
+		DP_NOTICE(p_hwfn->p_dev, true,
+			  "Can not set forced MAC, invalid vfid [%d]\n", vfid);
+		return;
+	}
+
+	feature = 1 << MAC_ADDR_FORCED;
+	OSAL_MEMCPY(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
+
+	vf_info->bulletin.p_virt->valid_bitmap |= feature;
+	/* Forced MAC will disable MAC_ADDR */
+	vf_info->bulletin.p_virt->valid_bitmap &=
+	    ~(1 << VFPF_BULLETIN_MAC_ADDR);
+
+	ecore_iov_configure_vport_forced(p_hwfn, vf_info, feature);
+}
+
+enum _ecore_status_t ecore_iov_bulletin_set_mac(struct ecore_hwfn *p_hwfn,
+						u8 *mac, int vfid)
+{
+	struct ecore_vf_info *vf_info;
+	u64 feature;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info) {
+		DP_NOTICE(p_hwfn->p_dev, true,
+			  "Can not set MAC, invalid vfid [%d]\n", vfid);
+		return ECORE_INVAL;
+	}
+
+	if (vf_info->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "Can not set MAC, Forced MAC is configured\n");
+		return ECORE_INVAL;
+	}
+
+	feature = 1 << VFPF_BULLETIN_MAC_ADDR;
+	OSAL_MEMCPY(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
+
+	vf_info->bulletin.p_virt->valid_bitmap |= feature;
+
+	return ECORE_SUCCESS;
+}
+
+void ecore_iov_bulletin_set_forced_vlan(struct ecore_hwfn *p_hwfn,
+					u16 pvid, int vfid)
+{
+	struct ecore_vf_info *vf_info;
+	u64 feature;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info) {
+		DP_NOTICE(p_hwfn->p_dev, true,
+			  "Can not set forced MAC, invalid vfid [%d]\n", vfid);
+		return;
+	}
+
+	feature = 1 << VLAN_ADDR_FORCED;
+	vf_info->bulletin.p_virt->pvid = pvid;
+	if (pvid)
+		vf_info->bulletin.p_virt->valid_bitmap |= feature;
+	else
+		vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
+
+	ecore_iov_configure_vport_forced(p_hwfn, vf_info, feature);
+}
+
+enum _ecore_status_t
+ecore_iov_bulletin_set_forced_untagged_default(struct ecore_hwfn *p_hwfn,
+					       bool b_untagged_only, int vfid)
+{
+	struct ecore_vf_info *vf_info;
+	u64 feature;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info) {
+		DP_NOTICE(p_hwfn->p_dev, true,
+			  "Can not set forced MAC, invalid vfid [%d]\n", vfid);
+		return ECORE_INVAL;
+	}
+
+	/* Since this is configurable only during vport-start, don't take it
+	 * if we're past that point.
+	 */
+	if (vf_info->state == VF_ENABLED) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "Can't support untagged change for vfid[%d] - VF is already active\n",
+			   vfid);
+		return ECORE_INVAL;
+	}
+
+	/* Set configuration; This will later be taken into account during the
+	 * VF initialization.
+	 */
+	feature = (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT) |
+	    (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED);
+	vf_info->bulletin.p_virt->valid_bitmap |= feature;
+
+	vf_info->bulletin.p_virt->default_only_untagged = b_untagged_only ? 1
+	    : 0;
+
+	return ECORE_SUCCESS;
+}
+
+void ecore_iov_get_vfs_opaque_fid(struct ecore_hwfn *p_hwfn, int vfid,
+				  u16 *opaque_fid)
+{
+	struct ecore_vf_info *vf_info;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info)
+		return;
+
+	*opaque_fid = vf_info->opaque_fid;
+}
+
+void ecore_iov_get_vfs_vport_id(struct ecore_hwfn *p_hwfn, int vfid,
+				u8 *p_vort_id)
+{
+	struct ecore_vf_info *vf_info;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info)
+		return;
+
+	*p_vort_id = vf_info->vport_id;
+}
+
+bool ecore_iov_vf_has_vport_instance(struct ecore_hwfn *p_hwfn, int vfid)
+{
+	struct ecore_vf_info *p_vf_info;
+
+	p_vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!p_vf_info)
+		return false;
+
+	return !!p_vf_info->vport_instance;
+}
+
+bool ecore_iov_is_vf_stopped(struct ecore_hwfn *p_hwfn, int vfid)
+{
+	struct ecore_vf_info *p_vf_info;
+
+	p_vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+
+	return p_vf_info->state == VF_STOPPED;
+}
+
+bool ecore_iov_spoofchk_get(struct ecore_hwfn *p_hwfn, int vfid)
+{
+	struct ecore_vf_info *vf_info;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info)
+		return false;
+
+	return vf_info->spoof_chk;
+}
+
+bool ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn, int vfid)
+{
+	if (IS_VF(p_hwfn->p_dev) || !IS_ECORE_SRIOV(p_hwfn->p_dev) ||
+	    !IS_PF_SRIOV_ALLOC(p_hwfn) ||
+	    !ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, vfid))
+		return false;
+	else
+		return true;
+}
+
+enum _ecore_status_t ecore_iov_spoofchk_set(struct ecore_hwfn *p_hwfn,
+					    int vfid, bool val)
+{
+	enum _ecore_status_t rc = ECORE_INVAL;
+	struct ecore_vf_info *vf;
+
+	if (!ecore_iov_pf_sanity_check(p_hwfn, vfid)) {
+		DP_NOTICE(p_hwfn, true,
+			  "SR-IOV sanity check failed, can't set spoofchk\n");
+		goto out;
+	}
+
+	vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf)
+		goto out;
+
+	if (!ecore_iov_vf_has_vport_instance(p_hwfn, vfid)) {
+		/* After VF VPORT start PF will configure spoof check */
+		vf->req_spoofchk_val = val;
+		rc = ECORE_SUCCESS;
+		goto out;
+	}
+
+	rc = __ecore_iov_spoofchk_set(p_hwfn, vf, val);
+
+out:
+	return rc;
+}
+
+u8 ecore_iov_vf_chains_per_pf(struct ecore_hwfn *p_hwfn)
+{
+	u8 max_chains_per_vf = p_hwfn->hw_info.max_chains_per_vf;
+
+	max_chains_per_vf = (max_chains_per_vf) ? max_chains_per_vf
+	    : ECORE_MAX_VF_CHAINS_PER_PF;
+
+	return max_chains_per_vf;
+}
+
+void ecore_iov_get_vf_req_virt_mbx_params(struct ecore_hwfn *p_hwfn,
+					  u16 rel_vf_id,
+					  void **pp_req_virt_addr,
+					  u16 *p_req_virt_size)
+{
+	struct ecore_vf_info *vf_info =
+	    ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+
+	if (!vf_info)
+		return;
+
+	if (pp_req_virt_addr)
+		*pp_req_virt_addr = vf_info->vf_mbx.req_virt;
+
+	if (p_req_virt_size)
+		*p_req_virt_size = sizeof(*vf_info->vf_mbx.req_virt);
+}
+
+void ecore_iov_get_vf_reply_virt_mbx_params(struct ecore_hwfn *p_hwfn,
+					    u16 rel_vf_id,
+					    void **pp_reply_virt_addr,
+					    u16 *p_reply_virt_size)
+{
+	struct ecore_vf_info *vf_info =
+	    ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+
+	if (!vf_info)
+		return;
+
+	if (pp_reply_virt_addr)
+		*pp_reply_virt_addr = vf_info->vf_mbx.reply_virt;
+
+	if (p_reply_virt_size)
+		*p_reply_virt_size = sizeof(*vf_info->vf_mbx.reply_virt);
+}
+
+#ifdef CONFIG_ECORE_SW_CHANNEL
+struct ecore_iov_sw_mbx *ecore_iov_get_vf_sw_mbx(struct ecore_hwfn *p_hwfn,
+						 u16 rel_vf_id)
+{
+	struct ecore_vf_info *vf_info =
+	    ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+
+	if (!vf_info)
+		return OSAL_NULL;
+
+	return &vf_info->vf_mbx.sw_mbx;
+}
+#endif
+
+bool ecore_iov_is_valid_vfpf_msg_length(u32 length)
+{
+	return (length >= sizeof(struct vfpf_first_tlv) &&
+		(length <= sizeof(union vfpf_tlvs)));
+}
+
+u32 ecore_iov_pfvf_msg_length(void)
+{
+	return sizeof(union pfvf_tlvs);
+}
+
+u8 *ecore_iov_bulletin_get_forced_mac(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf || !p_vf->bulletin.p_virt)
+		return OSAL_NULL;
+
+	if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)))
+		return OSAL_NULL;
+
+	return p_vf->bulletin.p_virt->mac;
+}
+
+u16 ecore_iov_bulletin_get_forced_vlan(struct ecore_hwfn *p_hwfn,
+				       u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf || !p_vf->bulletin.p_virt)
+		return 0;
+
+	if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
+		return 0;
+
+	return p_vf->bulletin.p_virt->pvid;
+}
+
+enum _ecore_status_t ecore_iov_configure_tx_rate(struct ecore_hwfn *p_hwfn,
+						 struct ecore_ptt *p_ptt,
+						 int vfid, int val)
+{
+	struct ecore_vf_info *vf;
+	enum _ecore_status_t rc;
+	u8 abs_vp_id = 0;
+
+	vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+
+	if (!vf)
+		return ECORE_INVAL;
+
+	rc = ecore_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
+	if (rc != ECORE_SUCCESS)
+		return rc;
+
+	rc = ecore_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev *p_dev,
+						     int vfid, u32 rate)
+{
+	struct ecore_vf_info *vf;
+	enum _ecore_status_t rc;
+	u8 vport_id;
+	int i;
+
+	for_each_hwfn(p_dev, i) {
+		struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
+
+		if (!ecore_iov_pf_sanity_check(p_hwfn, vfid)) {
+			DP_NOTICE(p_hwfn, true,
+				  "SR-IOV sanity check failed, can't set min rate\n");
+			return ECORE_INVAL;
+		}
+	}
+
+	vf = ecore_iov_get_vf_info(ECORE_LEADING_HWFN(p_dev), (u16)vfid, true);
+	vport_id = vf->vport_id;
+
+	rc = ecore_configure_vport_wfq(p_dev, vport_id, rate);
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_iov_get_vf_stats(struct ecore_hwfn *p_hwfn,
+					    struct ecore_ptt *p_ptt,
+					    int vfid,
+					    struct ecore_eth_stats *p_stats)
+{
+	struct ecore_vf_info *vf;
+
+	vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf)
+		return ECORE_INVAL;
+
+	if (vf->state != VF_ENABLED)
+		return ECORE_INVAL;
+
+	__ecore_get_vport_stats(p_hwfn, p_ptt, p_stats,
+				vf->abs_vf_id + 0x10, false);
+
+	return ECORE_SUCCESS;
+}
+
+u8 ecore_iov_get_vf_num_rxqs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf)
+		return 0;
+
+	return p_vf->num_rxqs;
+}
+
+u8 ecore_iov_get_vf_num_active_rxqs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf)
+		return 0;
+
+	return p_vf->num_active_rxqs;
+}
+
+void *ecore_iov_get_vf_ctx(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf)
+		return OSAL_NULL;
+
+	return p_vf->ctx;
+}
+
+u8 ecore_iov_get_vf_num_sbs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf)
+		return 0;
+
+	return p_vf->num_sbs;
+}
+
+bool ecore_iov_is_vf_wait_for_acquire(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf)
+		return false;
+
+	return (p_vf->state == VF_FREE);
+}
+
+bool ecore_iov_is_vf_acquired_not_initialized(struct ecore_hwfn *p_hwfn,
+					      u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf)
+		return false;
+
+	return (p_vf->state == VF_ACQUIRED);
+}
+
+bool ecore_iov_is_vf_initialized(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
+{
+	struct ecore_vf_info *p_vf;
+
+	p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
+	if (!p_vf)
+		return false;
+
+	return (p_vf->state == VF_ENABLED);
+}
+
+int ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, int vfid)
+{
+	struct ecore_wfq_data *vf_vp_wfq;
+	struct ecore_vf_info *vf_info;
+
+	vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
+	if (!vf_info)
+		return 0;
+
+	vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
+
+	if (vf_vp_wfq->configured)
+		return vf_vp_wfq->min_speed;
+	else
+		return 0;
+}
diff --git a/drivers/net/qede/base/ecore_sriov.h b/drivers/net/qede/base/ecore_sriov.h
new file mode 100644
index 0000000..9ddc9aa
--- /dev/null
+++ b/drivers/net/qede/base/ecore_sriov.h
@@ -0,0 +1,390 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#ifndef __ECORE_SRIOV_H__
+#define __ECORE_SRIOV_H__
+
+#include "ecore_status.h"
+#include "ecore_vfpf_if.h"
+#include "ecore_iov_api.h"
+#include "ecore_hsi_common.h"
+
+#define ECORE_ETH_VF_NUM_VLAN_FILTERS 2
+
+#define ECORE_ETH_MAX_VF_NUM_VLAN_FILTERS \
+	(MAX_NUM_VFS * ECORE_ETH_VF_NUM_VLAN_FILTERS)
+
+/* Represents a full message. Both the request filled by VF
+ * and the response filled by the PF. The VF needs one copy
+ * of this message, it fills the request part and sends it to
+ * the PF. The PF will copy the response to the response part for
+ * the VF to later read it. The PF needs to hold a message like this
+ * per VF, the request that is copied to the PF is placed in the
+ * request size, and the response is filled by the PF before sending
+ * it to the VF.
+ */
+struct ecore_vf_mbx_msg {
+	union vfpf_tlvs req;
+	union pfvf_tlvs resp;
+};
+
+/* This data is held in the ecore_hwfn structure for VFs only. */
+struct ecore_vf_iov {
+	union vfpf_tlvs *vf2pf_request;
+	dma_addr_t vf2pf_request_phys;
+	union pfvf_tlvs *pf2vf_reply;
+	dma_addr_t pf2vf_reply_phys;
+
+	/* Should be taken whenever the mailbox buffers are accessed */
+	osal_mutex_t mutex;
+	u8 *offset;
+
+	/* Bulletin Board */
+	struct ecore_bulletin bulletin;
+	struct ecore_bulletin_content bulletin_shadow;
+
+	/* we set aside a copy of the acquire response */
+	struct pfvf_acquire_resp_tlv acquire_resp;
+};
+
+/* This mailbox is maintained per VF in its PF
+ * contains all information required for sending / receiving
+ * a message
+ */
+struct ecore_iov_vf_mbx {
+	union vfpf_tlvs *req_virt;
+	dma_addr_t req_phys;
+	union pfvf_tlvs *reply_virt;
+	dma_addr_t reply_phys;
+
+	/* Address in VF where a pending message is located */
+	dma_addr_t pending_req;
+
+	u8 *offset;
+
+#ifdef CONFIG_ECORE_SW_CHANNEL
+	struct ecore_iov_sw_mbx sw_mbx;
+#endif
+
+	/* VF GPA address */
+	u32 vf_addr_lo;
+	u32 vf_addr_hi;
+
+	struct vfpf_first_tlv first_tlv;	/* saved VF request header */
+
+	u8 flags;
+#define VF_MSG_INPROCESS	0x1	/* failsafe - the FW should prevent
+					 * more then one pending msg
+					 */
+};
+
+struct ecore_vf_q_info {
+	u16 fw_rx_qid;
+	u16 fw_tx_qid;
+	u8 fw_cid;
+	u8 rxq_active;
+	u8 txq_active;
+};
+
+enum int_mod {
+	VPORT_INT_MOD_UNDEFINED = 0,
+	VPORT_INT_MOD_ADAPTIVE = 1,
+	VPORT_INT_MOD_OFF = 2,
+	VPORT_INT_MOD_LOW = 100,
+	VPORT_INT_MOD_MEDIUM = 200,
+	VPORT_INT_MOD_HIGH = 300
+};
+
+enum vf_state {
+	VF_FREE = 0,		/* VF ready to be acquired holds no resc */
+	VF_ACQUIRED = 1,	/* VF, aquired, but not initalized */
+	VF_ENABLED = 2,		/* VF, Enabled */
+	VF_RESET = 3,		/* VF, FLR'd, pending cleanup */
+	VF_STOPPED = 4		/* VF, Stopped */
+};
+
+struct ecore_vf_vlan_shadow {
+	bool used;
+	u16 vid;
+};
+
+struct ecore_vf_shadow_config {
+	/* Shadow copy of all guest vlans */
+	struct ecore_vf_vlan_shadow vlans[ECORE_ETH_VF_NUM_VLAN_FILTERS + 1];
+
+	u8 inner_vlan_removal;
+};
+
+/* PFs maintain an array of this structure, per VF */
+struct ecore_vf_info {
+	struct ecore_iov_vf_mbx vf_mbx;
+	enum vf_state state;
+	u8 to_disable;
+
+	struct ecore_bulletin bulletin;
+	dma_addr_t vf_bulletin;
+
+	u32 concrete_fid;
+	u16 opaque_fid;
+	u16 mtu;
+
+	u8 vport_id;
+	u8 relative_vf_id;
+	u8 abs_vf_id;
+#define ECORE_VF_ABS_ID(p_hwfn, p_vf)	(ECORE_PATH_ID(p_hwfn) ? \
+					 (p_vf)->abs_vf_id + MAX_NUM_VFS_BB : \
+					 (p_vf)->abs_vf_id)
+
+	u8 vport_instance;	/* Number of active vports */
+	u8 num_rxqs;
+	u8 num_txqs;
+
+	u8 num_sbs;
+
+	u8 num_mac_filters;
+	u8 num_vlan_filters;
+	u8 num_mc_filters;
+
+	struct ecore_vf_q_info vf_queues[ECORE_MAX_VF_CHAINS_PER_PF];
+	u16 igu_sbs[ECORE_MAX_VF_CHAINS_PER_PF];
+
+	/* TODO - Only windows is using it - should be removed */
+	u8 was_malicious;
+	u8 num_active_rxqs;
+	void *ctx;
+	struct ecore_public_vf_info p_vf_info;
+	bool spoof_chk;		/* Current configured on HW */
+	bool req_spoofchk_val;	/* Requested value */
+
+	/* Stores the configuration requested by VF */
+	struct ecore_vf_shadow_config shadow_config;
+
+	/* A bitfield using bulletin's valid-map bits, used to indicate
+	 * which of the bulletin board features have been configured.
+	 */
+	u64 configured_features;
+#define ECORE_IOV_CONFIGURED_FEATURES_MASK	((1 << MAC_ADDR_FORCED) | \
+						 (1 << VLAN_ADDR_FORCED))
+};
+
+/* This structure is part of ecore_hwfn and used only for PFs that have sriov
+ * capability enabled.
+ */
+struct ecore_pf_iov {
+	struct ecore_vf_info vfs_array[MAX_NUM_VFS];
+	u64 pending_events[ECORE_VF_ARRAY_LENGTH];
+	u64 pending_flr[ECORE_VF_ARRAY_LENGTH];
+	u16 base_vport_id;
+
+	/* Allocate message address continuosuly and split to each VF */
+	void *mbx_msg_virt_addr;
+	dma_addr_t mbx_msg_phys_addr;
+	u32 mbx_msg_size;
+	void *mbx_reply_virt_addr;
+	dma_addr_t mbx_reply_phys_addr;
+	u32 mbx_reply_size;
+	void *p_bulletins;
+	dma_addr_t bulletins_phys;
+	u32 bulletins_size;
+};
+
+#ifdef CONFIG_ECORE_SRIOV
+/**
+ * @brief Read sriov related information and allocated resources
+ *  reads from configuraiton space, shmem, and allocates the VF
+ *  database in the PF.
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn *p_hwfn,
+				       struct ecore_ptt *p_ptt);
+
+/**
+ * @brief ecore_add_tlv - place a given tlv on the tlv buffer at next offset
+ *
+ * @param p_hwfn
+ * @param p_iov
+ * @param type
+ * @param length
+ *
+ * @return pointer to the newly placed tlv
+ */
+void *ecore_add_tlv(struct ecore_hwfn *p_hwfn,
+		    u8 **offset, u16 type, u16 length);
+
+/**
+ * @brief list the types and lengths of the tlvs on the buffer
+ *
+ * @param p_hwfn
+ * @param tlvs_list
+ */
+void ecore_dp_tlv_list(struct ecore_hwfn *p_hwfn, void *tlvs_list);
+
+/**
+ * @brief ecore_iov_alloc - allocate sriov related resources
+ *
+ * @param p_hwfn
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_iov_alloc(struct ecore_hwfn *p_hwfn);
+
+/**
+ * @brief ecore_iov_setup - setup sriov related resources
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ */
+void ecore_iov_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt);
+
+/**
+ * @brief ecore_iov_free - free sriov related resources
+ *
+ * @param p_hwfn
+ */
+void ecore_iov_free(struct ecore_hwfn *p_hwfn);
+
+/**
+ * @brief ecore_sriov_eqe_event - handle async sriov event arrived on eqe.
+ *
+ * @param p_hwfn
+ * @param opcode
+ * @param echo
+ * @param data
+ */
+enum _ecore_status_t ecore_sriov_eqe_event(struct ecore_hwfn *p_hwfn,
+					   u8 opcode,
+					   __le16 echo,
+					   union event_ring_data *data);
+
+/**
+ * @brief calculate CRC for bulletin board validation
+ *
+ * @param basic crc seed
+ * @param ptr to beginning of buffer
+ * @length in bytes of buffer
+ *
+ * @return calculated crc over buffer [with respect to seed].
+ */
+u32 ecore_crc32(u32 crc, u8 *ptr, u32 length);
+
+/**
+ * @brief Mark structs of vfs that have been FLR-ed.
+ *
+ * @param p_hwfn
+ * @param disabled_vfs - bitmask of all VFs on path that were FLRed
+ *
+ * @return 1 iff one of the PF's vfs got FLRed. 0 otherwise.
+ */
+int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *disabled_vfs);
+
+/**
+ * @brief Search extended TLVs in request/reply buffer.
+ *
+ * @param p_hwfn
+ * @param p_tlvs_list - Pointer to tlvs list
+ * @param req_type - Type of TLV
+ *
+ * @return pointer to tlv type if found, otherwise returns NULL.
+ */
+void *ecore_iov_search_list_tlvs(struct ecore_hwfn *p_hwfn,
+				 void *p_tlvs_list, u16 req_type);
+
+/**
+ * @brief ecore_iov_get_vf_info - return the database of a
+ *        specific VF
+ *
+ * @param p_hwfn
+ * @param relative_vf_id - relative id of the VF for which info
+ *			 is requested
+ * @param b_enabled_only - false iff want to access even if vf is disabled
+ *
+ * @return struct ecore_vf_info*
+ */
+struct ecore_vf_info *ecore_iov_get_vf_info(struct ecore_hwfn *p_hwfn,
+					    u16 relative_vf_id,
+					    bool b_enabled_only);
+#else
+static OSAL_INLINE enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn
+							  *p_hwfn,
+							  struct ecore_ptt
+							  *p_ptt)
+{
+	return ECORE_SUCCESS;
+}
+
+static OSAL_INLINE void *ecore_add_tlv(struct ecore_hwfn *p_hwfn, u8 **offset,
+				       u16 type, u16 length)
+{
+	return OSAL_NULL;
+}
+
+static OSAL_INLINE void ecore_dp_tlv_list(struct ecore_hwfn *p_hwfn,
+					  void *tlvs_list)
+{
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_iov_alloc(struct ecore_hwfn
+							*p_hwfn)
+{
+	return ECORE_SUCCESS;
+}
+
+static OSAL_INLINE void ecore_iov_setup(struct ecore_hwfn *p_hwfn,
+					struct ecore_ptt *p_ptt)
+{
+}
+
+static OSAL_INLINE void ecore_iov_free(struct ecore_hwfn *p_hwfn)
+{
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_sriov_eqe_event(struct ecore_hwfn
+							      *p_hwfn,
+							      u8 opcode,
+							      __le16 echo,
+							      union
+							      event_ring_data
+							      *data)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE u32 ecore_crc32(u32 crc, u8 *ptr, u32 length)
+{
+	return 0;
+}
+
+static OSAL_INLINE int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn,
+					     u32 *disabled_vfs)
+{
+	return 0;
+}
+
+static OSAL_INLINE void *ecore_iov_search_list_tlvs(struct ecore_hwfn *p_hwfn,
+						    void *p_tlvs_list,
+						    u16 req_type)
+{
+	return OSAL_NULL;
+}
+
+static OSAL_INLINE struct ecore_vf_info *ecore_iov_get_vf_info(struct ecore_hwfn
+							       *p_hwfn,
+							       u16
+							       relative_vf_id,
+							       bool
+							       b_enabled_only)
+{
+	return OSAL_NULL;
+}
+
+#endif
+#endif /* __ECORE_SRIOV_H__ */
diff --git a/drivers/net/qede/base/ecore_vf.c b/drivers/net/qede/base/ecore_vf.c
new file mode 100644
index 0000000..a452f3d
--- /dev/null
+++ b/drivers/net/qede/base/ecore_vf.c
@@ -0,0 +1,1322 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#include "bcm_osal.h"
+#include "ecore.h"
+#include "ecore_hsi_eth.h"
+#include "ecore_sriov.h"
+#include "ecore_l2_api.h"
+#include "ecore_vf.h"
+#include "ecore_vfpf_if.h"
+#include "ecore_status.h"
+#include "reg_addr.h"
+#include "ecore_int.h"
+#include "ecore_l2.h"
+#include "ecore_mcp_api.h"
+#include "ecore_vf_api.h"
+
+static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	void *p_tlv;
+
+	/* This lock is released when we receive PF's response
+	 * in ecore_send_msg2pf().
+	 * So, ecore_vf_pf_prep() and ecore_send_msg2pf()
+	 * must come in sequence.
+	 */
+	OSAL_MUTEX_ACQUIRE(&(p_iov->mutex));
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "preparing to send %s tlv over vf pf channel\n",
+		   ecore_channel_tlvs_string[type]);
+
+	/* Reset Requst offset */
+	p_iov->offset = (u8 *)(p_iov->vf2pf_request);
+
+	/* Clear mailbox - both request and reply */
+	OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
+	OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
+
+	/* Init type and length */
+	p_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset, type, length);
+
+	/* Init first tlv header */
+	((struct vfpf_first_tlv *)p_tlv)->reply_address =
+	    (u64)p_iov->pf2vf_reply_phys;
+
+	return p_tlv;
+}
+
+static int ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
+			     u8 *done, u32 resp_size)
+{
+	struct ustorm_vf_zone *zone_data = (struct ustorm_vf_zone *)
+	    ((u8 *)PXP_VF_BAR0_START_USDM_ZONE_B);
+	union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
+	struct ustorm_trigger_vf_zone trigger;
+	int rc = ECORE_SUCCESS, time = 100;
+	u8 pf_id;
+
+	/* output tlvs list */
+	ecore_dp_tlv_list(p_hwfn, p_req);
+
+	/* need to add the END TLV to the message size */
+	resp_size += sizeof(struct channel_list_end_tlv);
+
+	if (!p_hwfn->p_dev->sriov_info.b_hw_channel) {
+		rc = OSAL_VF_SEND_MSG2PF(p_hwfn->p_dev,
+					 done,
+					 p_req,
+					 p_hwfn->vf_iov_info->pf2vf_reply,
+					 sizeof(union vfpf_tlvs), resp_size);
+		/* TODO - no prints about message ? */
+		goto exit;
+	}
+
+	/* Send TLVs over HW channel */
+	OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
+	trigger.vf_pf_msg_valid = 1;
+	/* TODO - FW should remove this requirement */
+	pf_id = GET_FIELD(p_hwfn->hw_info.concrete_fid, PXP_CONCRETE_FID_PFID);
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "VF -> PF [%02x] message: [%08x, %08x] --> %p, %08x --> %p\n",
+		   pf_id,
+		   U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
+		   U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
+		   &zone_data->non_trigger.vf_pf_msg_addr,
+		   *((u32 *)&trigger), &zone_data->trigger);
+
+	REG_WR(p_hwfn,
+	       (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
+	       U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
+
+	REG_WR(p_hwfn,
+	       (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
+	       U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
+
+	/* The message data must be written first, to prevent trigger before
+	 * data is written.
+	 */
+	OSAL_WMB(p_hwfn->p_dev);
+
+	REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
+	       *((u32 *)&trigger));
+
+	while ((!*done) && time) {
+		OSAL_MSLEEP(25);
+		time--;
+	}
+
+	if (!*done) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "VF <-- PF Timeout [Type %d]\n",
+			   p_req->first_tlv.tl.type);
+		rc = ECORE_TIMEOUT;
+		goto exit;
+	} else {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "PF response: %d [Type %d]\n",
+			   *done, p_req->first_tlv.tl.type);
+	}
+
+exit:
+	OSAL_MUTEX_RELEASE(&(p_hwfn->vf_iov_info->mutex));
+
+	return rc;
+}
+
+#define VF_ACQUIRE_THRESH 3
+#define VF_ACQUIRE_MAC_FILTERS 1
+#define VF_ACQUIRE_MC_FILTERS 10
+
+static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
+	struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
+	struct ecore_vf_acquire_sw_info vf_sw_info;
+	struct vfpf_acquire_tlv *req;
+	int rc = 0, attempts = 0;
+	bool resources_acquired = false;
+
+	/* @@@ TBD: MichalK take this from somewhere else... */
+	u8 rx_count = 1, tx_count = 1, num_sbs = 1;
+	u8 num_mac = VF_ACQUIRE_MAC_FILTERS, num_mc = VF_ACQUIRE_MC_FILTERS;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
+
+	/* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
+	req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
+
+	req->resc_request.num_rxqs = rx_count;
+	req->resc_request.num_txqs = tx_count;
+	req->resc_request.num_sbs = num_sbs;
+	req->resc_request.num_mac_filters = num_mac;
+	req->resc_request.num_mc_filters = num_mc;
+	req->resc_request.num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
+
+	OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
+	OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
+
+	req->vfdev_info.os_type = vf_sw_info.os_type;
+	req->vfdev_info.driver_version = vf_sw_info.driver_version;
+	req->vfdev_info.fw_major = FW_MAJOR_VERSION;
+	req->vfdev_info.fw_minor = FW_MINOR_VERSION;
+	req->vfdev_info.fw_revision = FW_REVISION_VERSION;
+	req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
+
+	if (vf_sw_info.override_fw_version)
+		req->vfdev_info.capabilties |= VFPF_ACQUIRE_CAP_OVERRIDE_FW_VER;
+
+	/* pf 2 vf bulletin board address */
+	req->bulletin_addr = p_iov->bulletin.phys;
+	req->bulletin_size = p_iov->bulletin.size;
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	while (!resources_acquired) {
+		DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+			   "attempting to acquire resources\n");
+
+		/* send acquire request */
+		rc = ecore_send_msg2pf(p_hwfn,
+				       &resp->hdr.status, sizeof(*resp));
+
+		/* PF timeout */
+		if (rc)
+			return rc;
+
+		/* copy acquire response from buffer to p_hwfn */
+		OSAL_MEMCPY(&p_iov->acquire_resp,
+			    resp, sizeof(p_iov->acquire_resp));
+
+		attempts++;
+
+		/* PF agrees to allocate our resources */
+		if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "resources acquired\n");
+			resources_acquired = true;
+		} /* PF refuses to allocate our resources */
+		else if (resp->hdr.status ==
+			 PFVF_STATUS_NO_RESOURCE &&
+			 attempts < VF_ACQUIRE_THRESH) {
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "PF unwilling to fullfill resource request. Try PF recommended amount\n");
+
+			/* humble our request */
+			req->resc_request.num_txqs = resp->resc.num_txqs;
+			req->resc_request.num_rxqs = resp->resc.num_rxqs;
+			req->resc_request.num_sbs = resp->resc.num_sbs;
+			req->resc_request.num_mac_filters =
+			    resp->resc.num_mac_filters;
+			req->resc_request.num_vlan_filters =
+			    resp->resc.num_vlan_filters;
+			req->resc_request.num_mc_filters =
+			    resp->resc.num_mc_filters;
+
+			/* Clear response buffer */
+			OSAL_MEMSET(p_iov->pf2vf_reply, 0,
+				    sizeof(union pfvf_tlvs));
+		} else {
+			DP_ERR(p_hwfn,
+			       "PF returned error %d to VF acquisition request\n",
+			       resp->hdr.status);
+			return ECORE_AGAIN;
+		}
+	}
+
+	rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
+	if (rc) {
+		DP_NOTICE(p_hwfn, true,
+			  "VF_UPDATE_ACQUIRE_RESC_RESP Failed: status = 0x%x.\n",
+			  rc);
+		return ECORE_AGAIN;
+	}
+
+	/* Update bulletin board size with response from PF */
+	p_iov->bulletin.size = resp->bulletin_size;
+
+	/* get HW info */
+	p_hwfn->p_dev->type = resp->pfdev_info.dev_type;
+	p_hwfn->p_dev->chip_rev = resp->pfdev_info.chip_rev;
+
+	DP_INFO(p_hwfn, "Chip details - %s%d\n",
+		ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH",
+		CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
+
+	/* @@@TBD MichalK: Fw ver... */
+	/* strlcpy(p_hwfn->fw_ver, p_hwfn->acquire_resp.pfdev_info.fw_ver,
+	 *  sizeof(p_hwfn->fw_ver));
+	 */
+
+	p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff;
+
+	return 0;
+}
+
+enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_dev *p_dev)
+{
+	enum _ecore_status_t rc = ECORE_NOMEM;
+	struct ecore_vf_iov *p_sriov;
+	struct ecore_hwfn *p_hwfn = &p_dev->hwfns[0];	/* @@@TBD CMT */
+
+	p_dev->num_hwfns = 1;	/* @@@TBD CMT must be fixed... */
+
+	p_hwfn->regview = p_dev->regview;
+	if (p_hwfn->regview == OSAL_NULL) {
+		DP_ERR(p_hwfn,
+		       "regview should be initialized before"
+			" ecore_vf_hw_prepare is called\n");
+		return ECORE_INVAL;
+	}
+
+	/* Set the doorbell bar. Assumption: regview is set */
+	p_hwfn->doorbells = (u8 OSAL_IOMEM *) p_hwfn->regview +
+	    PXP_VF_BAR0_START_DQ;
+
+	p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn,
+					  PXP_VF_BAR0_ME_OPAQUE_ADDRESS);
+
+	p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn,
+				      PXP_VF_BAR0_ME_CONCRETE_ADDRESS);
+
+	/* Allocate vf sriov info */
+	p_sriov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_sriov));
+	if (!p_sriov) {
+		DP_NOTICE(p_hwfn, true,
+			  "Failed to allocate `struct ecore_sriov'\n");
+		return ECORE_NOMEM;
+	}
+
+	OSAL_MEMSET(p_sriov, 0, sizeof(*p_sriov));
+
+	/* Allocate vf2pf msg */
+	p_sriov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
+							 &p_sriov->
+							 vf2pf_request_phys,
+							 sizeof(union
+								vfpf_tlvs));
+	if (!p_sriov->vf2pf_request) {
+		DP_NOTICE(p_hwfn, true,
+			  "Failed to allocate `vf2pf_request' DMA memory\n");
+		goto free_p_sriov;
+	}
+
+	p_sriov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
+						       &p_sriov->
+						       pf2vf_reply_phys,
+						       sizeof(union pfvf_tlvs));
+	if (!p_sriov->pf2vf_reply) {
+		DP_NOTICE(p_hwfn, true,
+			  "Failed to allocate `pf2vf_reply' DMA memory\n");
+		goto free_vf2pf_request;
+	}
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "VF's Request mailbox [%p virt 0x%lx phys], Response"
+		   " mailbox [%p virt 0x%lx phys]\n",
+		   p_sriov->vf2pf_request,
+		   (u64)p_sriov->vf2pf_request_phys,
+		   p_sriov->pf2vf_reply, (u64)p_sriov->pf2vf_reply_phys);
+
+	/* Allocate Bulletin board */
+	p_sriov->bulletin.size = sizeof(struct ecore_bulletin_content);
+	p_sriov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
+							   &p_sriov->bulletin.
+							   phys,
+							   p_sriov->bulletin.
+							   size);
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
+		   p_sriov->bulletin.p_virt, (u64)p_sriov->bulletin.phys,
+		   p_sriov->bulletin.size);
+
+	OSAL_MUTEX_ALLOC(p_hwfn, &p_sriov->mutex);
+	OSAL_MUTEX_INIT(&p_sriov->mutex);
+
+	p_hwfn->vf_iov_info = p_sriov;
+
+	p_hwfn->hw_info.personality = ECORE_PCI_ETH;
+
+	/* First VF needs to query for information from PF */
+	if (!p_hwfn->my_id)
+		rc = ecore_vf_pf_acquire(p_hwfn);
+
+	return rc;
+
+free_vf2pf_request:
+	OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_sriov->vf2pf_request,
+			       p_sriov->vf2pf_request_phys,
+			       sizeof(union vfpf_tlvs));
+free_p_sriov:
+	OSAL_FREE(p_hwfn->p_dev, p_sriov);
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_vf_pf_init(struct ecore_hwfn *p_hwfn)
+{
+	p_hwfn->b_int_enabled = 1;
+
+	return 0;
+}
+
+/* TEMP TEMP until in HSI */
+#define TSTORM_QZONE_START   PXP_VF_BAR0_START_SDM_ZONE_A
+#define MSTORM_QZONE_START(dev)   (TSTORM_QZONE_START + \
+				   (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
+#define USTORM_QZONE_START(dev)   (MSTORM_QZONE_START + \
+				   (MSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
+
+enum _ecore_status_t ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
+					   u8 rx_qid,
+					   u16 sb,
+					   u8 sb_index,
+					   u16 bd_max_bytes,
+					   dma_addr_t bd_chain_phys_addr,
+					   dma_addr_t cqe_pbl_addr,
+					   u16 cqe_pbl_size,
+					   void OSAL_IOMEM **pp_prod)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_start_rxq_tlv *req;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc;
+	u8 hw_qid;
+	u64 init_prod_val = 0;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
+
+	/* @@@TBD MichalK TPA */
+
+	req->rx_qid = rx_qid;
+	req->cqe_pbl_addr = cqe_pbl_addr;
+	req->cqe_pbl_size = cqe_pbl_size;
+	req->rxq_addr = bd_chain_phys_addr;
+	req->hw_sb = sb;
+	req->sb_index = sb_index;
+	req->hc_rate = 0;	/* @@@TBD MichalK -> host coalescing! */
+	req->bd_max_bytes = bd_max_bytes;
+	req->stat_id = -1;	/* No stats at the moment */
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	if (pp_prod) {
+		hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
+
+		*pp_prod = (u8 OSAL_IOMEM *) p_hwfn->regview +
+		    MSTORM_QZONE_START(p_hwfn->p_dev) +
+		    (hw_qid) * MSTORM_QZONE_SIZE +
+		    OFFSETOF(struct mstorm_eth_queue_zone, rx_producers);
+
+		/* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
+		__internal_ram_wr(p_hwfn, *pp_prod, sizeof(u64),
+				  (u32 *)(&init_prod_val));
+	}
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
+					  u16 rx_qid, bool cqe_completion)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_stop_rxqs_tlv *req;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
+
+	/* @@@TBD MichalK TPA */
+
+	/* @@@TBD MichalK - relevant ???
+	 * flags  VFPF_QUEUE_FLG_OV VFPF_QUEUE_FLG_VLAN
+	 */
+	req->rx_qid = rx_qid;
+	req->num_rxqs = 1;
+	req->cqe_completion = cqe_completion;
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
+					   u16 tx_queue_id,
+					   u16 sb,
+					   u8 sb_index,
+					   dma_addr_t pbl_addr,
+					   u16 pbl_size,
+					   void OSAL_IOMEM **pp_doorbell)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_start_txq_tlv *req;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
+
+	/* @@@TBD MichalK TPA */
+
+	req->tx_qid = tx_queue_id;
+
+	/* Tx */
+	req->pbl_addr = pbl_addr;
+	req->pbl_size = pbl_size;
+	req->hw_sb = sb;
+	req->sb_index = sb_index;
+	req->hc_rate = 0;	/* @@@TBD MichalK -> host coalescing! */
+	req->flags = 0;		/* @@@TBD MichalK -> flags... */
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	if (pp_doorbell) {
+		u8 cid = p_iov->acquire_resp.resc.cid[tx_queue_id];
+
+		*pp_doorbell = (u8 OSAL_IOMEM *) p_hwfn->doorbells +
+		    DB_ADDR(cid, DQ_DEMS_LEGACY);
+	}
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn, u16 tx_qid)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_stop_txqs_tlv *req;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
+
+	/* @@@TBD MichalK TPA */
+
+	/* @@@TBD MichalK - relevant ??? flags
+	 * VFPF_QUEUE_FLG_OV VFPF_QUEUE_FLG_VLAN
+	 */
+	req->tx_qid = tx_qid;
+	req->num_txqs = 1;
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
+					     u16 rx_queue_id,
+					     u8 num_rxqs,
+					     u8 comp_cqe_flg, u8 comp_event_flg)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	struct vfpf_update_rxq_tlv *req;
+	int rc;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
+
+	req->rx_qid = rx_queue_id;
+	req->num_rxqs = num_rxqs;
+
+	if (comp_cqe_flg)
+		req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
+	if (comp_event_flg)
+		req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	return rc;
+}
+
+enum _ecore_status_t
+ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
+			u16 mtu, u8 inner_vlan_removal,
+			enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
+			u8 only_untagged)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_vport_start_tlv *req;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc, i;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
+
+	req->mtu = mtu;
+	req->vport_id = vport_id;
+	req->inner_vlan_removal = inner_vlan_removal;
+	req->tpa_mode = tpa_mode;
+	req->max_buffers_per_cqe = max_buffers_per_cqe;
+	req->only_untagged = only_untagged;
+
+	/* status blocks */
+	for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++)
+		if (p_hwfn->sbs_info[i])
+			req->sb_addr[i] = p_hwfn->sbs_info[i]->sb_phys;
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc;
+
+	/* clear mailbox and prep first tlv */
+	ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
+			 sizeof(struct vfpf_first_tlv));
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	return rc;
+}
+
+static void
+ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
+				    struct ecore_sp_vport_update_params *p_data)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct pfvf_def_resp_tlv *p_resp;
+	u16 tlv;
+
+	if (p_data->update_vport_active_rx_flg ||
+	    p_data->update_vport_active_tx_flg) {
+		tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
+		p_resp = (struct pfvf_def_resp_tlv *)
+		    ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
+		if (p_resp && p_resp->hdr.status)
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VP update activate tlv configured\n");
+		else
+			DP_NOTICE(p_hwfn, true,
+				  "VP update activate tlv config failed\n");
+	}
+
+	if (p_data->update_tx_switching_flg) {
+		tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
+		p_resp = (struct pfvf_def_resp_tlv *)
+		    ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
+		if (p_resp && p_resp->hdr.status)
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VP update tx switch tlv configured\n");
+#ifndef ASIC_ONLY
+		else if (CHIP_REV_IS_FPGA(p_hwfn->p_dev))
+			DP_NOTICE(p_hwfn, false,
+				  "FPGA: Skip checking whether PF"
+				  " replied to Tx-switching request\n");
+#endif
+		else
+			DP_NOTICE(p_hwfn, true,
+				  "VP update tx switch tlv config failed\n");
+	}
+
+	if (p_data->update_inner_vlan_removal_flg) {
+		tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
+		p_resp = (struct pfvf_def_resp_tlv *)
+		    ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
+		if (p_resp && p_resp->hdr.status)
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VP update vlan strip tlv configured\n");
+		else
+			DP_NOTICE(p_hwfn, true,
+				  "VP update vlan strip tlv config failed\n");
+	}
+
+	if (p_data->update_approx_mcast_flg) {
+		tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
+		p_resp = (struct pfvf_def_resp_tlv *)
+		    ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
+		if (p_resp && p_resp->hdr.status)
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VP update mcast tlv configured\n");
+		else
+			DP_NOTICE(p_hwfn, true,
+				  "VP update mcast tlv config failed\n");
+	}
+
+	if (p_data->accept_flags.update_rx_mode_config ||
+	    p_data->accept_flags.update_tx_mode_config) {
+		tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
+		p_resp = (struct pfvf_def_resp_tlv *)
+		    ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
+		if (p_resp && p_resp->hdr.status)
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VP update accept_mode tlv configured\n");
+		else
+			DP_NOTICE(p_hwfn, true,
+				  "VP update accept_mode tlv config failed\n");
+	}
+
+	if (p_data->rss_params) {
+		tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
+		p_resp = (struct pfvf_def_resp_tlv *)
+		    ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
+		if (p_resp && p_resp->hdr.status)
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VP update rss tlv configured\n");
+		else
+			DP_NOTICE(p_hwfn, true,
+				  "VP update rss tlv config failed\n");
+	}
+
+	if (p_data->sge_tpa_params) {
+		tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
+		p_resp = (struct pfvf_def_resp_tlv *)
+		    ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
+		if (p_resp && p_resp->hdr.status)
+			DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+				   "VP update sge tpa tlv configured\n");
+		else
+			DP_NOTICE(p_hwfn, true,
+				  "VP update sge tpa tlv config failed\n");
+	}
+}
+
+enum _ecore_status_t
+ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
+			 struct ecore_sp_vport_update_params *p_params)
+{
+	struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
+	struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
+	struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
+	struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
+	struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
+	struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
+	struct vfpf_vport_update_activate_tlv *p_act_tlv;
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_vport_update_rss_tlv *p_rss_tlv;
+	struct vfpf_vport_update_tlv *req;
+	struct pfvf_def_resp_tlv *resp;
+	u8 update_rx, update_tx;
+	u32 resp_size = 0;
+	u16 size, tlv;
+	int rc;
+
+	resp = &p_iov->pf2vf_reply->default_resp;
+	resp_size = sizeof(*resp);
+
+	update_rx = p_params->update_vport_active_rx_flg;
+	update_tx = p_params->update_vport_active_tx_flg;
+
+	/* clear mailbox and prep header tlv */
+	ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
+
+	/* Prepare extended tlvs */
+	if (update_rx || update_tx) {
+		size = sizeof(struct vfpf_vport_update_activate_tlv);
+		p_act_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
+					  CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
+					  size);
+		resp_size += sizeof(struct pfvf_def_resp_tlv);
+
+		if (update_rx) {
+			p_act_tlv->update_rx = update_rx;
+			p_act_tlv->active_rx = p_params->vport_active_rx_flg;
+		}
+
+		if (update_tx) {
+			p_act_tlv->update_tx = update_tx;
+			p_act_tlv->active_tx = p_params->vport_active_tx_flg;
+		}
+	}
+
+	if (p_params->update_inner_vlan_removal_flg) {
+		size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
+		p_vlan_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
+					   CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
+					   size);
+		resp_size += sizeof(struct pfvf_def_resp_tlv);
+
+		p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
+	}
+
+	if (p_params->update_tx_switching_flg) {
+		size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
+		tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
+		p_tx_switch_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
+						tlv, size);
+		resp_size += sizeof(struct pfvf_def_resp_tlv);
+
+		p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
+	}
+
+	if (p_params->update_approx_mcast_flg) {
+		size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
+		p_mcast_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
+					    CHANNEL_TLV_VPORT_UPDATE_MCAST,
+					    size);
+		resp_size += sizeof(struct pfvf_def_resp_tlv);
+
+		OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
+			    sizeof(unsigned long) *
+			    ETH_MULTICAST_MAC_BINS_IN_REGS);
+	}
+
+	update_rx = p_params->accept_flags.update_rx_mode_config;
+	update_tx = p_params->accept_flags.update_tx_mode_config;
+
+	if (update_rx || update_tx) {
+		tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
+		size = sizeof(struct vfpf_vport_update_accept_param_tlv);
+		p_accept_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset, tlv, size);
+		resp_size += sizeof(struct pfvf_def_resp_tlv);
+
+		if (update_rx) {
+			p_accept_tlv->update_rx_mode = update_rx;
+			p_accept_tlv->rx_accept_filter =
+			    p_params->accept_flags.rx_accept_filter;
+		}
+
+		if (update_tx) {
+			p_accept_tlv->update_tx_mode = update_tx;
+			p_accept_tlv->tx_accept_filter =
+			    p_params->accept_flags.tx_accept_filter;
+		}
+	}
+
+	if (p_params->rss_params) {
+		struct ecore_rss_params *rss_params = p_params->rss_params;
+
+		size = sizeof(struct vfpf_vport_update_rss_tlv);
+		p_rss_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
+					  CHANNEL_TLV_VPORT_UPDATE_RSS, size);
+		resp_size += sizeof(struct pfvf_def_resp_tlv);
+
+		if (rss_params->update_rss_config)
+			p_rss_tlv->update_rss_flags |=
+			    VFPF_UPDATE_RSS_CONFIG_FLAG;
+		if (rss_params->update_rss_capabilities)
+			p_rss_tlv->update_rss_flags |=
+			    VFPF_UPDATE_RSS_CAPS_FLAG;
+		if (rss_params->update_rss_ind_table)
+			p_rss_tlv->update_rss_flags |=
+			    VFPF_UPDATE_RSS_IND_TABLE_FLAG;
+		if (rss_params->update_rss_key)
+			p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
+
+		p_rss_tlv->rss_enable = rss_params->rss_enable;
+		p_rss_tlv->rss_caps = rss_params->rss_caps;
+		p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
+		OSAL_MEMCPY(p_rss_tlv->rss_ind_table, rss_params->rss_ind_table,
+			    sizeof(rss_params->rss_ind_table));
+		OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
+			    sizeof(rss_params->rss_key));
+	}
+
+	if (p_params->update_accept_any_vlan_flg) {
+		size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
+		tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
+		p_any_vlan_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
+					       tlv, size);
+
+		resp_size += sizeof(struct pfvf_def_resp_tlv);
+		p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
+		p_any_vlan_tlv->update_accept_any_vlan_flg =
+		    p_params->update_accept_any_vlan_flg;
+	}
+
+	if (p_params->sge_tpa_params) {
+		struct ecore_sge_tpa_params *sge_tpa_params =
+		    p_params->sge_tpa_params;
+
+		size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
+		p_sge_tpa_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
+					      CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
+					      size);
+		resp_size += sizeof(struct pfvf_def_resp_tlv);
+
+		if (sge_tpa_params->update_tpa_en_flg)
+			p_sge_tpa_tlv->update_sge_tpa_flags |=
+			    VFPF_UPDATE_TPA_EN_FLAG;
+		if (sge_tpa_params->update_tpa_param_flg)
+			p_sge_tpa_tlv->update_sge_tpa_flags |=
+			    VFPF_UPDATE_TPA_PARAM_FLAG;
+
+		if (sge_tpa_params->tpa_ipv4_en_flg)
+			p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
+		if (sge_tpa_params->tpa_ipv6_en_flg)
+			p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
+		if (sge_tpa_params->tpa_pkt_split_flg)
+			p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
+		if (sge_tpa_params->tpa_hdr_data_split_flg)
+			p_sge_tpa_tlv->sge_tpa_flags |=
+			    VFPF_TPA_HDR_DATA_SPLIT_FLAG;
+		if (sge_tpa_params->tpa_gro_consistent_flg)
+			p_sge_tpa_tlv->sge_tpa_flags |=
+			    VFPF_TPA_GRO_CONSIST_FLAG;
+
+		p_sge_tpa_tlv->tpa_max_aggs_num =
+		    sge_tpa_params->tpa_max_aggs_num;
+		p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
+		p_sge_tpa_tlv->tpa_min_size_to_start =
+		    sge_tpa_params->tpa_min_size_to_start;
+		p_sge_tpa_tlv->tpa_min_size_to_cont =
+		    sge_tpa_params->tpa_min_size_to_cont;
+
+		p_sge_tpa_tlv->max_buffers_per_cqe =
+		    sge_tpa_params->max_buffers_per_cqe;
+	}
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
+
+	return rc;
+}
+
+enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_first_tlv *req;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_AGAIN;
+
+	p_hwfn->b_int_enabled = 0;
+
+	return ECORE_SUCCESS;
+}
+
+enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_first_tlv *req;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	u32 size;
+	int rc;
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+
+	if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
+		rc = ECORE_AGAIN;
+
+	p_hwfn->b_int_enabled = 0;
+
+	/* TODO - might need to revise this for 100g */
+	if (IS_LEAD_HWFN(p_hwfn))
+		OSAL_MUTEX_DEALLOC(&p_iov->mutex);
+
+	if (p_iov->vf2pf_request)
+		OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
+				       p_iov->vf2pf_request,
+				       p_iov->vf2pf_request_phys,
+				       sizeof(union vfpf_tlvs));
+	if (p_iov->pf2vf_reply)
+		OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
+				       p_iov->pf2vf_reply,
+				       p_iov->pf2vf_reply_phys,
+				       sizeof(union pfvf_tlvs));
+
+	if (p_iov->bulletin.p_virt) {
+		size = sizeof(struct ecore_bulletin_content);
+		OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
+				       p_iov->bulletin.p_virt,
+				       p_iov->bulletin.phys, size);
+	}
+
+	OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
+	p_hwfn->vf_iov_info = OSAL_NULL;
+
+	return rc;
+}
+
+void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
+			      struct ecore_filter_mcast *p_filter_cmd)
+{
+	struct ecore_sp_vport_update_params sp_params;
+	int i;
+
+	OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
+	sp_params.update_approx_mcast_flg = 1;
+
+	if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
+		for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
+			u32 bit;
+
+			bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
+			OSAL_SET_BIT(bit, sp_params.bins);
+		}
+	}
+
+	ecore_vf_pf_vport_update(p_hwfn, &sp_params);
+}
+
+enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
+					      struct ecore_filter_ucast
+					      *p_ucast)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct vfpf_ucast_filter_tlv *req;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc;
+
+	/* Sanitize */
+	if (p_ucast->opcode == ECORE_FILTER_MOVE) {
+		DP_NOTICE(p_hwfn, true,
+			  "VFs don't support Moving of filters\n");
+		return ECORE_INVAL;
+	}
+
+	/* clear mailbox and prep first tlv */
+	req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
+	req->opcode = (u8)p_ucast->opcode;
+	req->type = (u8)p_ucast->type;
+	OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
+	req->vlan = p_ucast->vlan;
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_AGAIN;
+
+	return ECORE_SUCCESS;
+}
+
+enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
+	int rc;
+
+	/* clear mailbox and prep first tlv */
+	ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
+			 sizeof(struct vfpf_first_tlv));
+
+	/* add list termination tlv */
+	ecore_add_tlv(p_hwfn, &p_iov->offset,
+		      CHANNEL_TLV_LIST_END,
+		      sizeof(struct channel_list_end_tlv));
+
+	rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
+	if (rc)
+		return rc;
+
+	if (resp->hdr.status != PFVF_STATUS_SUCCESS)
+		return ECORE_INVAL;
+
+	return ECORE_SUCCESS;
+}
+
+enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
+					    u8 *p_change)
+{
+	struct ecore_bulletin_content shadow;
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+	u32 crc, crc_size = sizeof(p_iov->bulletin.p_virt->crc);
+
+	*p_change = 0;
+
+	/* Need to guarantee PF is not in the middle of writing it */
+	OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
+
+	/* If version did not update, no need to do anything */
+	if (shadow.version == p_iov->bulletin_shadow.version)
+		return ECORE_SUCCESS;
+
+	/* Verify the bulletin we see is valid */
+	crc = ecore_crc32(0, (u8 *)&shadow + crc_size,
+			  p_iov->bulletin.size - crc_size);
+	if (crc != shadow.crc)
+		return ECORE_AGAIN;
+
+	/* Set the shadow bulletin and process it */
+	OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
+
+	DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
+		   "Read a bulletin update %08x\n", shadow.version);
+
+	*p_change = 1;
+
+	return ECORE_SUCCESS;
+}
+
+u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id)
+{
+	struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
+
+	if (!p_iov) {
+		DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
+		return 0;
+	}
+
+	return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
+}
+
+void __ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
+				struct ecore_mcp_link_params *p_params,
+				struct ecore_bulletin_content *p_bulletin)
+{
+	OSAL_MEMSET(p_params, 0, sizeof(*p_params));
+
+	p_params->speed.autoneg = p_bulletin->req_autoneg;
+	p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
+	p_params->speed.forced_speed = p_bulletin->req_forced_speed;
+	p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
+	p_params->pause.forced_rx = p_bulletin->req_forced_rx;
+	p_params->pause.forced_tx = p_bulletin->req_forced_tx;
+	p_params->loopback_mode = p_bulletin->req_loopback;
+}
+
+void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
+			      struct ecore_mcp_link_params *params)
+{
+	__ecore_vf_get_link_params(p_hwfn, params,
+				   &(p_hwfn->vf_iov_info->bulletin_shadow));
+}
+
+void __ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
+			       struct ecore_mcp_link_state *p_link,
+			       struct ecore_bulletin_content *p_bulletin)
+{
+	OSAL_MEMSET(p_link, 0, sizeof(*p_link));
+
+	p_link->link_up = p_bulletin->link_up;
+	p_link->speed = p_bulletin->speed;
+	p_link->full_duplex = p_bulletin->full_duplex;
+	p_link->an = p_bulletin->autoneg;
+	p_link->an_complete = p_bulletin->autoneg_complete;
+	p_link->parallel_detection = p_bulletin->parallel_detection;
+	p_link->pfc_enabled = p_bulletin->pfc_enabled;
+	p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
+	p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
+	p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
+	p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
+	p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
+}
+
+void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
+			     struct ecore_mcp_link_state *link)
+{
+	__ecore_vf_get_link_state(p_hwfn, link,
+				  &(p_hwfn->vf_iov_info->bulletin_shadow));
+}
+
+void __ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
+			      struct ecore_mcp_link_capabilities *p_link_caps,
+			      struct ecore_bulletin_content *p_bulletin)
+{
+	OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
+	p_link_caps->speed_capabilities = p_bulletin->capability_speed;
+}
+
+void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
+			    struct ecore_mcp_link_capabilities *p_link_caps)
+{
+	__ecore_vf_get_link_caps(p_hwfn, p_link_caps,
+				 &(p_hwfn->vf_iov_info->bulletin_shadow));
+}
+
+void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
+{
+	*num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
+}
+
+void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
+{
+	OSAL_MEMCPY(port_mac,
+		    p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
+		    ETH_ALEN);
+}
+
+void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
+				   u8 *num_vlan_filters)
+{
+	struct ecore_vf_iov *p_vf;
+
+	p_vf = p_hwfn->vf_iov_info;
+	*num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
+}
+
+bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
+{
+	struct ecore_bulletin_content *bulletin;
+
+	bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
+	if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
+		return true;
+
+	/* Forbid VF from changing a MAC enforced by PF */
+	if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
+		return false;
+
+	return false;
+}
+
+bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
+				      u8 *p_is_forced)
+{
+	struct ecore_bulletin_content *bulletin;
+
+	bulletin = &hwfn->vf_iov_info->bulletin_shadow;
+
+	if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
+		if (p_is_forced)
+			*p_is_forced = 1;
+	} else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
+		if (p_is_forced)
+			*p_is_forced = 0;
+	} else {
+		return false;
+	}
+
+	OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
+
+	return true;
+}
+
+bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
+{
+	struct ecore_bulletin_content *bulletin;
+
+	bulletin = &hwfn->vf_iov_info->bulletin_shadow;
+
+	if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
+		return false;
+
+	if (dst_pvid)
+		*dst_pvid = bulletin->pvid;
+
+	return true;
+}
+
+void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
+			     u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
+			     u16 *fw_eng)
+{
+	struct pf_vf_pfdev_info *info;
+
+	info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
+
+	*fw_major = info->fw_major;
+	*fw_minor = info->fw_minor;
+	*fw_rev = info->fw_rev;
+	*fw_eng = info->fw_eng;
+}
diff --git a/drivers/net/qede/base/ecore_vf.h b/drivers/net/qede/base/ecore_vf.h
new file mode 100644
index 0000000..a006dac
--- /dev/null
+++ b/drivers/net/qede/base/ecore_vf.h
@@ -0,0 +1,415 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#ifndef __ECORE_VF_H__
+#define __ECORE_VF_H__
+
+#include "ecore_status.h"
+#include "ecore_vf_api.h"
+#include "ecore_l2_api.h"
+#include "ecore_vfpf_if.h"
+
+#ifdef CONFIG_ECORE_SRIOV
+/**
+ *
+ * @brief hw preparation for VF
+ *	sends ACQUIRE message
+ *
+ * @param p_dev
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_dev *p_dev);
+
+/**
+ *
+ * @brief VF init in hw (equivalent to hw_init in PF)
+ *      mark interrupts as enabled
+ *
+ * @param p_hwfn
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_vf_pf_init(struct ecore_hwfn *p_hwfn);
+
+/**
+ *
+ * @brief VF - start the RX Queue by sending a message to the PF
+ *
+ * @param p_hwfn
+ * @param cid			- zero based within the VF
+ * @param rx_queue_id		- zero based within the VF
+ * @param sb			- VF status block for this queue
+ * @param sb_index		- Index within the status block
+ * @param bd_max_bytes		- maximum number of bytes per bd
+ * @param bd_chain_phys_addr	- physical address of bd chain
+ * @param cqe_pbl_addr		- physical address of pbl
+ * @param cqe_pbl_size		- pbl size
+ * @param pp_prod		- pointer to the producer to be
+ *	    used in fasthwfn
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
+					   u8 rx_queue_id,
+					   u16 sb,
+					   u8 sb_index,
+					   u16 bd_max_bytes,
+					   dma_addr_t bd_chain_phys_addr,
+					   dma_addr_t cqe_pbl_addr,
+					   u16 cqe_pbl_size,
+					   void OSAL_IOMEM **pp_prod);
+
+/**
+ *
+ * @brief VF - start the TX queue by sending a message to the
+ *        PF.
+ *
+ * @param p_hwfn
+ * @param tx_queue_id		- zero based within the VF
+ * @param sb			- status block for this queue
+ * @param sb_index		- index within the status block
+ * @param bd_chain_phys_addr	- physical address of tx chain
+ * @param pp_doorbell		- pointer to address to which to
+ *		write the doorbell too..
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
+					   u16 tx_queue_id,
+					   u16 sb,
+					   u8 sb_index,
+					   dma_addr_t pbl_addr,
+					   u16 pbl_size,
+					   void OSAL_IOMEM **pp_doorbell);
+
+/**
+ *
+ * @brief VF - stop the RX queue by sending a message to the PF
+ *
+ * @param p_hwfn
+ * @param rx_qid
+ * @param cqe_completion
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
+					  u16 rx_qid, bool cqe_completion);
+
+/**
+ *
+ * @brief VF - stop the TX queue by sending a message to the PF
+ *
+ * @param p_hwfn
+ * @param tx_qid
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
+					  u16 tx_qid);
+
+/**
+ * @brief VF - update the RX queue by sending a message to the
+ *        PF
+ *
+ * @param p_hwfn
+ * @param rx_queue_id
+ * @param num_rxqs
+ * @param init_sge_ring
+ * @param comp_cqe_flg
+ * @param comp_event_flg
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
+					     u16 rx_queue_id,
+					     u8 num_rxqs,
+					     u8 comp_cqe_flg,
+					     u8 comp_event_flg);
+
+/**
+ *
+ * @brief VF - send a vport update command
+ *
+ * @param p_hwfn
+ * @param params
+ *
+ * @return enum _ecore_status_t
+ */
+enum _ecore_status_t
+ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
+			 struct ecore_sp_vport_update_params *p_params);
+
+/**
+ *
+ * @brief VF - send a close message to PF
+ *
+ * @param p_hwfn
+ *
+ * @return enum _ecore_status
+ */
+enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn);
+
+/**
+ *
+ * @brief VF - free vf`s memories
+ *
+ * @param p_hwfn
+ *
+ * @return enum _ecore_status
+ */
+enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn);
+
+/**
+ *
+ * @brief ecore_vf_get_igu_sb_id - Get the IGU SB ID for a given
+ *        sb_id. For VFs igu sbs don't have to be contiguous
+ *
+ * @param p_hwfn
+ * @param sb_id
+ *
+ * @return INLINE u16
+ */
+u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id);
+
+/**
+ * @brief ecore_vf_pf_vport_start - perform vport start for VF.
+ *
+ * @param p_hwfn
+ * @param vport_id
+ * @param mtu
+ * @param inner_vlan_removal
+ * @param tpa_mode
+ * @param max_buffers_per_cqe,
+ * @param only_untagged - default behavior regarding vlan acceptance
+ *
+ * @return enum _ecore_status
+ */
+enum _ecore_status_t ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn,
+					     u8 vport_id,
+					     u16 mtu,
+					     u8 inner_vlan_removal,
+					     enum ecore_tpa_mode tpa_mode,
+					     u8 max_buffers_per_cqe,
+					     u8 only_untagged);
+
+/**
+ * @brief ecore_vf_pf_vport_stop - stop the VF's vport
+ *
+ * @param p_hwfn
+ *
+ * @return enum _ecore_status
+ */
+enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn);
+
+enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
+					      struct ecore_filter_ucast
+					      *p_param);
+
+void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
+			      struct ecore_filter_mcast *p_filter_cmd);
+
+/**
+ * @brief ecore_vf_pf_int_cleanup - clean the SB of the VF
+ *
+ * @param p_hwfn
+ *
+ * @return enum _ecore_status
+ */
+enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn);
+
+/**
+ * @brief - return the link params in a given bulletin board
+ *
+ * @param p_hwfn
+ * @param p_params - pointer to a struct to fill with link params
+ * @param p_bulletin
+ */
+void __ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
+				struct ecore_mcp_link_params *p_params,
+				struct ecore_bulletin_content *p_bulletin);
+
+/**
+ * @brief - return the link state in a given bulletin board
+ *
+ * @param p_hwfn
+ * @param p_link - pointer to a struct to fill with link state
+ * @param p_bulletin
+ */
+void __ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
+			       struct ecore_mcp_link_state *p_link,
+			       struct ecore_bulletin_content *p_bulletin);
+
+/**
+ * @brief - return the link capabilities in a given bulletin board
+ *
+ * @param p_hwfn
+ * @param p_link - pointer to a struct to fill with link capabilities
+ * @param p_bulletin
+ */
+void __ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
+			      struct ecore_mcp_link_capabilities *p_link_caps,
+			      struct ecore_bulletin_content *p_bulletin);
+
+#else
+static OSAL_INLINE enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_dev
+							    *p_dev)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_init(struct ecore_hwfn
+							 *p_hwfn)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_rxq_start(struct ecore_hwfn
+							      *p_hwfn,
+							      u8 rx_queue_id,
+							      u16 sb,
+							      u8 sb_index,
+							      u16 bd_max_bytes,
+							      dma_addr_t
+							      bd_chain_phys_adr,
+							      dma_addr_t
+							      cqe_pbl_addr,
+							      u16 cqe_pbl_size,
+							      void OSAL_IOMEM **
+							      pp_prod)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_txq_start(struct ecore_hwfn
+							      *p_hwfn,
+							      u16 tx_queue_id,
+							      u16 sb,
+							      u8 sb_index,
+							      dma_addr_t
+							      pbl_addr,
+							      u16 pbl_size,
+							      void OSAL_IOMEM **
+							      pp_doorbell)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn
+							     *p_hwfn,
+							     u16 rx_qid,
+							     bool
+							     cqe_completion)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn
+							     *p_hwfn,
+							     u16 tx_qid)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_rxqs_update(struct
+								ecore_hwfn
+								*p_hwfn,
+								u16 rx_queue_id,
+								u8 num_rxqs,
+								u8 comp_cqe_flg,
+								u8
+								comp_event_flg)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_vport_update(
+	struct ecore_hwfn *p_hwfn,
+	struct ecore_sp_vport_update_params *p_params)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn
+							  *p_hwfn)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn
+							    *p_hwfn)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
+					      u16 sb_id)
+{
+	return 0;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_vport_start(
+	struct ecore_hwfn *p_hwfn, u8 vport_id, u16 mtu,
+	u8 inner_vlan_removal, enum ecore_tpa_mode tpa_mode,
+	u8 max_buffers_per_cqe, u8 only_untagged)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_vport_stop(
+	struct ecore_hwfn *p_hwfn)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_filter_ucast(
+	 struct ecore_hwfn *p_hwfn, struct ecore_filter_ucast *p_param)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
+						 struct ecore_filter_mcast
+						 *p_filter_cmd)
+{
+}
+
+static OSAL_INLINE enum _ecore_status_t ecore_vf_pf_int_cleanup(struct
+								ecore_hwfn
+								*p_hwfn)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE void __ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
+						   struct ecore_mcp_link_params
+						   *p_params,
+						   struct ecore_bulletin_content
+						   *p_bulletin)
+{
+}
+
+static OSAL_INLINE void __ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
+						  struct ecore_mcp_link_state
+						  *p_link,
+						  struct ecore_bulletin_content
+						  *p_bulletin)
+{
+}
+
+static OSAL_INLINE void __ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
+						 struct
+						 ecore_mcp_link_capabilities
+						 *p_link_caps,
+						 struct ecore_bulletin_content
+						 *p_bulletin)
+{
+}
+#endif
+
+#endif /* __ECORE_VF_H__ */
diff --git a/drivers/net/qede/base/ecore_vf_api.h b/drivers/net/qede/base/ecore_vf_api.h
new file mode 100644
index 0000000..cce1813
--- /dev/null
+++ b/drivers/net/qede/base/ecore_vf_api.h
@@ -0,0 +1,186 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#ifndef __ECORE_VF_API_H__
+#define __ECORE_VF_API_H__
+
+#include "ecore_sp_api.h"
+#include "ecore_mcp_api.h"
+
+#ifdef CONFIG_ECORE_SRIOV
+/**
+ * @brief Read the VF bulletin and act on it if needed
+ *
+ * @param p_hwfn
+ * @param p_change - ecore fills 1 iff bulletin board has changed, 0 otherwise.
+ *
+ * @return enum _ecore_status
+ */
+enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
+					    u8 *p_change);
+
+/**
+ * @brief Get link paramters for VF from ecore
+ *
+ * @param p_hwfn
+ * @param params - the link params structure to be filled for the VF
+ */
+void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
+			      struct ecore_mcp_link_params *params);
+
+/**
+ * @brief Get link state for VF from ecore
+ *
+ * @param p_hwfn
+ * @param link - the link state structure to be filled for the VF
+ */
+void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
+			     struct ecore_mcp_link_state *link);
+
+/**
+ * @brief Get link capabilities for VF from ecore
+ *
+ * @param p_hwfn
+ * @param p_link_caps - the link capabilities structure to be filled for the VF
+ */
+void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
+			    struct ecore_mcp_link_capabilities *p_link_caps);
+
+/**
+ * @brief Get number of Rx queues allocated for VF by ecore
+ *
+ *  @param p_hwfn
+ *  @param num_rxqs - allocated RX queues
+ */
+void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs);
+
+/**
+ * @brief Get port mac address for VF
+ *
+ * @param p_hwfn
+ * @param port_mac - destination location for port mac
+ */
+void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac);
+
+/**
+ * @brief Get number of VLAN filters allocated for VF by ecore
+ *
+ *  @param p_hwfn
+ *  @param num_rxqs - allocated VLAN filters
+ */
+void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
+				   u8 *num_vlan_filters);
+
+/**
+ * @brief Check if VF can set a MAC address
+ *
+ * @param p_hwfn
+ * @param mac
+ *
+ * @return bool
+ */
+bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac);
+
+/**
+ * @brief Copy forced MAC address from bulletin board
+ *
+ * @param hwfn
+ * @param dst_mac
+ * @param p_is_forced - out param which indicate in case mac
+ *	        exist if it forced or not.
+ *
+ * @return bool       - return true if mac exist and false if
+ *                      not.
+ */
+bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
+				      u8 *p_is_forced);
+
+/**
+ * @brief Check if force vlan is set and copy the forced vlan
+ *        from bulletin board
+ *
+ * @param hwfn
+ * @param dst_pvid
+ * @return bool
+ */
+bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid);
+
+/**
+ * @brief Set firmware version information in dev_info from VFs acquire response
+ *        tlv
+ *
+ * @param p_hwfn
+ * @param fw_major
+ * @param fw_minor
+ * @param fw_rev
+ * @param fw_eng
+ */
+void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
+			     u16 *fw_major,
+			     u16 *fw_minor, u16 *fw_rev, u16 *fw_eng);
+#else
+static OSAL_INLINE enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn
+							       *p_hwfn,
+							       u8 *p_change)
+{
+	return ECORE_INVAL;
+}
+
+static OSAL_INLINE void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
+						 struct ecore_mcp_link_params
+						 *params)
+{
+}
+
+static OSAL_INLINE void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
+						struct ecore_mcp_link_state
+						*link)
+{
+}
+
+static OSAL_INLINE void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
+					       struct
+					       ecore_mcp_link_capabilities
+					       *p_link_caps)
+{
+}
+
+static OSAL_INLINE void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn,
+					      u8 *num_rxqs)
+{
+}
+
+static OSAL_INLINE void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn,
+					      u8 *port_mac)
+{
+}
+
+static OSAL_INLINE void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
+						      u8 *num_vlan_filters)
+{
+}
+
+static OSAL_INLINE bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
+{
+	return false;
+}
+
+static OSAL_INLINE bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn
+							 *hwfn, u8 *dst_mac,
+							 u8 *p_is_forced)
+{
+	return false;
+}
+
+static OSAL_INLINE void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
+						u16 *fw_major, u16 *fw_minor,
+						u16 *fw_rev, u16 *fw_eng)
+{
+}
+#endif
+#endif
diff --git a/drivers/net/qede/base/ecore_vfpf_if.h b/drivers/net/qede/base/ecore_vfpf_if.h
new file mode 100644
index 0000000..e5cf097
--- /dev/null
+++ b/drivers/net/qede/base/ecore_vfpf_if.h
@@ -0,0 +1,590 @@
+/*
+ * Copyright (c) 2016 QLogic Corporation.
+ * All rights reserved.
+ * www.qlogic.com
+ *
+ * See LICENSE.qede_pmd for copyright and licensing details.
+ */
+
+#ifndef __ECORE_VF_PF_IF_H__
+#define __ECORE_VF_PF_IF_H__
+
+#define T_ETH_INDIRECTION_TABLE_SIZE 128
+#define T_ETH_RSS_KEY_SIZE 10
+#ifndef aligned_u64
+#define aligned_u64 u64
+#endif
+
+/***********************************************
+ *
+ * Common definitions for all HVs
+ *
+ **/
+struct vf_pf_resc_request {
+	u8 num_rxqs;
+	u8 num_txqs;
+	u8 num_sbs;
+	u8 num_mac_filters;
+	u8 num_vlan_filters;
+	u8 num_mc_filters;	/* No limit  so superfluous */
+	u16 padding;
+};
+
+struct hw_sb_info {
+	u16 hw_sb_id;		/* aka absolute igu id, used to ack the sb */
+	u8 sb_qid;		/* used to update DHC for sb */
+	u8 padding[5];
+};
+
+/***********************************************
+ *
+ * HW VF-PF channel definitions
+ *
+ * A.K.A VF-PF mailbox
+ *
+ **/
+#define TLV_BUFFER_SIZE		1024
+#define TLV_ALIGN		sizeof(u64)
+#define PF_VF_BULLETIN_SIZE	512
+
+#define VFPF_RX_MASK_ACCEPT_NONE		0x00000000
+#define VFPF_RX_MASK_ACCEPT_MATCHED_UNICAST     0x00000001
+#define VFPF_RX_MASK_ACCEPT_MATCHED_MULTICAST   0x00000002
+#define VFPF_RX_MASK_ACCEPT_ALL_UNICAST	0x00000004
+#define VFPF_RX_MASK_ACCEPT_ALL_MULTICAST       0x00000008
+#define VFPF_RX_MASK_ACCEPT_BROADCAST	0x00000010
+/* TODO: #define VFPF_RX_MASK_ACCEPT_ANY_VLAN   0x00000020 */
+
+#define BULLETIN_CONTENT_SIZE	(sizeof(struct pf_vf_bulletin_content))
+#define BULLETIN_ATTEMPTS       5	/* crc failures before throwing towel */
+#define BULLETIN_CRC_SEED       0
+
+enum {
+	PFVF_STATUS_WAITING = 0,
+	PFVF_STATUS_SUCCESS,
+	PFVF_STATUS_FAILURE,
+	PFVF_STATUS_NOT_SUPPORTED,
+	PFVF_STATUS_NO_RESOURCE,
+	PFVF_STATUS_FORCED,
+};
+
+/* vf pf channel tlvs */
+/* general tlv header (used for both vf->pf request and pf->vf response) */
+struct channel_tlv {
+	u16 type;
+	u16 length;
+};
+
+/* header of first vf->pf tlv carries the offset used to calculate reponse
+ * buffer address
+ */
+struct vfpf_first_tlv {
+	struct channel_tlv tl;
+	u32 padding;
+	aligned_u64 reply_address;
+};
+
+/* header of pf->vf tlvs, carries the status of handling the request */
+struct pfvf_tlv {
+	struct channel_tlv tl;
+	u8 status;
+	u8 padding[3];
+};
+
+/* response tlv used for most tlvs */
+struct pfvf_def_resp_tlv {
+	struct pfvf_tlv hdr;
+};
+
+/* used to terminate and pad a tlv list */
+struct channel_list_end_tlv {
+	struct channel_tlv tl;
+	u8 padding[4];
+};
+
+/* Acquire */
+struct vfpf_acquire_tlv {
+	struct vfpf_first_tlv first_tlv;
+
+	struct vf_pf_vfdev_info {
+#define VFPF_ACQUIRE_CAP_OVERRIDE_FW_VER		(1 << 0)
+		aligned_u64 capabilties;
+		u8 fw_major;
+		u8 fw_minor;
+		u8 fw_revision;
+		u8 fw_engineering;
+		u32 driver_version;
+		u16 opaque_fid;	/* ME register value */
+		u8 os_type;	/* VFPF_ACQUIRE_OS_* value */
+		u8 padding[5];
+	} vfdev_info;
+
+	struct vf_pf_resc_request resc_request;
+
+	aligned_u64 bulletin_addr;
+	u32 bulletin_size;
+	u32 padding;
+};
+
+/* receive side scaling tlv */
+struct vfpf_vport_update_rss_tlv {
+	struct channel_tlv tl;
+
+	u8 update_rss_flags;
+#define VFPF_UPDATE_RSS_CONFIG_FLAG	  (1 << 0)
+#define VFPF_UPDATE_RSS_CAPS_FLAG	  (1 << 1)
+#define VFPF_UPDATE_RSS_IND_TABLE_FLAG	  (1 << 2)
+#define VFPF_UPDATE_RSS_KEY_FLAG	  (1 << 3)
+
+	u8 rss_enable;
+	u8 rss_caps;
+	u8 rss_table_size_log;	/* The table size is 2 ^ rss_table_size_log */
+	u16 rss_ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
+	u32 rss_key[T_ETH_RSS_KEY_SIZE];
+};
+
+struct pfvf_storm_stats {
+	u32 address;
+	u32 len;
+};
+
+struct pfvf_stats_info {
+	struct pfvf_storm_stats mstats;
+	struct pfvf_storm_stats pstats;
+	struct pfvf_storm_stats tstats;
+	struct pfvf_storm_stats ustats;
+};
+
+/* acquire response tlv - carries the allocated resources */
+struct pfvf_acquire_resp_tlv {
+	struct pfvf_tlv hdr;
+
+	struct pf_vf_pfdev_info {
+		u32 chip_num;
+		u32 mfw_ver;
+
+		u16 fw_major;
+		u16 fw_minor;
+		u16 fw_rev;
+		u16 fw_eng;
+
+		aligned_u64 capabilities;
+#define PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED	(1 << 0)
+
+		u16 db_size;
+		u8 indices_per_sb;
+		u8 os_type;
+
+		/* Thesee should match the PF's ecore_dev values */
+		u16 chip_rev;
+		u8 dev_type;
+
+		u8 padding;
+
+		struct pfvf_stats_info stats_info;
+
+		u8 port_mac[ETH_ALEN];
+		u8 padding2[2];
+	} pfdev_info;
+
+	struct pf_vf_resc {
+		/* in case of status NO_RESOURCE in message hdr, pf will fill
+		 * this struct with suggested amount of resources for next
+		 * acquire request
+		 */
+#define PFVF_MAX_QUEUES_PER_VF         16
+#define PFVF_MAX_SBS_PER_VF            16
+		struct hw_sb_info hw_sbs[PFVF_MAX_SBS_PER_VF];
+		u8 hw_qid[PFVF_MAX_QUEUES_PER_VF];
+		u8 cid[PFVF_MAX_QUEUES_PER_VF];
+
+		u8 num_rxqs;
+		u8 num_txqs;
+		u8 num_sbs;
+		u8 num_mac_filters;
+		u8 num_vlan_filters;
+		u8 num_mc_filters;
+		u8 padding[2];
+	} resc;
+
+	u32 bulletin_size;
+	u32 padding;
+};
+
+/* Init VF */
+struct vfpf_init_tlv {
+	struct vfpf_first_tlv first_tlv;
+	aligned_u64 stats_addr;
+
+	u16 rx_mask;
+	u16 tx_mask;
+	u8 drop_ttl0_flg;
+	u8 padding[3];
+
+};
+
+/* Setup Queue */
+struct vfpf_start_rxq_tlv {
+	struct vfpf_first_tlv first_tlv;
+
+	/* physical addresses */
+	aligned_u64 rxq_addr;
+	aligned_u64 deprecated_sge_addr;
+	aligned_u64 cqe_pbl_addr;
+
+	u16 cqe_pbl_size;
+	u16 hw_sb;
+	u16 rx_qid;
+	u16 hc_rate;		/* desired interrupts per sec. */
+
+	u16 bd_max_bytes;
+	u16 stat_id;
+	u8 sb_index;
+	u8 padding[3];
+
+};
+
+struct vfpf_start_txq_tlv {
+	struct vfpf_first_tlv first_tlv;
+
+	/* physical addresses */
+	aligned_u64 pbl_addr;
+	u16 pbl_size;
+	u16 stat_id;
+	u16 tx_qid;
+	u16 hw_sb;
+
+	u32 flags;		/* VFPF_QUEUE_FLG_X flags */
+	u16 hc_rate;		/* desired interrupts per sec. */
+	u8 sb_index;
+	u8 padding[3];
+};
+
+/* Stop RX Queue */
+struct vfpf_stop_rxqs_tlv {
+	struct vfpf_first_tlv first_tlv;
+
+	u16 rx_qid;
+	u8 num_rxqs;
+	u8 cqe_completion;
+	u8 padding[4];
+};
+
+/* Stop TX Queues */
+struct vfpf_stop_txqs_tlv {
+	struct vfpf_first_tlv first_tlv;
+
+	u16 tx_qid;
+	u8 num_txqs;
+	u8 padding[5];
+};
+
+struct vfpf_update_rxq_tlv {
+	struct vfpf_first_tlv first_tlv;
+
+	aligned_u64 deprecated_sge_addr[PFVF_MAX_QUEUES_PER_VF];
+
+	u16 rx_qid;
+	u8 num_rxqs;
+	u8 flags;
+#define VFPF_RXQ_UPD_INIT_SGE_DEPRECATE_FLAG	(1 << 0)
+#define VFPF_RXQ_UPD_COMPLETE_CQE_FLAG		(1 << 1)
+#define VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG	(1 << 2)
+
+	u8 padding[4];
+};
+
+/* Set Queue Filters */
+struct vfpf_q_mac_vlan_filter {
+	u32 flags;
+#define VFPF_Q_FILTER_DEST_MAC_VALID    0x01
+#define VFPF_Q_FILTER_VLAN_TAG_VALID    0x02
+#define VFPF_Q_FILTER_SET_MAC	0x100	/* set/clear */
+
+	u8 mac[ETH_ALEN];
+	u16 vlan_tag;
+
+	u8 padding[4];
+};
+
+/* Start a vport */
+struct vfpf_vport_start_tlv {
+	struct vfpf_first_tlv first_tlv;
+
+	aligned_u64 sb_addr[PFVF_MAX_SBS_PER_VF];
+
+	u32 tpa_mode;
+	u16 dep1;
+	u16 mtu;
+
+	u8 vport_id;
+	u8 inner_vlan_removal;
+
+	u8 only_untagged;
+	u8 max_buffers_per_cqe;
+
+	u8 padding[4];
+};
+
+/* Extended tlvs - need to add rss, mcast, accept mode tlvs */
+struct vfpf_vport_update_activate_tlv {
+	struct channel_tlv tl;
+	u8 update_rx;
+	u8 update_tx;
+	u8 active_rx;
+	u8 active_tx;
+};
+
+struct vfpf_vport_update_tx_switch_tlv {
+	struct channel_tlv tl;
+	u8 tx_switching;
+	u8 padding[3];
+};
+
+struct vfpf_vport_update_vlan_strip_tlv {
+	struct channel_tlv tl;
+	u8 remove_vlan;
+	u8 padding[3];
+};
+
+struct vfpf_vport_update_mcast_bin_tlv {
+	struct channel_tlv tl;
+	u8 padding[4];
+
+	aligned_u64 bins[8];
+};
+
+struct vfpf_vport_update_accept_param_tlv {
+	struct channel_tlv tl;
+	u8 update_rx_mode;
+	u8 update_tx_mode;
+	u8 rx_accept_filter;
+	u8 tx_accept_filter;
+};
+
+struct vfpf_vport_update_accept_any_vlan_tlv {
+	struct channel_tlv tl;
+	u8 update_accept_any_vlan_flg;
+	u8 accept_any_vlan;
+
+	u8 padding[2];
+};
+
+struct vfpf_vport_update_sge_tpa_tlv {
+	struct channel_tlv tl;
+
+	u16 sge_tpa_flags;
+#define VFPF_TPA_IPV4_EN_FLAG	     (1 << 0)
+#define VFPF_TPA_IPV6_EN_FLAG        (1 << 1)
+#define VFPF_TPA_PKT_SPLIT_FLAG      (1 << 2)
+#define VFPF_TPA_HDR_DATA_SPLIT_FLAG (1 << 3)
+#define VFPF_TPA_GRO_CONSIST_FLAG    (1 << 4)
+
+	u8 update_sge_tpa_flags;
+#define VFPF_UPDATE_SGE_DEPRECATED_FLAG	   (1 << 0)
+#define VFPF_UPDATE_TPA_EN_FLAG    (1 << 1)
+#define VFPF_UPDATE_TPA_PARAM_FLAG (1 << 2)
+
+	u8 max_buffers_per_cqe;
+
+	u16 deprecated_sge_buff_size;
+	u16 tpa_max_size;
+	u16 tpa_min_size_to_start;
+	u16 tpa_min_size_to_cont;
+
+	u8 tpa_max_aggs_num;
+	u8 padding[7];
+
+};
+
+/* Primary tlv as a header for various extended tlvs for
+ * various functionalities in vport update ramrod.
+ */
+struct vfpf_vport_update_tlv {
+	struct vfpf_first_tlv first_tlv;
+};
+
+struct vfpf_ucast_filter_tlv {
+	struct vfpf_first_tlv first_tlv;
+
+	u8 opcode;
+	u8 type;
+
+	u8 mac[ETH_ALEN];
+
+	u16 vlan;
+	u16 padding[3];
+};
+
+struct tlv_buffer_size {
+	u8 tlv_buffer[TLV_BUFFER_SIZE];
+};
+
+union vfpf_tlvs {
+	struct vfpf_first_tlv first_tlv;
+	struct vfpf_acquire_tlv acquire;
+	struct vfpf_init_tlv init;
+	struct vfpf_start_rxq_tlv start_rxq;
+	struct vfpf_start_txq_tlv start_txq;
+	struct vfpf_stop_rxqs_tlv stop_rxqs;
+	struct vfpf_stop_txqs_tlv stop_txqs;
+	struct vfpf_update_rxq_tlv update_rxq;
+	struct vfpf_vport_start_tlv start_vport;
+	struct vfpf_vport_update_tlv vport_update;
+	struct vfpf_ucast_filter_tlv ucast_filter;
+	struct channel_list_end_tlv list_end;
+	struct tlv_buffer_size tlv_buf_size;
+};
+
+union pfvf_tlvs {
+	struct pfvf_def_resp_tlv default_resp;
+	struct pfvf_acquire_resp_tlv acquire_resp;
+	struct channel_list_end_tlv list_end;
+	struct tlv_buffer_size tlv_buf_size;
+};
+
+/* This is a structure which is allocated in the VF, which the PF may update
+ * when it deems it necessary to do so. The bulletin board is sampled
+ * periodically by the VF. A copy per VF is maintained in the PF (to prevent
+ * loss of data upon multiple updates (or the need for read modify write)).
+ */
+enum ecore_bulletin_bit {
+	/* Alert the VF that a forced MAC was set by the PF */
+	MAC_ADDR_FORCED = 0,
+
+	/* The VF should not access the vfpf channel */
+	VFPF_CHANNEL_INVALID = 1,
+
+	/* Alert the VF that a forced VLAN was set by the PF */
+	VLAN_ADDR_FORCED = 2,
+
+	/* Indicate that `default_only_untagged' contains actual data */
+	VFPF_BULLETIN_UNTAGGED_DEFAULT = 3,
+	VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED = 4,
+
+	/* Alert the VF that suggested mac was sent by the PF.
+	 * MAC_ADDR will be disabled in case MAC_ADDR_FORCED is set
+	 */
+	VFPF_BULLETIN_MAC_ADDR = 5
+};
+
+struct ecore_bulletin_content {
+	u32 crc;		/* crc of structure to ensure is not in
+				 * mid-update
+				 */
+	u32 version;
+
+	aligned_u64 valid_bitmap;	/* bitmap indicating wich fields
+					 * hold valid values
+					 */
+
+	u8 mac[ETH_ALEN];	/* used for MAC_ADDR or MAC_ADDR_FORCED */
+
+	u8 default_only_untagged;	/* If valid, 1 => only untagged Rx
+					 * if no vlan filter is configured.
+					 */
+	u8 padding;
+
+	/* The following is a 'copy' of ecore_mcp_link_state,
+	 * ecore_mcp_link_params and ecore_mcp_link_capabilities. Since it's
+	 * possible the structs will increase further along the road we cannot
+	 * have it here; Instead we need to have all of its fields.
+	 */
+	u8 req_autoneg;
+	u8 req_autoneg_pause;
+	u8 req_forced_rx;
+	u8 req_forced_tx;
+	u8 padding2[4];
+
+	u32 req_adv_speed;
+	u32 req_forced_speed;
+	u32 req_loopback;
+	u32 padding3;
+
+	u8 link_up;
+	u8 full_duplex;
+	u8 autoneg;
+	u8 autoneg_complete;
+	u8 parallel_detection;
+	u8 pfc_enabled;
+	u8 partner_tx_flow_ctrl_en;
+	u8 partner_rx_flow_ctrl_en;
+	u8 partner_adv_pause;
+	u8 sfp_tx_fault;
+	u8 padding4[6];
+
+	u32 speed;
+	u32 partner_adv_speed;
+
+	u32 capability_speed;
+
+	/* Forced vlan */
+	u16 pvid;
+	u16 padding5;
+};
+
+struct ecore_bulletin {
+	dma_addr_t phys;
+	struct ecore_bulletin_content *p_virt;
+	u32 size;
+};
+
+#ifndef print_enum
+enum {
+/*!!!!! Make sure to update STRINGS structure accordingly !!!!!*/
+
+	CHANNEL_TLV_NONE,	/* ends tlv sequence */
+	CHANNEL_TLV_ACQUIRE,
+	CHANNEL_TLV_VPORT_START,
+	CHANNEL_TLV_VPORT_UPDATE,
+	CHANNEL_TLV_VPORT_TEARDOWN,
+	CHANNEL_TLV_START_RXQ,
+	CHANNEL_TLV_START_TXQ,
+	CHANNEL_TLV_STOP_RXQS,
+	CHANNEL_TLV_STOP_TXQS,
+	CHANNEL_TLV_UPDATE_RXQ,
+	CHANNEL_TLV_INT_CLEANUP,
+	CHANNEL_TLV_CLOSE,
+	CHANNEL_TLV_RELEASE,
+	CHANNEL_TLV_LIST_END,
+	CHANNEL_TLV_UCAST_FILTER,
+	CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
+	CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH,
+	CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
+	CHANNEL_TLV_VPORT_UPDATE_MCAST,
+	CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM,
+	CHANNEL_TLV_VPORT_UPDATE_RSS,
+	CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN,
+	CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
+	CHANNEL_TLV_MAX
+/*!!!!! Make sure to update STRINGS structure accordingly !!!!!*/
+};
+extern const char *ecore_channel_tlvs_string[];
+
+#else
+print_enum(channel_tlvs, CHANNEL_TLV_NONE,	/* ends tlv sequence */
+	   CHANNEL_TLV_ACQUIRE,
+	   CHANNEL_TLV_VPORT_START,
+	   CHANNEL_TLV_VPORT_UPDATE,
+	   CHANNEL_TLV_VPORT_TEARDOWN,
+	   CHANNEL_TLV_SETUP_RXQ,
+	   CHANNEL_TLV_SETUP_TXQ,
+	   CHANNEL_TLV_STOP_RXQS,
+	   CHANNEL_TLV_STOP_TXQS,
+	   CHANNEL_TLV_UPDATE_RXQ,
+	   CHANNEL_TLV_INT_CLEANUP,
+	   CHANNEL_TLV_CLOSE,
+	   CHANNEL_TLV_RELEASE,
+	   CHANNEL_TLV_LIST_END,
+	   CHANNEL_TLV_UCAST_FILTER,
+	   CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
+	   CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH,
+	   CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
+	   CHANNEL_TLV_VPORT_UPDATE_MCAST,
+	   CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM,
+	   CHANNEL_TLV_VPORT_UPDATE_RSS,
+	   CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN,
+	   CHANNEL_TLV_VPORT_UPDATE_SGE_TPA, CHANNEL_TLV_MAX);
+#endif
+
+#endif /* __ECORE_VF_PF_IF_H__ */
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 181300e..a05f8e6 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -821,9 +821,27 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
 		return -ENOMEM;
 	}
 
-	ether_addr_copy((struct ether_addr *)edev->hwfns[0].
+	if (!is_vf)
+		ether_addr_copy((struct ether_addr *)edev->hwfns[0].
 				hw_info.hw_mac_addr,
 				&eth_dev->data->mac_addrs[0]);
+	else {
+		ecore_vf_read_bulletin(&edev->hwfns[0], &bulletin_change);
+		if (bulletin_change) {
+			is_mac_exist =
+			    ecore_vf_bulletin_get_forced_mac(&edev->hwfns[0],
+							     vf_mac,
+							     &is_mac_forced);
+			if (is_mac_exist && is_mac_forced) {
+				DP_INFO(edev, "VF macaddr received from PF\n");
+				ether_addr_copy((struct ether_addr *)&vf_mac,
+						&eth_dev->data->mac_addrs[0]);
+			} else {
+				DP_NOTICE(edev, false,
+					  "No VF macaddr assigned\n");
+			}
+		}
+	}
 
 	eth_dev->dev_ops = &qede_eth_dev_ops;
 
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index f87c369..6d80ceb 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -19,14 +19,14 @@
 #include "base/ecore.h"
 #include "base/ecore_dev_api.h"
 #include "base/ecore_l2_api.h"
-#include "base/ecore_sp_api.h"
-#include "base/ecore_mcp_api.h"
+#include "base/ecore_vf_api.h"
 #include "base/ecore_hsi_common.h"
 #include "base/ecore_int_api.h"
 #include "base/ecore_chain.h"
 #include "base/ecore_status.h"
 #include "base/ecore_hsi_eth.h"
 #include "base/ecore_dev_api.h"
+#include "base/ecore_iov_api.h"
 
 #include "qede_logs.h"
 #include "qede_if.h"
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 1f25908..46d4b6c 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -171,12 +171,14 @@ static int qed_slowpath_start(struct ecore_dev *edev,
 #endif
 
 #ifdef CONFIG_QED_BINARY_FW
-	rc = qed_load_firmware_data(edev);
-	if (rc) {
-		DP_NOTICE(edev, true,
-			  "Failed to find fw file %s\n",
-			  QEDE_FW_FILE_NAME);
-		goto err;
+	if (IS_PF(edev)) {
+		rc = qed_load_firmware_data(edev);
+		if (rc) {
+			DP_NOTICE(edev, true,
+				  "Failed to find fw file %s\n",
+				  QEDE_FW_FILE_NAME);
+			goto err;
+		}
 	}
 #endif
 
@@ -188,17 +190,20 @@ static int qed_slowpath_start(struct ecore_dev *edev,
 	edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
 
 	/* Should go with CONFIG_QED_BINARY_FW */
-	/* Allocate stream for unzipping */
-	rc = qed_alloc_stream_mem(edev);
-	if (rc) {
-		DP_NOTICE(edev, true,
-		"Failed to allocate stream memory\n");
-		goto err2;
+	if (IS_PF(edev)) {
+		/* Allocate stream for unzipping */
+		rc = qed_alloc_stream_mem(edev);
+		if (rc) {
+			DP_NOTICE(edev, true,
+			"Failed to allocate stream memory\n");
+			goto err2;
+		}
 	}
 
 	/* Start the slowpath */
 #ifdef CONFIG_QED_BINARY_FW
-	data = edev->firmware;
+	if (IS_PF(edev))
+		data = edev->firmware;
 #endif
 	allow_npar_tx_switching = npar_tx_switching ? true : false;
 
@@ -224,19 +229,21 @@ static int qed_slowpath_start(struct ecore_dev *edev,
 
 	DP_INFO(edev, "HW inited and function started\n");
 
-	hwfn = ECORE_LEADING_HWFN(edev);
-	drv_version.version = (params->drv_major << 24) |
+	if (IS_PF(edev)) {
+		hwfn = ECORE_LEADING_HWFN(edev);
+		drv_version.version = (params->drv_major << 24) |
 		    (params->drv_minor << 16) |
 		    (params->drv_rev << 8) | (params->drv_eng);
-	/* TBD: strlcpy() */
-	strncpy((char *)drv_version.name, (const char *)params->name,
+		/* TBD: strlcpy() */
+		strncpy((char *)drv_version.name, (const char *)params->name,
 			MCP_DRV_VER_STR_SIZE - 4);
-	rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
+		rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
 						&drv_version);
-	if (rc) {
-		DP_NOTICE(edev, true,
-			  "Failed sending drv version command\n");
-		return rc;
+		if (rc) {
+			DP_NOTICE(edev, true,
+				  "Failed sending drv version command\n");
+			return rc;
+		}
 	}
 
 	ecore_reset_vport_stats(edev);
@@ -248,9 +255,11 @@ err2:
 	ecore_resc_free(edev);
 err:
 #ifdef CONFIG_QED_BINARY_FW
-	if (edev->firmware)
-		rte_free(edev->firmware);
-	edev->firmware = NULL;
+	if (IS_PF(edev)) {
+		if (edev->firmware)
+			rte_free(edev->firmware);
+		edev->firmware = NULL;
+	}
 #endif
 	return rc;
 }
@@ -266,28 +275,38 @@ qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
 	rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
 	       ETHER_ADDR_LEN);
 
-	dev_info->fw_major = FW_MAJOR_VERSION;
-	dev_info->fw_minor = FW_MINOR_VERSION;
-	dev_info->fw_rev = FW_REVISION_VERSION;
-	dev_info->fw_eng = FW_ENGINEERING_VERSION;
-	dev_info->mf_mode = edev->mf_mode;
-	dev_info->tx_switching = tx_switching ? true : false;
+	if (IS_PF(edev)) {
+		dev_info->fw_major = FW_MAJOR_VERSION;
+		dev_info->fw_minor = FW_MINOR_VERSION;
+		dev_info->fw_rev = FW_REVISION_VERSION;
+		dev_info->fw_eng = FW_ENGINEERING_VERSION;
+		dev_info->mf_mode = edev->mf_mode;
+		dev_info->tx_switching = tx_switching ? true : false;
+	} else {
+		ecore_vf_get_fw_version(&edev->hwfns[0], &dev_info->fw_major,
+					&dev_info->fw_minor, &dev_info->fw_rev,
+					&dev_info->fw_eng);
+	}
 
-	ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
-	if (ptt) {
-		ecore_mcp_get_mfw_ver(edev, ptt,
+	if (IS_PF(edev)) {
+		ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
+		if (ptt) {
+			ecore_mcp_get_mfw_ver(edev, ptt,
 					      &dev_info->mfw_rev, NULL);
 
-		ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
+			ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
 						 &dev_info->flash_size);
 
-		/* Workaround to allow PHY-read commands for
-		 * B0 bringup.
-		 */
-		if (ECORE_IS_BB_B0(edev))
-			dev_info->flash_size = 0xffffffff;
+			/* Workaround to allow PHY-read commands for
+			 * B0 bringup.
+			 */
+			if (ECORE_IS_BB_B0(edev))
+				dev_info->flash_size = 0xffffffff;
 
-		ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
+			ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
+		}
+	} else {
+		ecore_mcp_get_mfw_ver(edev, ptt, &dev_info->mfw_rev, NULL);
 	}
 
 	return 0;
@@ -303,18 +322,31 @@ qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
 
 	info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
 
-	info->num_queues = 0;
-	for_each_hwfn(edev, i)
+	if (IS_PF(edev)) {
+		info->num_queues = 0;
+		for_each_hwfn(edev, i)
 		    info->num_queues +=
 		    FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
 
-	info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN);
+		info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN);
 
-	rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
+		rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
 			   ETHER_ADDR_LEN);
+	} else {
+		ecore_vf_get_num_rxqs(&edev->hwfns[0], &info->num_queues);
+
+		ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
+					      &info->num_vlan_filters);
+
+		ecore_vf_get_port_mac(&edev->hwfns[0],
+				      (uint8_t *) &info->port_mac);
+	}
 
 	qed_fill_dev_info(edev, &info->common);
 
+	if (IS_VF(edev))
+		memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
+
 	return 0;
 }
 
@@ -376,11 +408,18 @@ static void qed_fill_link(struct ecore_hwfn *hwfn,
 	memset(if_link, 0, sizeof(*if_link));
 
 	/* Prepare source inputs */
-	rte_memcpy(&params, ecore_mcp_get_link_params(hwfn),
+	if (IS_PF(hwfn->p_dev)) {
+		rte_memcpy(&params, ecore_mcp_get_link_params(hwfn),
 		       sizeof(params));
-	rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
-	rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
+		rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
+		rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
 		       sizeof(link_caps));
+	} else {
+		ecore_vf_read_bulletin(hwfn, &change);
+		ecore_vf_get_link_params(hwfn, &params);
+		ecore_vf_get_link_state(hwfn, &link);
+		ecore_vf_get_link_caps(hwfn, &link_caps);
+	}
 
 	/* Set the link parameters to pass to protocol driver */
 	if (link.link_up)
@@ -426,6 +465,9 @@ static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
 	struct ecore_mcp_link_params *link_params;
 	int rc;
 
+	if (IS_VF(edev))
+		return 0;
+
 	/* The link should be set only once per PF */
 	hwfn = &edev->hwfns[0];
 
@@ -465,6 +507,9 @@ static int qed_drain(struct ecore_dev *edev)
 	struct ecore_ptt *ptt;
 	int i, rc;
 
+	if (IS_VF(edev))
+		return 0;
+
 	for_each_hwfn(edev, i) {
 		hwfn = &edev->hwfns[i];
 		ptt = ecore_ptt_acquire(hwfn);
@@ -517,9 +562,15 @@ static int qed_slowpath_stop(struct ecore_dev *edev)
 	if (!edev)
 		return -ENODEV;
 
-	qed_free_stream_mem(edev);
+	if (IS_PF(edev)) {
+		qed_free_stream_mem(edev);
 
-	qed_nic_stop(edev);
+#ifdef CONFIG_QED_SRIOV
+		if (IS_QED_ETH_IF(edev))
+			qed_sriov_disable(edev, true);
+#endif
+		qed_nic_stop(edev);
+	}
 
 	qed_nic_reset(edev);
 
-- 
1.7.10.3



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