[dpdk-dev] [PATCH v2 2/2] net/mlx5: fix PMD specific parameters defaults

[Shahaf Shuler]

With the Enhanced multi packet send addition, the defaults were made
in order to get the maximum out of the box performance.
Features like tso, don't use the enhanced send, however the defaults
are still valid. This cause Tx queue creation to fail.

Fixes: aea00c008140 ("net/mlx5: add hardware TSO support")

Signed-off-by: Shahaf Shuler <shahafs at mellanox.com>
Signed-off-by: Raslan Darawsheh <rasland at mellanox.com>
Acked-by: Yongseok Koh <yskoh at mellanox.com>
---
on v2:
* changed MLX5_UNSET to MLX5_ARG_UNSET.
---
 drivers/net/mlx5/mlx5.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 78724a1bb..c48fea82b 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -610,13 +610,6 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 		priv->pd = pd;
 		priv->mtu = ETHER_MTU;
 		priv->mps = mps; /* Enable MPW by default if supported. */
-		/* Set default values for Enhanced MPW, a.k.a MPWv2. */
-		if (mps == MLX5_MPW_ENHANCED) {
-			priv->mpw_hdr_dseg = 0;
-			priv->txqs_inline = MLX5_EMPW_MIN_TXQS;
-			priv->inline_max_packet_sz = MLX5_EMPW_MAX_INLINE_LEN;
-			priv->txq_inline = MLX5_WQE_SIZE_MAX - MLX5_WQE_SIZE;
-		}
 		priv->cqe_comp = 1; /* Enable compression by default. */
 		priv->tunnel_en = tunnel_en;
 		err = mlx5_args(&args, pci_dev->device.devargs);
@@ -688,6 +681,17 @@ mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 		INFO("%sMPS is %s",
 		     priv->mps == MLX5_MPW_ENHANCED ? "Enhanced " : "",
 		     priv->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
+		/* Set default values for Enhanced MPW, a.k.a MPWv2. */
+		if (priv->mps == MLX5_MPW_ENHANCED) {
+			if (args.txqs_inline == MLX5_ARG_UNSET)
+				priv->txqs_inline = MLX5_EMPW_MIN_TXQS;
+			if (args.inline_max_packet_sz == MLX5_ARG_UNSET)
+				priv->inline_max_packet_sz =
+					MLX5_EMPW_MAX_INLINE_LEN;
+			if (args.txq_inline == MLX5_ARG_UNSET)
+				priv->txq_inline = MLX5_WQE_SIZE_MAX -
+						   MLX5_WQE_SIZE;
+		}
 		/* Allocate and register default RSS hash keys. */
 		priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
 					    sizeof((*priv->rss_conf)[0]), 0);
-- 
2.12.0