[dpdk-dev] [PATCH] app/test-pmd: expand test-pmd queue threshold size of RED parameters

Singh, Jasvinder jasvinder.singh at intel.com
Tue Dec 4 13:28:46 CET 2018



> -----Original Message-----
> From: Xu, Rosen
> Sent: Monday, November 26, 2018 8:36 AM
> To: dev at dpdk.org
> Cc: Dumitrescu, Cristian <cristian.dumitrescu at intel.com>; Lu, Wenzhuo
> <wenzhuo.lu at intel.com>; Singh, Jasvinder <jasvinder.singh at intel.com>; Xu,
> Rosen <rosen.xu at intel.com>; Yigit, Ferruh <ferruh.yigit at intel.com>; Wu,
> Jingjing <jingjing.wu at intel.com>
> Subject: [PATCH] app/test-pmd: expand test-pmd queue threshold size of RED
> parameters
> 
> There's very commonly that more than 4G DDR memory in NIC for HQoS, so
> right now the queue threshold size of RED needs to expand to uint64_t. For
> struct rte_tm_red_params, it has been fixed, but for test-pmd TM
> configuration, it hasn't been fixed. This patch fixes it.
> 
> Fixes: bddc2f40b594 ("app/testpmd: add commands for shaper and wred
> profiles")
> Cc: jasvinder.singh at intel.com
> 
> Signed-off-by: Rosen Xu <rosen.xu at intel.com>
> ---
>  app/test-pmd/cmdline_tm.c | 24 ++++++++++++------------
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/app/test-pmd/cmdline_tm.c b/app/test-pmd/cmdline_tm.c index
> 4c76348..1012084 100644
> --- a/app/test-pmd/cmdline_tm.c
> +++ b/app/test-pmd/cmdline_tm.c
> @@ -1156,18 +1156,18 @@ struct
> cmd_add_port_tm_node_wred_profile_result {
>  	uint16_t port_id;
>  	uint32_t wred_profile_id;
>  	cmdline_fixed_string_t color_g;
> -	uint16_t min_th_g;
> -	uint16_t max_th_g;
> +	uint64_t min_th_g;
> +	uint64_t max_th_g;
>  	uint16_t maxp_inv_g;
>  	uint16_t wq_log2_g;
>  	cmdline_fixed_string_t color_y;
> -	uint16_t min_th_y;
> -	uint16_t max_th_y;
> +	uint64_t min_th_y;
> +	uint64_t max_th_y;
>  	uint16_t maxp_inv_y;
>  	uint16_t wq_log2_y;
>  	cmdline_fixed_string_t color_r;
> -	uint16_t min_th_r;
> -	uint16_t max_th_r;
> +	uint64_t min_th_r;
> +	uint64_t max_th_r;
>  	uint16_t maxp_inv_r;
>  	uint16_t wq_log2_r;
>  };
> @@ -1206,11 +1206,11 @@ struct
> cmd_add_port_tm_node_wred_profile_result {  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_min_th_g =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> -			min_th_g, UINT16);
> +			min_th_g, UINT64);
>  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_max_th_g =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> -			max_th_g, UINT16);
> +			max_th_g, UINT64);
>  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_maxp_inv_g =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> @@ -1226,11 +1226,11 @@ struct
> cmd_add_port_tm_node_wred_profile_result {  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_min_th_y =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> -			min_th_y, UINT16);
> +			min_th_y, UINT64);
>  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_max_th_y =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> -			max_th_y, UINT16);
> +			max_th_y, UINT64);
>  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_maxp_inv_y =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> @@ -1246,11 +1246,11 @@ struct
> cmd_add_port_tm_node_wred_profile_result {  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_min_th_r =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> -			min_th_r, UINT16);
> +			min_th_r, UINT64);
>  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_max_th_r =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> -			max_th_r, UINT16);
> +			max_th_r, UINT64);
>  cmdline_parse_token_num_t
> cmd_add_port_tm_node_wred_profile_maxp_inv_r =
>  	TOKEN_NUM_INITIALIZER(
>  		struct cmd_add_port_tm_node_wred_profile_result,
> --


Reviewed-by: Jasvinder Singh <jasvinder.singh at intel.com>




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