[dpdk-dev] [PATCH] maintainers: use registered name for OCTEON TX references

Anoob Joseph anoob.joseph at caviumnetworks.com
Wed Oct 10 04:50:56 CEST 2018


'OCTEON TX' is the registered name. All other usages need to be fixed.

Signed-off-by: Anoob Joseph <anoob.joseph at caviumnetworks.com>
---
 MAINTAINERS                                   |  8 ++++----
 doc/guides/compressdevs/features/octeontx.ini |  2 +-
 doc/guides/compressdevs/octeontx.rst          | 24 ++++++++++++------------
 doc/guides/eventdevs/octeontx.rst             | 20 ++++++++++----------
 doc/guides/mempool/octeontx.rst               | 18 +++++++++---------
 doc/guides/nics/octeontx.rst                  | 26 +++++++++++++-------------
 doc/guides/platform/octeontx.rst              | 16 ++++++++--------
 drivers/event/octeontx/ssovf_evdev.h          |  2 +-
 drivers/mempool/octeontx/octeontx_fpavf.h     |  2 +-
 drivers/net/octeontx/base/octeontx_io.h       |  2 +-
 10 files changed, 60 insertions(+), 60 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 2b5f920..be04529 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -514,7 +514,7 @@ F: drivers/net/liquidio/
 F: doc/guides/nics/liquidio.rst
 F: doc/guides/nics/features/liquidio.ini
 
-Cavium OcteonTX
+Cavium OCTEON TX
 M: Jerin Jacob <jerin.jacob at caviumnetworks.com>
 F: drivers/common/octeontx/
 F: drivers/mempool/octeontx/
@@ -886,7 +886,7 @@ Compression Drivers
 M: Pablo de Lara <pablo.de.lara.guarch at intel.com>
 T: git://dpdk.org/next/dpdk-next-crypto
 
-Cavium OCTEONTX zipvf
+Cavium OCTEON TX zipvf
 M: Ashish Gupta <ashish.gupta at cavium.com>
 F: drivers/compress/octeontx/
 F: doc/guides/compressdevs/octeontx.rst
@@ -915,12 +915,12 @@ Eventdev Drivers
 M: Jerin Jacob <jerin.jacob at caviumnetworks.com>
 T: git://dpdk.org/next/dpdk-next-eventdev
 
-Cavium OCTEONTX ssovf
+Cavium OCTEON TX ssovf
 M: Jerin Jacob <jerin.jacob at caviumnetworks.com>
 F: drivers/event/octeontx/
 F: doc/guides/eventdevs/octeontx.rst
 
-Cavium OCTEONTX timvf
+Cavium OCTEON TX timvf
 M: Pavan Nikhilesh <pbhagavatula at caviumnetworks.com>
 F: drivers/event/octeontx/timvf_*
 
diff --git a/doc/guides/compressdevs/features/octeontx.ini b/doc/guides/compressdevs/features/octeontx.ini
index 884a8b0..cc8b025 100644
--- a/doc/guides/compressdevs/features/octeontx.ini
+++ b/doc/guides/compressdevs/features/octeontx.ini
@@ -1,7 +1,7 @@
 ;
 ; Refer to default.ini for the full list of available PMD features.
 ;
-; Supported features of 'OCTEONTX ZIP' compression driver.
+; Supported features of 'OCTEON TX ZIP' compression driver.
 ;
 [Features]
 HW Accelerated = Y
diff --git a/doc/guides/compressdevs/octeontx.rst b/doc/guides/compressdevs/octeontx.rst
index 5a32d5d..05dbd68 100644
--- a/doc/guides/compressdevs/octeontx.rst
+++ b/doc/guides/compressdevs/octeontx.rst
@@ -1,12 +1,12 @@
 ..  SPDX-License-Identifier: BSD-3-Clause
     Copyright(c) 2018 Cavium Networks.
 
-Octeontx ZIP Compression Poll Mode Driver
-=========================================
+OCTEON TX ZIP Compression Poll Mode Driver
+==========================================
 
-The Octeontx ZIP PMD (**librte_pmd_octeontx_zip**) provides poll mode
+The OCTEON TX ZIP PMD (**librte_pmd_octeontx_zip**) provides poll mode
 compression & decompression driver for ZIP HW offload device, found in
-**Cavium OCTEONTX** SoC family.
+**Cavium OCTEON TX** SoC family.
 
 More information can be found at `Cavium, Inc Official Website
 <http://www.cavium.com/OCTEON-TX_ARM_Processors.html>`_.
@@ -14,7 +14,7 @@ More information can be found at `Cavium, Inc Official Website
 Features
 --------
 
-Octeontx ZIP PMD has support for:
+OCTEON TX ZIP PMD has support for:
 
 Compression/Decompression algorithm:
 
@@ -34,24 +34,24 @@ Limitations
 
 * Chained mbufs are not supported.
 
-Supported OCTEONTX SoCs
------------------------
+Supported OCTEON TX SoCs
+------------------------
 
 - CN83xx
 
 Steps To Setup Platform
 -----------------------
 
-   Octeontx SDK includes kernel image which provides Octeontx ZIP PF
+   OCTEON TX SDK includes kernel image which provides OCTEON TX ZIP PF
    driver to manage configuration of ZIPVF device
    Required version of SDK is "OCTEONTX-SDK-6.2.0-build35" or above.
 
    SDK can be install by using below command.
-   #rpm -ivh CTEONTX-SDK-6.2.0-build35.x86_64.rpm --force --nodeps
+   #rpm -ivh OCTEONTX-SDK-6.2.0-build35.x86_64.rpm --force --nodeps
    It will install OCTEONTX-SDK at following default location
    /usr/local/Cavium_Networks/OCTEONTX-SDK/
 
-   For more information on building and booting linux kernel on OCTEONTX
+   For more information on building and booting linux kernel on OCTEON TX
    please refer /usr/local/Cavium_Networks/OCTEONTX-SDK/docs/OcteonTX-SDK-UG_6.2.0.pdf.
 
    SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.
@@ -62,7 +62,7 @@ Installation
 Driver Compilation
 ~~~~~~~~~~~~~~~~~~
 
-To compile the OCTEONTX ZIP PMD for Linux arm64 gcc target, run the
+To compile the OCTEON TX ZIP PMD for Linux arm64 gcc target, run the
 following ``make`` command:
 
    .. code-block:: console
@@ -74,7 +74,7 @@ following ``make`` command:
 Initialization
 --------------
 
-The octeontx zip is exposed as pci device which consists of a set of
+The OCTEON TX zip is exposed as pci device which consists of a set of
 PCIe VF devices. On EAL initialization, ZIP PCIe VF devices will be
 probed. To use the PMD in an application, user must:
 
diff --git a/doc/guides/eventdevs/octeontx.rst b/doc/guides/eventdevs/octeontx.rst
index 18cfc7a..e276fd4 100644
--- a/doc/guides/eventdevs/octeontx.rst
+++ b/doc/guides/eventdevs/octeontx.rst
@@ -1,11 +1,11 @@
 ..  SPDX-License-Identifier: BSD-3-Clause
     Copyright(c) 2017 Cavium, Inc
 
-OCTEONTX SSOVF Eventdev Driver
-==============================
+OCTEON TX SSOVF Eventdev Driver
+===============================
 
-The OCTEONTX SSOVF PMD (**librte_pmd_octeontx_ssovf**) provides poll mode
-eventdev driver support for the inbuilt event device found in the **Cavium OCTEONTX**
+The OCTEON TX SSOVF PMD (**librte_pmd_octeontx_ssovf**) provides poll mode
+eventdev driver support for the inbuilt event device found in the **Cavium OCTEON TX**
 SoC family as well as their virtual functions (VF) in SR-IOV context.
 
 More information can be found at `Cavium, Inc Official Website
@@ -14,7 +14,7 @@ More information can be found at `Cavium, Inc Official Website
 Features
 --------
 
-Features of the OCTEONTX SSOVF PMD are:
+Features of the OCTEON TX SSOVF PMD are:
 
 - 64 Event queues
 - 32 Event ports
@@ -32,8 +32,8 @@ Features of the OCTEONTX SSOVF PMD are:
   time granularity of 1us.
 - Up to 64 event timer adapters.
 
-Supported OCTEONTX SoCs
------------------------
+Supported OCTEON TX SoCs
+------------------------
 - CN83xx
 
 Prerequisites
@@ -57,7 +57,7 @@ Please note that enabling debugging options may affect system performance.
 Driver Compilation
 ~~~~~~~~~~~~~~~~~~
 
-To compile the OCTEONTX SSOVF PMD for Linux arm64 gcc target, run the
+To compile the OCTEON TX SSOVF PMD for Linux arm64 gcc target, run the
 following ``make`` command:
 
 .. code-block:: console
@@ -69,7 +69,7 @@ following ``make`` command:
 Initialization
 --------------
 
-The octeontx eventdev is exposed as a vdev device which consists of a set
+The OCTEON TX eventdev is exposed as a vdev device which consists of a set
 of SSO group and work-slot PCIe VF devices. On EAL initialization,
 SSO PCIe VF devices will be probed and then the vdev device can be created
 from the application code, or from the EAL command line based on
@@ -90,7 +90,7 @@ Example:
 Selftest
 --------
 
-The functionality of octeontx eventdev can be verified using this option,
+The functionality of OCTEON TX eventdev can be verified using this option,
 various unit and functional tests are run to verify the sanity.
 The tests are run once the vdev creation is successfully complete.
 
diff --git a/doc/guides/mempool/octeontx.rst b/doc/guides/mempool/octeontx.rst
index b06bb61..e05aeb9 100644
--- a/doc/guides/mempool/octeontx.rst
+++ b/doc/guides/mempool/octeontx.rst
@@ -1,11 +1,11 @@
 ..  SPDX-License-Identifier: BSD-3-Clause
     Copyright(c) 2017 Cavium, Inc
 
-OCTEONTX FPAVF Mempool Driver
-=============================
+OCTEON TX FPAVF Mempool Driver
+==============================
 
-The OCTEONTX FPAVF PMD (**librte_mempool_octeontx**) is a mempool
-driver for offload mempool device found in **Cavium OCTEONTX** SoC
+The OCTEON TX FPAVF PMD (**librte_mempool_octeontx**) is a mempool
+driver for offload mempool device found in **Cavium OCTEON TX** SoC
 family.
 
 More information can be found at `Cavium, Inc Official Website
@@ -14,14 +14,14 @@ More information can be found at `Cavium, Inc Official Website
 Features
 --------
 
-Features of the OCTEONTX FPAVF PMD are:
+Features of the OCTEON TX FPAVF PMD are:
 
 - 32 SR-IOV Virtual functions
 - 32 Pools
 - HW mempool manager
 
-Supported OCTEONTX SoCs
------------------------
+Supported OCTEON TX SoCs
+------------------------
 
 - CN83xx
 
@@ -50,7 +50,7 @@ Please note that enabling debugging options may affect system performance.
 Driver Compilation
 ~~~~~~~~~~~~~~~~~~
 
-To compile the OCTEONTX FPAVF MEMPOOL PMD for Linux arm64 gcc target, run the
+To compile the OCTEON TX FPAVF MEMPOOL PMD for Linux arm64 gcc target, run the
 following ``make`` command:
 
 .. code-block:: console
@@ -62,7 +62,7 @@ following ``make`` command:
 Initialization
 --------------
 
-The octeontx fpavf mempool initialization similar to other mempool
+The OCTEON TX fpavf mempool initialization similar to other mempool
 drivers like ring. However user need to pass --base-virtaddr as
 command line input to application example test_mempool.c application.
 
diff --git a/doc/guides/nics/octeontx.rst b/doc/guides/nics/octeontx.rst
index f8eaaa6..f8111d3 100644
--- a/doc/guides/nics/octeontx.rst
+++ b/doc/guides/nics/octeontx.rst
@@ -1,11 +1,11 @@
 ..  SPDX-License-Identifier: BSD-3-Clause
     Copyright(c) 2017 Cavium, Inc
 
-OCTEONTX Poll Mode driver
-=========================
+OCTEON TX Poll Mode driver
+==========================
 
-The OCTEONTX ETHDEV PMD (**librte_pmd_octeontx**) provides poll mode ethdev
-driver support for the inbuilt network device found in the **Cavium OCTEONTX**
+The OCTEON TX ETHDEV PMD (**librte_pmd_octeontx**) provides poll mode ethdev
+driver support for the inbuilt network device found in the **Cavium OCTEON TX**
 SoC family as well as their virtual functions (VF) in SR-IOV context.
 
 More information can be found at `Cavium, Inc Official Website
@@ -14,7 +14,7 @@ More information can be found at `Cavium, Inc Official Website
 Features
 --------
 
-Features of the OCTEONTX Ethdev PMD are:
+Features of the OCTEON TX Ethdev PMD are:
 
 - Packet type information
 - Promiscuous mode
@@ -26,8 +26,8 @@ Features of the OCTEONTX Ethdev PMD are:
 - Lock-free Tx queue
 - HW offloaded `ethdev Rx queue` to `eventdev event queue` packet injection
 
-Supported OCTEONTX SoCs
------------------------
+Supported OCTEON TX SoCs
+------------------------
 
 - CN83xx
 
@@ -65,7 +65,7 @@ Driver compilation and testing
 Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
 for details.
 
-To compile the OCTEONTX PMD for Linux arm64 gcc target, run the
+To compile the OCTEON TX PMD for Linux arm64 gcc target, run the
 following ``make`` command:
 
 .. code-block:: console
@@ -122,7 +122,7 @@ following ``make`` command:
 Initialization
 --------------
 
-The octeontx ethdev pmd is exposed as a vdev device which consists of a set
+The OCTEON TX ethdev pmd is exposed as a vdev device which consists of a set
 of PKI and PKO PCIe VF devices. On EAL initialization,
 PKI/PKO PCIe VF devices will be probed and then the vdev device can be created
 from the application code, or from the EAL command line based on
@@ -156,21 +156,21 @@ Limitations
 
 ``octeontx_fpavf`` external mempool handler dependency
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-The OCTEONTX SoC family NIC has inbuilt HW assisted external mempool manager.
+The OCTEON TX SoC family NIC has inbuilt HW assisted external mempool manager.
 This driver will only work with ``octeontx_fpavf`` external mempool handler
 as it is the most performance effective way for packet allocation and Tx buffer
-recycling on OCTEONTX SoC platform.
+recycling on OCTEON TX SoC platform.
 
 CRC striping
 ~~~~~~~~~~~~
 
-The OCTEONTX SoC family NICs strip the CRC for every packets coming into the
+The OCTEON TX SoC family NICs strip the CRC for every packets coming into the
 host interface irrespective of the offload configuration.
 
 Maximum packet length
 ~~~~~~~~~~~~~~~~~~~~~
 
-The OCTEONTX SoC family NICs support a maximum of a 32K jumbo frame. The value
+The OCTEON TX SoC family NICs support a maximum of a 32K jumbo frame. The value
 is fixed and cannot be changed. So, even when the ``rxmode.max_rx_pkt_len``
 member of ``struct rte_eth_conf`` is set to a value lower than 32k, frames
 up to 32k bytes can still reach the host interface.
diff --git a/doc/guides/platform/octeontx.rst b/doc/guides/platform/octeontx.rst
index b0a99c3..9f75d2a 100644
--- a/doc/guides/platform/octeontx.rst
+++ b/doc/guides/platform/octeontx.rst
@@ -1,12 +1,12 @@
 ..  SPDX-License-Identifier: BSD-3-Clause
     Copyright(c) 2017 Cavium, Inc
 
-OCTEONTX Board Support Package
-==============================
+OCTEON TX Board Support Package
+===============================
 
-This doc has information about steps to setup octeontx platform
+This doc has information about steps to setup OCTEON TX platform
 and information about common offload hw block drivers of
-**Cavium OCTEONTX** SoC family.
+**Cavium OCTEON TX** SoC family.
 
 
 More information about SoC can be found at `Cavium, Inc Official Website
@@ -27,11 +27,11 @@ Steps To Setup Platform
 -----------------------
 
 There are three main pre-prerequisites for setting up Platform drivers on
-OCTEONTX compatible board:
+OCTEON TX compatible board:
 
-1. **OCTEONTX Linux kernel PF driver for Network acceleration HW blocks**
+1. **OCTEON TX Linux kernel PF driver for Network acceleration HW blocks**
 
-   The OCTEONTX Linux kernel drivers (includes the required PF driver for the
+   The OCTEON TX Linux kernel drivers (includes the required PF driver for the
    Platform drivers) are available on Github at `octeontx-kmod <https://github.com/caviumnetworks/octeontx-kmod>`_
    along with build, install and dpdk usage instructions.
 
@@ -48,7 +48,7 @@ OCTEONTX compatible board:
 
    As an alternative method, Platform drivers can also be executed using images provided
    as part of SDK from Cavium. The SDK includes all the above prerequisites necessary
-   to bring up a OCTEONTX board.
+   to bring up a OCTEON TX board.
 
    SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.
 
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index b1856c1..0e62215 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -84,7 +84,7 @@
 #define SSOVF_SELFTEST_ARG               ("selftest")
 
 /*
- * In Cavium OcteonTX SoC, all accesses to the device registers are
+ * In Cavium OCTEON TX SoC, all accesses to the device registers are
  * implictly strongly ordered. So, The relaxed version of IO operation is
  * safe to use with out any IO memory barriers.
  */
diff --git a/drivers/mempool/octeontx/octeontx_fpavf.h b/drivers/mempool/octeontx/octeontx_fpavf.h
index b00be13..e27c437 100644
--- a/drivers/mempool/octeontx/octeontx_fpavf.h
+++ b/drivers/mempool/octeontx/octeontx_fpavf.h
@@ -50,7 +50,7 @@
 #define OCTEONTX_FPAVF_BUF_OFFSET	128
 
 /*
- * In Cavium OcteonTX SoC, all accesses to the device registers are
+ * In Cavium OCTEON TX SoC, all accesses to the device registers are
  * implicitly strongly ordered. So, the relaxed version of IO operation is
  * safe to use with out any IO memory barriers.
  */
diff --git a/drivers/net/octeontx/base/octeontx_io.h b/drivers/net/octeontx/base/octeontx_io.h
index d51ded2..04b9ce1 100644
--- a/drivers/net/octeontx/base/octeontx_io.h
+++ b/drivers/net/octeontx/base/octeontx_io.h
@@ -10,7 +10,7 @@
 
 #include <rte_io.h>
 
-/* In Cavium OcteonTX SoC, all accesses to the device registers are
+/* In Cavium OCTEON TX SoC, all accesses to the device registers are
  * implicitly strongly ordered. So, The relaxed version of IO operation is
  * safe to use with out any IO memory barriers.
  */
-- 
2.7.4



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