[dpdk-dev] [PATCH v2 03/33] crypto/octeontx: add PCI probe and remove

[Anoob Joseph]

From: Ankur Dwivedi <ankur.dwivedi at caviumnetworks.com>

Adding basic PCI probe/remove functions for OcteonTX crypto device.
Initialization function for logging is also added.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi at caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph at caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy at caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram at caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman at caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan at caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree at caviumnetworks.com>
---
 drivers/crypto/octeontx/Makefile            |   5 ++
 drivers/crypto/octeontx/meson.build         |   4 +-
 drivers/crypto/octeontx/otx_cryptodev.c     | 132 ++++++++++++++++++++++++++++
 drivers/crypto/octeontx/otx_cryptodev.h     |  20 +++++
 drivers/crypto/octeontx/otx_cryptodev_ops.c |  15 ++++
 drivers/crypto/octeontx/otx_cryptodev_ops.h |  11 +++
 6 files changed, 186 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/octeontx/otx_cryptodev.c
 create mode 100644 drivers/crypto/octeontx/otx_cryptodev.h
 create mode 100644 drivers/crypto/octeontx/otx_cryptodev_ops.c
 create mode 100644 drivers/crypto/octeontx/otx_cryptodev_ops.h

diff --git a/drivers/crypto/octeontx/Makefile b/drivers/crypto/octeontx/Makefile
index 65bd02f..12fec75 100644
--- a/drivers/crypto/octeontx/Makefile
+++ b/drivers/crypto/octeontx/Makefile
@@ -20,6 +20,11 @@ LDLIBS += -lrte_pci -lrte_bus_pci
 VPATH += $(RTE_SDK)/drivers/crypto/octeontx
 
 CFLAGS += -O3 -DCPT_MODEL=CRYPTO_OCTEONTX
+CFLAGS += -I$(RTE_SDK)/drivers/common/cpt
+
+# PMD code
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev.c
+SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += otx_cryptodev_ops.c
 
 # export include files
 SYMLINK-y-include +=
diff --git a/drivers/crypto/octeontx/meson.build b/drivers/crypto/octeontx/meson.build
index 261bb77..6564090 100644
--- a/drivers/crypto/octeontx/meson.build
+++ b/drivers/crypto/octeontx/meson.build
@@ -7,6 +7,8 @@ endif
 deps += ['bus_pci']
 name = 'octeontx_crypto'
 
-sources = files()
+sources = files('otx_cryptodev.c',
+		'otx_cryptodev_ops.c')
 
 cflags += '-DCPT_MODEL=CRYPTO_OCTEONTX'
+includes += include_directories('../../common/cpt')
diff --git a/drivers/crypto/octeontx/otx_cryptodev.c b/drivers/crypto/octeontx/otx_cryptodev.c
new file mode 100644
index 0000000..df88a84
--- /dev/null
+++ b/drivers/crypto/octeontx/otx_cryptodev.c
@@ -0,0 +1,132 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Cavium, Inc
+ */
+
+#include <rte_bus_pci.h>
+#include <rte_common.h>
+#include <rte_cryptodev.h>
+#include <rte_cryptodev_pmd.h>
+#include <rte_log.h>
+#include <rte_pci.h>
+
+/* CPT common headers */
+#include "cpt_pmd_logs.h"
+
+#include "otx_cryptodev.h"
+#include "otx_cryptodev_ops.h"
+
+static int otx_cryptodev_logtype;
+
+static struct rte_pci_id pci_id_cpt_table[] = {
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, CPT_81XX_PCI_VF_DEVICE_ID),
+	},
+	/* sentinel */
+	{
+	.device_id = 0
+	},
+};
+
+static void
+otx_cpt_init_log(void)
+{
+	/* Bus level logs */
+	otx_cryptodev_logtype = rte_log_register("pmd.crypto.octeontx");
+	if (otx_cryptodev_logtype >= 0)
+		rte_log_set_level(otx_cryptodev_logtype, RTE_LOG_NOTICE);
+}
+
+static void
+otx_cpt_logtype_init(void)
+{
+	cpt_logtype = otx_cryptodev_logtype;
+}
+
+static int
+otx_cpt_pci_probe(struct rte_pci_driver *pci_drv,
+			struct rte_pci_device *pci_dev)
+{
+	struct rte_cryptodev *cryptodev;
+	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+	int retval;
+
+	if (pci_drv == NULL)
+		return -ENODEV;
+
+	rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+	cryptodev = rte_cryptodev_pmd_allocate(name, rte_socket_id());
+	if (cryptodev == NULL)
+		return -ENOMEM;
+
+	cryptodev->device = &pci_dev->device;
+	cryptodev->device->driver = &pci_drv->driver;
+	cryptodev->driver_id = otx_cryptodev_driver_id;
+
+	/* init user callbacks */
+	TAILQ_INIT(&(cryptodev->link_intr_cbs));
+
+	/* init logtype used in common */
+	otx_cpt_logtype_init();
+
+	/* Invoke PMD device initialization function */
+	retval = otx_cpt_dev_create(cryptodev);
+	if (retval == 0)
+		return 0;
+
+	CPT_LOG_ERR("[DRV %s]: Failed to create device "
+			"(vendor_id: 0x%x device_id: 0x%x",
+			pci_drv->driver.name,
+			(unsigned int) pci_dev->id.vendor_id,
+			(unsigned int) pci_dev->id.device_id);
+
+	cryptodev->attached = RTE_CRYPTODEV_DETACHED;
+
+	return -ENXIO;
+}
+
+static int
+otx_cpt_pci_remove(struct rte_pci_device *pci_dev)
+{
+	struct rte_cryptodev *cryptodev;
+	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+
+	if (pci_dev == NULL)
+		return -EINVAL;
+
+	rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+	cryptodev = rte_cryptodev_pmd_get_named_dev(name);
+	if (cryptodev == NULL)
+		return -ENODEV;
+
+	if (pci_dev->driver == NULL)
+		return -ENODEV;
+
+	/* free crypto device */
+	rte_cryptodev_pmd_release_device(cryptodev);
+
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+		rte_free(cryptodev->data->dev_private);
+
+	cryptodev->device = NULL;
+	cryptodev->device->driver = NULL;
+	cryptodev->data = NULL;
+
+	return 0;
+}
+
+static struct rte_pci_driver otx_cryptodev_pmd = {
+		.id_table = pci_id_cpt_table,
+		.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
+		.probe = otx_cpt_pci_probe,
+		.remove = otx_cpt_pci_remove,
+};
+
+static struct cryptodev_driver otx_cryptodev_drv;
+
+RTE_INIT(otx_cpt_init_log);
+RTE_PMD_REGISTER_PCI(CRYPTODEV_NAME_OCTEONTX_PMD, otx_cryptodev_pmd);
+RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX_PMD, pci_id_cpt_table);
+RTE_PMD_REGISTER_CRYPTO_DRIVER(otx_cryptodev_drv, otx_cryptodev_pmd.driver,
+		otx_cryptodev_driver_id);
diff --git a/drivers/crypto/octeontx/otx_cryptodev.h b/drivers/crypto/octeontx/otx_cryptodev.h
new file mode 100644
index 0000000..99d3346
--- /dev/null
+++ b/drivers/crypto/octeontx/otx_cryptodev.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Cavium, Inc
+ */
+
+#ifndef _OTX_CRYPTODEV_H_
+#define _OTX_CRYPTODEV_H_
+
+/* Cavium OcteonTX Crypto PMD device name */
+#define CRYPTODEV_NAME_OCTEONTX_PMD	crypto_octeontx
+
+/* Device ID */
+#define PCI_VENDOR_ID_CAVIUM		    0x177d
+#define CPT_81XX_PCI_VF_DEVICE_ID	    0xa041
+
+/*
+ * Crypto device driver ID
+ */
+uint8_t otx_cryptodev_driver_id;
+
+#endif /* _OTX_CRYPTODEV_H_ */
diff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.c b/drivers/crypto/octeontx/otx_cryptodev_ops.c
new file mode 100644
index 0000000..1b5f108
--- /dev/null
+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Cavium, Inc
+ */
+
+#include <rte_cryptodev.h>
+
+#include "otx_cryptodev.h"
+#include "otx_cryptodev_ops.h"
+
+int
+otx_cpt_dev_create(struct rte_cryptodev *c_dev)
+{
+	RTE_SET_USED(c_dev);
+	return 0;
+}
diff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.h b/drivers/crypto/octeontx/otx_cryptodev_ops.h
new file mode 100644
index 0000000..3f2d829
--- /dev/null
+++ b/drivers/crypto/octeontx/otx_cryptodev_ops.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2018 Cavium, Inc
+ */
+
+#ifndef _OTX_CRYPTODEV_OPS_H_
+#define _OTX_CRYPTODEV_OPS_H_
+
+int
+otx_cpt_dev_create(struct rte_cryptodev *c_dev);
+
+#endif /* _OTX_CRYPTODEV_OPS_H_ */
-- 
2.7.4