[dpdk-dev] [PATCH v8 2/4] meson: add infra to support machine specific flags

Jerin Jacob Kollanukkaran jerinj at marvell.com
Fri Apr 12 08:07:08 CEST 2019



> -----Original Message-----
> From: Yongseok Koh <yskoh at mellanox.com>
> Sent: Friday, April 12, 2019 7:35 AM
> To: Pavan Nikhilesh Bhagavatula <pbhagavatula at marvell.com>
> Cc: Thomas Monjalon <thomas at monjalon.net>; dev <dev at dpdk.org>; Jerin
> Jacob Kollanukkaran <jerinj at marvell.com>; jerinjacobk at gmail.com
> Subject: [EXT] Re: [dpdk-dev] [PATCH v8 2/4] meson: add infra to support
> machine specific flags
> 
> External Email
> 
> I've tested it but still have an issue with old gcc.
> Even if -mcpu isn't set due to cc.has_argument(), -march isn't set either.
> So, it spews error due to lack of CRC feature.
> -march should have '+crc'. The error I got was:
> 
> > ninja: Entering directory `build'
> > [942/1452] Compiling C object
> 'drivers/drivers...c at sta/net_softnic_rte_eth_softnic_action.c.o'.
> > FAILED:
> >
> drivers/drivers@@tmp_rte_pmd_softnic at sta/net_softnic_rte_eth_softnic
> _a
> > ction.c.o cc -Idrivers/drivers@@tmp_rte_pmd_softnic at sta -Idrivers
> > -I../drivers -Idrivers/net/softnic -I../drivers/net/softnic
> > -Ilib/librte_ethdev -I../lib/librte_ethdev -I. -I../ -Iconfig
> > -I../config-Ilib/librte_eal/common/include
> > -I../lib/librte_eal/common/include
> > -I../lib/librte_eal/linux/eal/include -Ilib/librte_eal/common
> > -I../lib/librte_eal/common -Ilib/librte_eal/ common/include/arch/arm
> > -I../lib/librte_eal/common/include/arch/arm -Ilib/librte_eal
> > -I../lib/librte_eal -Ilib/librte_kvargs -I../lib/librte_kvargs
> > -Ilib/librte_net -I../lib/librte_net -Ilib/librte_mbuf
> > -I../lib/librte_mbuf -Ilib/librte_mempool -I../lib/librte_mempool
> > -Ilib/librte_ring -I../lib/librte_ring -Ilib/librte_cmdline
> > -I../lib/librte_cmdline -Ilib/lib rte_meter -I../lib/librte_meter
> > -Idrivers/bus/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux
> > -Ilib/librte_pci -I../lib/librte_pci -Idrivers/bus/vdev
> > -I../drivers/bus/vdev -Ilib/librte_pipeline -I../lib/librte_pipeline
> > -Ilib/librte_port -I../lib/librte_port -Ilib/librte_sched
> > -I../lib/librte_sched -Ilib/librte_ip_frag -I../lib/librte_ip_frag
> > -Ilib/librte_h ash -I../lib/librte_hash -Ilib/librte_cryptodev
> > -I../lib/librte_cryptodev -Ilib/librte_kni -I../lib/librte_kni
> > -Ilib/librte_table -I../lib/librte_table -Ilib/librte_lpm
> > -I../lib/librte_lpm -Ilib/librte_acl -I../lib/librte_acl -pipe
> > -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -O3 -include rte_config.h
> > -Wsign-compare -Wcast-qual -fPIC -D_GNU_SOURCE -DALLOW_EXPERI
> > MENTAL_API  -MD -MQ
> >
> 'drivers/drivers@@tmp_rte_pmd_softnic at sta/net_softnic_rte_eth_softnic
> _
> > action.c.o' -MF
> >
> 'drivers/drivers@@tmp_rte_pmd_softnic at sta/net_softnic_rte_eth_softnic
> _
> > action.c.o.d' -o
> >
> 'drivers/drivers@@tmp_rte_pmd_softnic at sta/net_softnic_rte_eth_softnic
> _
> > action.c.o' -c ../drivers/net/softnic/rte_eth_softnic_action.c
> > {standard input}: Assembler messages:
> > {standard input}:14: Error: selected processor does not support `crc32cx
> w3,w3,x0'
> > {standard input}:37: Error: selected processor does not support `crc32cx
> w1,w1,x3'
> > {standard input}:40: Error: selected processor does not support `crc32cx
> w0,w0,x2'
> 
> 
> My machine has 0x41(Arm) and 0xd08(cortex-a72). gcc is '4.8.5 20150623 (Red
> Hat 4.8.5-28)'

Are you testing with very latest master where the following patch available in build?
http://patches.dpdk.org/patch/52367/
It should fix that issue.


> 
> Thanks,
> Yongseok
> 
> 
> >
> >>
> >> The command output check can also be removed as it is handled when
> calling the command script itself.
> >
> > +1
> >
> >>
> >> Thoughts?
> >>
> >> PS. I think the safest way to set CACHELINE_SIZE is to read the cache
> >> type register[1] but sadly only few latest kernels have the support
> >> through sysfs
> >> (/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size)
> >
> > +1
> >
> > In summary, +3. LoL
> >
> > I'll also submit a patch to change the default cacheline size of
> > cortex-a72 with the new flags_*_extra[]
> >
> >
> > thanks,
> > Yongseok



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