[dpdk-dev] [PATCH 59/63] net/ice/base: remove Rx flex descriptor programming
Qi Zhang
qi.z.zhang at intel.com
Mon Aug 26 12:51:01 CEST 2019
Removing Rx flex descriptor metadata and flag programming from shared
code. As per HAS these registers cannot be written to as they are read
only. While non-secure NVMs allow write access to them, secure images
will not. The programming for all fields per RxDID is now handled in the
comms package.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar at intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr at intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang at intel.com>
---
drivers/net/ice/base/ice_common.c | 195 --------------------------------------
1 file changed, 195 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d2f903329..11e902ea1 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -11,35 +11,6 @@
#define ICE_PF_RESET_WAIT_COUNT 200
-#define ICE_PROG_FLEX_ENTRY(hw, rxdid, mdid, idx) \
- wr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(rxdid), \
- ((ICE_RX_OPC_MDID << \
- GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \
- GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \
- (((mdid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \
- GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M))
-
-#define ICE_PROG_FLEX_ENTRY_EXTRACT(hw, rxdid, protid, off, idx) \
- wr32((hw), GLFLXP_RXDID_FLX_WRD_##idx(rxdid), \
- ((ICE_RX_OPC_EXTRACT << \
- GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_S) & \
- GLFLXP_RXDID_FLX_WRD_##idx##_RXDID_OPCODE_M) | \
- (((protid) << GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_S) & \
- GLFLXP_RXDID_FLX_WRD_##idx##_PROT_MDID_M) | \
- (((off) << GLFLXP_RXDID_FLX_WRD_##idx##_EXTRACTION_OFFSET_S) & \
- GLFLXP_RXDID_FLX_WRD_##idx##_EXTRACTION_OFFSET_M))
-
-#define ICE_PROG_FLG_ENTRY(hw, rxdid, flg_0, flg_1, flg_2, flg_3, idx) \
- wr32((hw), GLFLXP_RXDID_FLAGS(rxdid, idx), \
- (((flg_0) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S) & \
- GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M) | \
- (((flg_1) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S) & \
- GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_M) | \
- (((flg_2) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S) & \
- GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_M) | \
- (((flg_3) << GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S) & \
- GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_M))
-
/**
* ice_set_mac_type - Sets MAC type
@@ -431,163 +402,6 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
}
/**
- * ice_init_flex_flags
- * @hw: pointer to the hardware structure
- * @prof_id: Rx Descriptor Builder profile ID
- *
- * Function to initialize Rx flex flags
- */
-static void ice_init_flex_flags(struct ice_hw *hw, enum ice_rxdid prof_id)
-{
- u8 idx = 0;
-
- /* Flex-flag fields (0-2) are programmed with FLG64 bits with layout:
- * flexiflags0[5:0] - TCP flags, is_packet_fragmented, is_packet_UDP_GRE
- * flexiflags1[3:0] - Not used for flag programming
- * flexiflags2[7:0] - Tunnel and VLAN types
- * 2 invalid fields in last index
- */
- switch (prof_id) {
- /* Rx flex flags are currently programmed for the NIC profiles only.
- * Different flag bit programming configurations can be added per
- * profile as needed.
- */
- case ICE_RXDID_FLEX_NIC:
- case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_FRG,
- ICE_FLG_UDP_GRE, ICE_FLG_PKT_DSI,
- ICE_FLG_FIN, idx++);
- /* flex flag 1 is not used for flexi-flag programming, skipping
- * these four FLG64 bits.
- */
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_SYN, ICE_FLG_RST,
- ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_PKT_DSI,
- ICE_FLG_PKT_DSI, ICE_FLG_EVLAN_x8100,
- ICE_FLG_EVLAN_x9100, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_VLAN_x8100,
- ICE_FLG_TNL_VLAN, ICE_FLG_TNL_MAC,
- ICE_FLG_TNL0, idx++);
- ICE_PROG_FLG_ENTRY(hw, prof_id, ICE_FLG_TNL1, ICE_FLG_TNL2,
- ICE_FLG_PKT_DSI, ICE_FLG_PKT_DSI, idx);
- break;
-
- default:
- ice_debug(hw, ICE_DBG_INIT,
- "Flag programming for profile ID %d not supported\n",
- prof_id);
- }
-}
-
-/**
- * ice_init_flex_flds
- * @hw: pointer to the hardware structure
- * @prof_id: Rx Descriptor Builder profile ID
- *
- * Function to initialize flex descriptors
- */
-static void ice_init_flex_flds(struct ice_hw *hw, enum ice_rxdid prof_id)
-{
- enum ice_prot_id protid_0, protid_1;
- u16 offset_0, offset_1;
- enum ice_flex_mdid mdid;
-
- switch (prof_id) {
- case ICE_RXDID_FLEX_NIC:
- case ICE_RXDID_FLEX_NIC_2:
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2);
-
- mdid = (prof_id == ICE_RXDID_FLEX_NIC_2) ?
- ICE_MDID_SRC_VSI : ICE_MDID_FLOW_ID_HIGH;
-
- ICE_PROG_FLEX_ENTRY(hw, prof_id, mdid, 3);
-
- ice_init_flex_flags(hw, prof_id);
- break;
- case ICE_RXDID_COMMS_GENERIC:
- case ICE_RXDID_COMMS_AUX_VLAN:
- case ICE_RXDID_COMMS_AUX_IPV4:
- case ICE_RXDID_COMMS_AUX_IPV6:
- case ICE_RXDID_COMMS_AUX_IPV6_FLOW:
- case ICE_RXDID_COMMS_AUX_TCP:
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_LOW, 0);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_RX_HASH_HIGH, 1);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_LOWER, 2);
- ICE_PROG_FLEX_ENTRY(hw, prof_id, ICE_MDID_FLOW_ID_HIGH, 3);
-
- if (prof_id == ICE_RXDID_COMMS_AUX_VLAN) {
- /* FlexiMD.4: VLAN1 - single or EVLAN (first for QinQ).
- * FlexiMD.5: VLAN2 - C-VLAN (second for QinQ).
- */
- protid_0 = ICE_PROT_EVLAN_O;
- offset_0 = 0;
- protid_1 = ICE_PROT_VLAN_O;
- offset_1 = 0;
- } else if (prof_id == ICE_RXDID_COMMS_AUX_IPV4) {
- /* FlexiMD.4: IPHDR1 - IPv4 header word 4, "TTL" and
- * "Protocol" fields.
- * FlexiMD.5: IPHDR0 - IPv4 header word 0, "Ver",
- * "Hdr Len" and "Type of Service" fields.
- */
- protid_0 = ICE_PROT_IPV4_OF_OR_S;
- offset_0 = 8;
- protid_1 = ICE_PROT_IPV4_OF_OR_S;
- offset_1 = 0;
- } else if (prof_id == ICE_RXDID_COMMS_AUX_IPV6) {
- /* FlexiMD.4: IPHDR1 - IPv6 header word 3,
- * "Next Header" and "Hop Limit" fields.
- * FlexiMD.5: IPHDR0 - IPv6 header word 0,
- * "Ver", "Traffic class" and high 4 bits of
- * "Flow Label" fields.
- */
- protid_0 = ICE_PROT_IPV6_OF_OR_S;
- offset_0 = 6;
- protid_1 = ICE_PROT_IPV6_OF_OR_S;
- offset_1 = 0;
- } else if (prof_id == ICE_RXDID_COMMS_AUX_IPV6_FLOW) {
- /* FlexiMD.4: IPHDR1 - IPv6 header word 1,
- * 16 low bits of the "Flow Label" field.
- * FlexiMD.5: IPHDR0 - IPv6 header word 0,
- * "Ver", "Traffic class" and high 4 bits
- * of "Flow Label" fields.
- */
- protid_0 = ICE_PROT_IPV6_OF_OR_S;
- offset_0 = 2;
- protid_1 = ICE_PROT_IPV6_OF_OR_S;
- offset_1 = 0;
- } else if (prof_id == ICE_RXDID_COMMS_AUX_TCP) {
- /* FlexiMD.4: TCPHDR - TCP header word 6,
- * "Data Offset" and "Flags" fields.
- * FlexiMD.5: Reserved
- */
- protid_0 = ICE_PROT_TCP_IL;
- offset_0 = 12;
- protid_1 = ICE_PROT_ID_INVAL;
- offset_1 = 0;
- } else {
- protid_0 = ICE_PROT_ID_INVAL;
- offset_0 = 0;
- protid_1 = ICE_PROT_ID_INVAL;
- offset_1 = 0;
- }
-
- ICE_PROG_FLEX_ENTRY_EXTRACT(hw, prof_id,
- protid_0, offset_0, 4);
- ICE_PROG_FLEX_ENTRY_EXTRACT(hw, prof_id,
- protid_1, offset_1, 5);
-
- ice_init_flex_flags(hw, prof_id);
- break;
- default:
- ice_debug(hw, ICE_DBG_INIT,
- "Field init for profile ID %d not supported\n",
- prof_id);
- }
-}
-
-/**
* ice_aq_set_mac_cfg
* @hw: pointer to the HW struct
* @max_frame_size: Maximum Frame Size to be supported
@@ -928,15 +742,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
if (status)
goto err_unroll_fltr_mgmt_struct;
-
- ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC);
- ice_init_flex_flds(hw, ICE_RXDID_FLEX_NIC_2);
- ice_init_flex_flds(hw, ICE_RXDID_COMMS_GENERIC);
- ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_VLAN);
- ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_IPV4);
- ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_IPV6);
- ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_IPV6_FLOW);
- ice_init_flex_flds(hw, ICE_RXDID_COMMS_AUX_TCP);
/* Obtain counter base index which would be used by flow director */
status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
if (status)
--
2.13.6
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