[dpdk-dev] [PATCH] common/octeontx2: fix to prevent STP instruction fissure

[jerinj at marvell.com]

From: Jerin Jacob <jerinj at marvell.com>

OTX2 AP core can sometimes fissure STP instructions when it is more
optimal to send such writes into the pipeline as 2 separate
instructions. However registers should be excluded from such
optimization. This commit ensures that no CSR write is ever fissured
by introducing zero cost workaround by setting STP pre-index by zero to
make sure OTX2 AP core prevent fissure.

Fixes: 8a4f835971f5 ("common/octeontx2: add IO handling APIs")

Signed-off-by: Jerin Jacob <jerinj at marvell.com>
---
 drivers/common/octeontx2/otx2_io_arm64.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/common/octeontx2/otx2_io_arm64.h b/drivers/common/octeontx2/otx2_io_arm64.h
index 468243c04..7e45329b3 100644
--- a/drivers/common/octeontx2/otx2_io_arm64.h
+++ b/drivers/common/octeontx2/otx2_io_arm64.h
@@ -14,7 +14,7 @@
 
 #define otx2_store_pair(val0, val1, addr) ({		\
 	asm volatile(					\
-	"stp %x[x0], %x[x1], [%x[p1]]"			\
+	"stp %x[x0], %x[x1], [%x[p1],#0]!"		\
 	::[x0]"r"(val0), [x1]"r"(val1), [p1]"r"(addr)	\
 	); })
 
-- 
2.22.0