[dpdk-dev] [PATCH 5/8] net/ice/base: improvements to Flow Director masking
Yang, Qiming
qiming.yang at intel.com
Fri Sep 27 07:27:30 CEST 2019
Hi, Qi
> -----Original Message-----
> From: Zhang, Qi Z
> Sent: Friday, September 27, 2019 12:17 PM
> To: Lu, Wenzhuo <wenzhuo.lu at intel.com>; Yang, Qiming
> <qiming.yang at intel.com>
> Cc: dev at dpdk.org; Ye, Xiaolong <xiaolong.ye at intel.com>; Zhang, Qi Z
> <qi.z.zhang at intel.com>; Nowlin, Dan <dan.nowlin at intel.com>; Stillwell Jr,
> Paul M <paul.m.stillwell.jr at intel.com>
> Subject: [PATCH 5/8] net/ice/base: improvements to Flow Director masking
>
> Currently, 3-tuple FD matching is implemented using masking. However, this
> is using up twenty-four of the thirty-two FD masks available. This patch uses
> the swap register more efficiently to implement the 3-tuple matches, which
> saves all FD masks for other uses.
>
> Added IPV6 versions of DSCP, TTL and Protocol fields for FD use.
>
> Signed-off-by: Dan Nowlin <dan.nowlin at intel.com>
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr at intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang at intel.com>
> ---
> drivers/net/ice/base/ice_flex_pipe.c | 71 +++++++++------------
> drivers/net/ice/base/ice_flex_type.h | 4 +-
> drivers/net/ice/base/ice_flow.c | 118 ++++++++++++++++++++---------------
> drivers/net/ice/base/ice_flow.h | 10 ++-
> 4 files changed, 108 insertions(+), 95 deletions(-)
>
> diff --git a/drivers/net/ice/base/ice_flex_pipe.c
> b/drivers/net/ice/base/ice_flex_pipe.c
> index 75bb87079..8f8cab86e 100644
> --- a/drivers/net/ice/base/ice_flex_pipe.c
> +++ b/drivers/net/ice/base/ice_flex_pipe.c
> @@ -1248,25 +1248,6 @@ void ice_free_seg(struct ice_hw *hw) }
>
[snip]
> @@ -4342,29 +4321,39 @@ ice_update_fd_swap(struct ice_hw *hw, u16
> prof_id, struct ice_fv_word *es)
> si -= indexes_used;
> }
>
> - /* for each set of 4 swap indexes, write the appropriate register */
> + /* for each set of 4 swap and 4 inset indexes, write the appropriate
> + * register
> + */
> for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) {
> - u32 raw_entry = 0;
> + u32 raw_swap = 0;
> + u32 raw_in = 0;
>
> for (k = 0; k < 4; k++) {
> u8 idx;
>
> idx = (j * 4) + k;
> - if (used[idx])
> - raw_entry |= used[idx] << (k *
> BITS_PER_BYTE);
> + if (used[idx] && !(mask_sel & BIT(idx))) {
> + raw_swap |= used[idx] << (k *
> BITS_PER_BYTE); #define
> +ICE_INSET_DFLT 0x9f
Is this macro defined within this function?
> + raw_in |= ICE_INSET_DFLT << (k *
> BITS_PER_BYTE);
> + }
> }
>
[snip]
Qiming
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