[dpdk-dev] [PATCH v2] lib/librte_eal: support SVE flag on ARM64

[Wei Hu (Xavier)]

Hi, Jerin Jacob

On 2020/8/17 21:07, Jerin Jacob wrote:
> On Mon, Aug 17, 2020 at 6:17 PM Wei Hu (Xavier)
> <huwei013 at chinasoftinc.com> wrote:
>>
>> From: "Wei Hu (Xavier)" <xavier.huwei at huawei.com>
>>
>> SVE is the next-generation SIMD extension of the ARMv8-A AArch64
>> instruction set.
>> The related marco definition can be found in linux kernel:
>>    arch/arm64/include/uapi/asm/hwcap.h
>>
>> This patch supports getting cpu SVE feature on ARM64 platform.
>>
>> Signed-off-by: Chengwen Feng <fengchengwen at huawei.com>
>> Signed-off-by: Wei Hu (Xavier) <xavier.huwei at huawei.com>
> 
> Change the git commit like
> 
> eal/arm64: update CPU flags
OK, I will update it in V3.
> 
> 
> 
> 
>> ---
>> v1 -> v2:
>>          Adds more sve-related definition to rte_cpu_feature_table,
>>          sunch as SVE2, etc.
>> ---
>>   lib/librte_eal/arm/include/rte_cpuflags_64.h |  1 +
>>   lib/librte_eal/arm/rte_cpuflags.c            | 11 +++++++++++
>>   2 files changed, 12 insertions(+)
>>
>> diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/librte_eal/arm/include/rte_cpuflags_64.h
>> index 95cc01474..069844ddb 100644
>> --- a/lib/librte_eal/arm/include/rte_cpuflags_64.h
>> +++ b/lib/librte_eal/arm/include/rte_cpuflags_64.h
>> @@ -22,6 +22,7 @@ enum rte_cpu_flag_t {
>>          RTE_CPUFLAG_SHA2,
>>          RTE_CPUFLAG_CRC32,
>>          RTE_CPUFLAG_ATOMICS,
>> +       RTE_CPUFLAG_SVE,
> 
> Please intrdouce the flag for all newly added items as well.
OK, I will update it in V3.
> 
>>          RTE_CPUFLAG_AARCH64,
>>          /* The last item */
>>          RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
>> diff --git a/lib/librte_eal/arm/rte_cpuflags.c b/lib/librte_eal/arm/rte_cpuflags.c
>> index caf3dc83a..97a9fcfd4 100644
>> --- a/lib/librte_eal/arm/rte_cpuflags.c
>> +++ b/lib/librte_eal/arm/rte_cpuflags.c
>> @@ -95,6 +95,17 @@ const struct feature_entry rte_cpu_feature_table[] = {
>>          FEAT_DEF(SHA2,          REG_HWCAP,    6)
>>          FEAT_DEF(CRC32,         REG_HWCAP,    7)
>>          FEAT_DEF(ATOMICS,       REG_HWCAP,    8)
>> +       FEAT_DEF(SVE,           REG_HWCAP,    22)
>> +       FEAT_DEF(SVE2,          REG_HWCAP2,   1)
>> +       FEAT_DEF(SVEAES,        REG_HWCAP2,   2)
>> +       FEAT_DEF(SVEPMULL,      REG_HWCAP2,   3)
>> +       FEAT_DEF(SVEBITPERM,    REG_HWCAP2,   4)
>> +       FEAT_DEF(SVESHA3,       REG_HWCAP2,   5)
>> +       FEAT_DEF(SVESM4,        REG_HWCAP2,   6)
> 
> Following stuff is missing
> HWCAP2_FLAGM2           (1 << 7)
> HWCAP2_FRINT            (1 << 8)

OK, I will update it in V3.

Thanks, Xavier
> 
>> +       FEAT_DEF(SVEI8MM,       REG_HWCAP2,   9)
>> +       FEAT_DEF(SVEF32MM,      REG_HWCAP2,   10)
>> +       FEAT_DEF(SVEF64MM,      REG_HWCAP2,   11)
>> +       FEAT_DEF(SVEBF16,       REG_HWCAP2,   12)
>>          FEAT_DEF(AARCH64,       REG_PLATFORM, 1)
>>   };
>>   #endif /* RTE_ARCH */
>> --
>> 2.27.0
>>