[dpdk-dev] [PATCH v2 4/4] eventdev: relax smp barriers with c11 atomics

Jerin Jacob jerinjacobk at gmail.com
Fri Jul 3 12:50:58 CEST 2020


On Fri, Jul 3, 2020 at 2:00 AM Carrillo, Erik G
<erik.g.carrillo at intel.com> wrote:
>
> > -----Original Message-----
> > From: Phil Yang <phil.yang at arm.com>
> > Sent: Thursday, July 2, 2020 12:27 AM
> > To: Carrillo, Erik G <erik.g.carrillo at intel.com>; dev at dpdk.org
> > Cc: jerinj at marvell.com; Honnappa.Nagarahalli at arm.com;
> > drc at linux.vnet.ibm.com; Ruifeng.Wang at arm.com;
> > Dharmik.Thakkar at arm.com; nd at arm.com
> > Subject: [PATCH v2 4/4] eventdev: relax smp barriers with c11 atomics
> >
> > The implementation-specific opaque data is shared between arm and cancel
> > operations. The state flag acts as a guard variable to make sure the update of
> > opaque data is synchronized. This patch uses c11 atomics with explicit one
> > way memory barrier instead of full barriers rte_smp_w/rmb() to synchronize
> > the opaque data between timer arm and cancel threads.
> >
> > Signed-off-by: Phil Yang <phil.yang at arm.com>
> > Reviewed-by: Dharmik Thakkar <dharmik.thakkar at arm.com>
> > Reviewed-by: Ruifeng Wang <ruifeng.wang at arm.com>
> Acked-by: Erik Gabriel Carrillo <erik.g.carrillo at intel.com>

Series applied to dpdk-next-eventdev/master. Thanks.


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