[dpdk-dev] [PATCH 2/3] eventdev: use c11 atomics for lcore timer armed flag

Carrillo, Erik G erik.g.carrillo at intel.com
Tue Jun 23 23:31:31 CEST 2020


> -----Original Message-----
> From: Stephen Hemminger <stephen at networkplumber.org>
> Sent: Tuesday, June 23, 2020 4:20 PM
> To: Phil Yang <phil.yang at arm.com>
> Cc: dev at dpdk.org; Carrillo, Erik G <erik.g.carrillo at intel.com>;
> drc at linux.vnet.ibm.com; honnappa.nagarahalli at arm.com;
> ruifeng.wang at arm.com; dharmik.thakkar at arm.com; nd at arm.com
> Subject: Re: [dpdk-dev] [PATCH 2/3] eventdev: use c11 atomics for lcore
> timer armed flag
> 
> On Fri, 12 Jun 2020 19:19:57 +0800
> Phil Yang <phil.yang at arm.com> wrote:
> 
> >  	/* Track which cores have actually armed a timer */
> >  	struct {
> > -		rte_atomic16_t v;
> > +		int16_t v;
> >  	} __rte_cache_aligned in_use[RTE_MAX_LCORE];
> 
> Do you really need this to be cache aligned (ie one per line)?

I believe I did this originally to keep a cache line from bouncing when two different cores are arming timers, so it's not strictly necessary.

> Why have a signed value for a reference count? Shouldn't it be unsigned?


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