[dpdk-dev] [PATCH v3 1/1] build: add Graviton2(arm64) meson configuration
Honnappa Nagarahalli
Honnappa.Nagarahalli at arm.com
Tue Nov 3 20:45:09 CET 2020
> -----Original Message-----
> From: Vimal Chungath <vcchunga at amazon.com>
> Sent: Tuesday, November 3, 2020 12:07 PM
> To: dev at dpdk.org
> Cc: Honnappa Nagarahalli <Honnappa.Nagarahalli at arm.com>; Dharmik
> Thakkar <Dharmik.Thakkar at arm.com>; alisaidi at amazon.com;
> bruce.richardson at intel.com; hemant.agrawal at nxp.com;
> jerinj at marvell.com; jerinjacobk at gmail.com; juraj.linkes at pantheon.tech;
> nd <nd at arm.com>; thomas at monjalon.net
> Subject: [PATCH v3 1/1] build: add Graviton2(arm64) meson configuration
>
> Add meson build configuration for Graviton2 platform with 64-bit Arm
> Neoverse N1 cores. This patch makes the following changes to generic
> Neoverse N1 config:
>
> 1. increase lcore limit to 64
> 2. increase memory support to 1TB
> 3. remove +crc from -march as that is default when setting armv8.2
>
> For more information about Graviton2 platform, refer to:
> https://aws.amazon.com/ec2/graviton/
>
> Signed-off-by: Vimal Chungath <vcchunga at amazon.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli at arm.com>
> ---
> config/arm/arm64_graviton2_linux_gcc | 17 +++++++++++++++++
> config/arm/meson.build | 18 +++++++++++-------
> 2 files changed, 28 insertions(+), 7 deletions(-) create mode 100644
> config/arm/arm64_graviton2_linux_gcc
>
> diff --git a/config/arm/arm64_graviton2_linux_gcc
> b/config/arm/arm64_graviton2_linux_gcc
> new file mode 100644
> index 000000000..022e06303
> --- /dev/null
> +++ b/config/arm/arm64_graviton2_linux_gcc
> @@ -0,0 +1,17 @@
> +[binaries]
> +c = 'aarch64-linux-gnu-gcc'
> +cpp = 'aarch64-linux-gnu-cpp'
> +ar = 'aarch64-linux-gnu-gcc-ar'
> +strip = 'aarch64-linux-gnu-strip'
> +pkgconfig = 'aarch64-linux-gnu-pkg-config'
> +pcap-config = ''
> +
> +[host_machine]
> +system = 'linux'
> +cpu_family = 'aarch64'
> +cpu = 'armv8-a'
> +endian = 'little'
> +
> +[properties]
> +implementor_id = '0x41'
> +implementor_pn = '0xd0c'
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> b49203fa8..073b4afc0 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -63,12 +63,6 @@ flags_armada = [
> ['RTE_MAX_LCORE', 16]]
>
> flags_default_extra = []
> -flags_n1sdp_extra = [
> - ['RTE_MACHINE', '"n1sdp"'],
> - ['RTE_MAX_NUMA_NODES', 1],
> - ['RTE_MAX_LCORE', 4],
> - ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> - ['RTE_LIBRTE_VHOST_NUMA', false]]
> flags_thunderx_extra = [
> ['RTE_MACHINE', '"thunderx"'],
> ['RTE_USE_C11_MEM_MODEL', false]]
> @@ -86,6 +80,16 @@ flags_octeontx2_extra = [
> ['RTE_ARM_FEATURE_ATOMICS', true],
> ['RTE_EAL_IGB_UIO', false],
> ['RTE_USE_C11_MEM_MODEL', true]]
> +flags_n1generic_extra = [
> + ['RTE_MACHINE', '"neoverse-n1"'],
> + ['RTE_MAX_LCORE', 64],
> + ['RTE_CACHE_LINE_SIZE', 64],
> + ['RTE_ARM_FEATURE_ATOMICS', true],
> + ['RTE_USE_C11_MEM_MODEL', true],
> + ['RTE_MAX_MEM_MB', 1048576],
> + ['RTE_MAX_NUMA_NODES', 1],
> + ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> + ['RTE_LIBRTE_VHOST_NUMA', false]]
>
> machine_args_generic = [
> ['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@ -97,7
> +101,7 @@ machine_args_generic = [
> ['0xd09', ['-mcpu=cortex-a73']],
> ['0xd0a', ['-mcpu=cortex-a75']],
> ['0xd0b', ['-mcpu=cortex-a76']],
> - ['0xd0c', ['-march=armv8.2-a+crc+crypto', '-mcpu=neoverse-n1'],
> flags_n1sdp_extra]]
> + ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
> +flags_n1generic_extra]]
>
> machine_args_cavium = [
> ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> --
> 2.16.6
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