[dpdk-dev] [PATCH v3 04/18] net/i40e: add checks for max SIMD bitwidth

[Guo, Jia]

Hi, power

> -----Original Message-----
> From: Power, Ciara <ciara.power at intel.com>
> Sent: Wednesday, September 30, 2020 9:04 PM
> To: dev at dpdk.org
> Cc: Power, Ciara <ciara.power at intel.com>; Xing, Beilei
> <beilei.xing at intel.com>; Guo, Jia <jia.guo at intel.com>
> Subject: [PATCH v3 04/18] net/i40e: add checks for max SIMD bitwidth
> 
> When choosing a vector path to take, an extra condition must be satisfied to
> ensure the max SIMD bitwidth allows for the CPU enabled path.
> 
> Cc: Beilei Xing <beilei.xing at intel.com>
> Cc: Jeff Guo <jia.guo at intel.com>
> 
> Signed-off-by: Ciara Power <ciara.power at intel.com>
> ---
>  drivers/net/i40e/i40e_rxtx.c | 19 +++++++++++++------
>  1 file changed, 13 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index
> 60b33d20a1..9b535b52fa 100644
> --- a/drivers/net/i40e/i40e_rxtx.c
> +++ b/drivers/net/i40e/i40e_rxtx.c
> @@ -3098,7 +3098,8 @@ static eth_rx_burst_t  i40e_get_latest_rx_vec(bool
> scatter)  {  #if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
> -	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
> +	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) &&
> +			rte_get_max_simd_bitwidth() >=

Nitpick: I think if consistent to keep alignment for open parenthesis in this patch set would be better. Do you think so?

> RTE_MAX_256_SIMD)
>  		return scatter ? i40e_recv_scattered_pkts_vec_avx2 :
>  				 i40e_recv_pkts_vec_avx2;
>  #endif
> @@ -3115,7 +3116,8 @@ i40e_get_recommend_rx_vec(bool scatter)
>  	 * use of AVX2 version to later plaforms, not all those that could
>  	 * theoretically run it.
>  	 */
> -	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))
> +	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) &&
> +			rte_get_max_simd_bitwidth() >=
> RTE_MAX_256_SIMD)
>  		return scatter ? i40e_recv_scattered_pkts_vec_avx2 :
>  				 i40e_recv_pkts_vec_avx2;
>  #endif
> @@ -3154,7 +3156,8 @@ i40e_set_rx_function(struct rte_eth_dev *dev)
>  		}
>  	}
> 
> -	if (ad->rx_vec_allowed) {
> +	if (ad->rx_vec_allowed  && rte_get_max_simd_bitwidth()
> +			>= RTE_MAX_128_SIMD) {
>  		/* Vec Rx path */
>  		PMD_INIT_LOG(DEBUG, "Vector Rx path will be used on
> port=%d.",
>  				dev->data->port_id);
> @@ -3268,7 +3271,8 @@ static eth_tx_burst_t
>  i40e_get_latest_tx_vec(void)
>  {
>  #if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
> -	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
> +	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) &&
> +			rte_get_max_simd_bitwidth() >=
> RTE_MAX_256_SIMD)
>  		return i40e_xmit_pkts_vec_avx2;
>  #endif
>  	return i40e_xmit_pkts_vec;
> @@ -3283,7 +3287,8 @@ i40e_get_recommend_tx_vec(void)
>  	 * use of AVX2 version to later plaforms, not all those that could
>  	 * theoretically run it.
>  	 */
> -	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))
> +	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) &&
> +			rte_get_max_simd_bitwidth() >=
> RTE_MAX_256_SIMD)
>  		return i40e_xmit_pkts_vec_avx2;
>  #endif
>  	return i40e_xmit_pkts_vec;
> @@ -3311,7 +3316,9 @@ i40e_set_tx_function(struct rte_eth_dev *dev)
>  	}
> 
>  	if (ad->tx_simple_allowed) {
> -		if (ad->tx_vec_allowed) {
> +		if (ad->tx_vec_allowed &&
> +				rte_get_max_simd_bitwidth()
> +				>= RTE_MAX_128_SIMD) {
>  			PMD_INIT_LOG(DEBUG, "Vector tx finally be used.");
>  			if (ad->use_latest_vec)
>  				dev->tx_pkt_burst =
> --
> 2.17.1