[dpdk-dev] [dpdk-techboard] [v4 1/3] cryptodev: support enqueue callback functions

Gujjar, Abhinandan S abhinandan.gujjar at intel.com
Fri Oct 30 18:18:59 CET 2020


Hi Akhil,

I have sent the v6 patch for RC2.
As discussed, I will get the test app updated for dequeue callback for RC3.

Thanks
Abhinandan

> -----Original Message-----
> From: Gujjar, Abhinandan S
> Sent: Friday, October 30, 2020 9:54 AM
> To: Akhil Goyal <akhil.goyal at nxp.com>; Honnappa Nagarahalli
> <Honnappa.Nagarahalli at arm.com>; Richardson, Bruce
> <bruce.richardson at intel.com>; Ray Kinsella <mdr at ashroe.eu>; Thomas
> Monjalon <thomas at monjalon.net>
> Cc: Ananyev, Konstantin <konstantin.ananyev at intel.com>; dev at dpdk.org;
> Doherty, Declan <declan.doherty at intel.com>; techboard at dpdk.org; Vangati,
> Narender <narender.vangati at intel.com>; jerinj at marvell.com; nd
> <nd at arm.com>
> Subject: RE: [dpdk-techboard] [v4 1/3] cryptodev: support enqueue callback
> functions
> 
> 
> Thanks Tech board & Akhil for clarifying the concern.
> Sure. I will send the new version of the patch.
> 
> Regards
> Abhinandan
> 
> > -----Original Message-----
> > From: Akhil Goyal <akhil.goyal at nxp.com>
> > Sent: Thursday, October 29, 2020 7:31 PM
> > To: Gujjar, Abhinandan S <abhinandan.gujjar at intel.com>; Honnappa
> > Nagarahalli <Honnappa.Nagarahalli at arm.com>; Richardson, Bruce
> > <bruce.richardson at intel.com>; Ray Kinsella <mdr at ashroe.eu>; Thomas
> > Monjalon <thomas at monjalon.net>
> > Cc: Ananyev, Konstantin <konstantin.ananyev at intel.com>; dev at dpdk.org;
> > Doherty, Declan <declan.doherty at intel.com>; techboard at dpdk.org;
> > Vangati, Narender <narender.vangati at intel.com>; jerinj at marvell.com; nd
> > <nd at arm.com>
> > Subject: RE: [dpdk-techboard] [v4 1/3] cryptodev: support enqueue
> > callback functions
> >
> > >
> > > Hi Akhil,
> > >
> > > Any updates on this?
> > >
> > There has been no objections for this patch from techboard.
> >
> > @Thomas Monjalon: could you please review the release notes.
> > I believe there should be a bullet for API changes to add 2 new fields
> > in rte_cryptodev.
> > What do you suggest?
> >
> > @Gujjar, Abhinandan S
> > Please send a new version for comments on errno.
> > If possible add cases for deq_cbs as well. If not, send it by next week.
> 
> >
> > Regards,
> > Akhil
> > > > + Ray for ABI
> > > >
> > > > <snip>
> > > >
> > > > >
> > > > > On Wed, Oct 28, 2020 at 02:28:43PM +0000, Akhil Goyal wrote:
> > > > > >
> > > > > > Hi Konstantin,
> > > > > >
> > > > > > > > > Hi Tech board members,
> > > > > > > > >
> > > > > > > > > I have a doubt about the ABI breakage in below addition of field.
> > > > > > > > > Could you please comment.
> > > > > > > > >
> > > > > > > > > >  /** The data structure associated with each crypto device.
> > > > > > > > > > */ struct rte_cryptodev {
> > > > > > > > > >  	dequeue_pkt_burst_t dequeue_burst; @@ -867,6
> +922,10
> > > > > @@
> > > > > > > > > > struct rte_cryptodev {
> > > > > > > > > >  	__extension__
> > > > > > > > > >  	uint8_t attached : 1;
> > > > > > > > > >  	/**< Flag indicating the device is attached */
> > > > > > > > > > +
> > > > > > > > > > +	struct rte_cryptodev_enq_cb_rcu *enq_cbs;
> > > > > > > > > > +	/**< User application callback for pre enqueue
> > > > > > > > > > +processing */
> > > > > > > > > > +
> > > > > > > > > >  } __rte_cache_aligned;
> > > > > > > > >
> > > > > > > > > Here rte_cryptodevs is defined in stable API list in map
> > > > > > > > > file which is a pointer To all rte_cryptodev and the
> > > > > > > > > above change is changing the size of the
> > > > > > > structure.
> > > > > > >
> > > > > > > While this patch adds new fields into rte_cryptodev
> > > > > > > structure, it doesn't change the size of it.
> > > > > > > struct rte_cryptodev is cache line aligned, so it's current size:
> > > > > > > 128B for 64-bit systems, and 64B(/128B) for 32-bit systems.
> > > > > > > So for 64-bit we have 47B implicitly reserved, and for
> > > > > > > 32-bit we have 19B reserved.
> > > > > > > That's enough to add two pointers without changing size of this
> struct.
> > > > > > >
> > > > > >
> > > > > > The structure is cache aligned, and if the cache line size in
> > > > > > 32Byte and the compilation is done on 64bit machine, then we
> > > > > > will be left with 15Bytes which is not sufficient for 2 pointers.
> > > > > > Do we have such systems? Am I missing something?
> > > > > >
> > > > >
> > > > > I don't think we support any such systems, so unless someone can
> > > > > point out a specific case where we need to support 32-byte CLs,
> > > > > I'd tend towards ignoring this as a non-issue.
> > > > Agree. I have not come across 32B cache line.
> > > >
> > > > >
> > > > > > The reason I brought this into techboard is to have a
> > > > > > consensus on such change As rte_cryptodev is a very popular and
> stable structure.
> > > > > > Any changes to it may Have impacts which one person cannot
> > > > > > judge all use
> > > > > cases.
> > > > > >
> > > > >
> > > > > Haven't been tracking this discussion much, but from what I read
> > > > > here, this doesn't look like an ABI break and should be ok.
> > > > If we are filling the holes in the cache line with new fields, it
> > > > should not be an ABI break.
> > > >
> > > > >
> > > > > Regards,
> > > > > /Bruce


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