[dpdk-dev] [PATCH v2 00/60] common/sfc_efx: support Riverhead NIC family

Ferruh Yigit ferruh.yigit at intel.com
Wed Sep 23 19:45:30 CEST 2020


On 9/22/2020 10:33 AM, Andrew Rybchenko wrote:
> Riverhead is a new NIC family, the first one with EF100 architecture.
> Control interface is an MCDI similar to EF10. Datapath interface is
> completely new.
> 
> The patch series is build tested with and without EFSYS_OPT_RIVERHEAD
> enabled.
> 
> EF10-based NICs are tested with the patch series applied with and
> without EFSYS_OPT_RIVERHEAD enabled.
> 
> net/sfc patches will follow.
> 
> v2:
>   - fix spelling in few patches
>   - use tabs to indent instead of spaces
> 
> Andrew Rybchenko (41):
>    common/sfc_efx/base: add EF100 registers definitions
>    common/sfc_efx/base: update MCDI headers
>    common/sfc_efx/base: add event queue operation to do polling
>    common/sfc_efx/base: add efsys option for Riverhead
>    common/sfc_efx/base: add Riverhead NIC family
>    common/sfc_efx/base: update registers check for Riverhead
>    common/sfc_efx/base: use EF10 MCDI methods for Riverhead
>    common/sfc_efx/base: use EF10 PHY methods for Riverhead
>    common/sfc_efx/base: move 14b prefix check out of caps get
>    common/sfc_efx/base: remove PF count get from caps get
>    common/sfc_efx/base: factor out helper to get board config
>    common/sfc_efx/base: set NIC features in generic place
>    common/sfc_efx/base: factor out MCDI entity reset helper
>    common/sfc_efx/base: add Riverhead support to NIC module
>    common/sfc_efx/base: use dummy tunnel ops for Riverhead
>    common/sfc_efx/base: use EF10 filter methods for Riverhead
>    common/sfc_efx/base: use EF10 MAC methods for Riverhead
>    common/sfc_efx/base: add interrupts module for Riverhead
>    common/sfc_efx/base: move EvQ init/fini wrappers to generic
>    common/sfc_efx/base: move EvQ create generic checks
>    common/sfc_efx/base: prepare to merge EvQ init functions
>    common/sfc_efx/base: merge versions of init EvQ wrappers
>    common/sfc_efx/base: add event queue module for Riverhead
>    common/sfc_efx/base: handle MCDI events on Riverhead
>    common/sfc_efx/base: move RxQ init/fini wrappers to generic
>    common/sfc_efx/base: move TxQ init/fini wrappers to generic
>    common/sfc_efx/base: switch TxQ init to extended version
>    common/sfc_efx/base: maintain RxQ counter in generic code
>    common/sfc_efx/base: free Rx queue structure in generic code
>    common/sfc_efx/base: move Rx index check to generic code
>    common/sfc_efx/base: implement Rx control path for Riverhead
>    common/sfc_efx/base: implement Tx control path for Riverhead
>    common/sfc_efx/base: fix Tx descriptor DMA sync on Riverhead
>    common/sfc_efx/base: handle Rx events for Riverhead
>    common/sfc_efx/base: handle Tx complete on Riverhead
>    common/sfc_efx: do not include libefx headers from efsys.h
>    common/sfc_efx/base: add API to get Rx prefix information
>    common/sfc_efx/base: group RxQ parameters into a structure
>    common/sfc_efx/base: choose smallest Rx prefix on Riverhead
>    common/sfc_efx/base: use EF10 EVB methods for Riverhead
>    common/sfc_efx/base: allocate vAdaptor on Riverhead
> 
> Andy Moreton (7):
>    common/sfc_efx/base: add option for extended width events
>    common/sfc_efx/base: add 256bit type
>    common/sfc_efx/base: support creation of extended width EvQ
>    common/sfc_efx/base: poll extended width event queues
>    common/sfc_efx/base: handle normal events in extended width
>    common/sfc_efx/base: add option for descriptor proxy queues
>    common/sfc_efx/base: handle descriptor proxy queue events
> 
> Igor Romanov (9):
>    common/sfc_efx/base: add function control window concept
>    common/sfc_efx/base: add function control window lookup API
>    common/sfc_efx/base: add efsys API to find a memory BAR
>    common/sfc_efx/base: add Xilinx capabilities table lookup
>    common/sfc_efx/base: add NIC magic check on BAR lookup
>    common/sfc_efx/base: introduce UDP tunnel destruct operation
>    common/sfc_efx/base: introduce states for UDP tunnel entries
>    common/sfc_efx/base: support UDP tunnel operations for EF100
>    common/sfc_efx/base: replace PCI efsys macros with functions
> 
> Ivan Malov (3):
>    common/sfc_efx/base: complete EvQ creation on Riverhead
>    common/sfc_efx/base: indicate support for TSO version 3
>    common/sfc_efx/base: report restrictions for TSO version 3
> 

Can you please check following checkpatch warnings, there are many 
warnings but most of them ignored because of base files, but below ones 
can be fixed I think:


WARNING:TYPO_SPELLING: 'inital' may be misspelled - perhaps 'initial'?
#7796: FILE: drivers/common/sfc_efx/base/efx_regs_mcdi.h:24607:
+/* The inital producer index for this queue's used ring. If this queue 
is being

WARNING:TYPO_SPELLING: 'inital' may be misspelled - perhaps 'initial'?
#7803: FILE: drivers/common/sfc_efx/base/efx_regs_mcdi.h:24614:
+/* The inital consumer index for this queue's available ring. If this 
queue is

WARNING:TYPO_SPELLING: 'endianess' may be misspelled - perhaps 'endianness'?
#199: FILE: drivers/common/sfc_efx/base/efx.h:2794:
+ * Location and endianess of a field in Rx prefix.

WARNING:TYPO_SPELLING: 'requries' may be misspelled - perhaps 'requires'?
#74: FILE: drivers/common/sfc_efx/base/efx_pci.c:328:
+                * Xilinx Capabilities Table requries 32bit aligned reads.







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