[dpdk-dev] [PATCH 2/2] pipeline: autodetect endianness of action args

Dumitrescu, Cristian cristian.dumitrescu at intel.com
Tue Apr 20 12:20:28 CEST 2021



> -----Original Message-----
> From: Thomas Monjalon <thomas at monjalon.net>
> Sent: Tuesday, April 20, 2021 11:07 AM
> To: Dumitrescu, Cristian <cristian.dumitrescu at intel.com>
> Cc: dev at dpdk.org
> Subject: Re: [dpdk-dev] [PATCH 2/2] pipeline: autodetect endianness of
> action args
> 
> 20/04/2021 12:04, Dumitrescu, Cristian:
> > From: Thomas Monjalon <thomas at monjalon.net>
> > > 12/04/2021 01:23, Cristian Dumitrescu:
> > > > Each table entry is made up of match fields and action data, with the
> > > > latter made up of the action ID and the action arguments. The approach
> > > > of having the user specify explicitly the endianness of the action
> > > > arguments is difficult to be picked up by P4 compilers, as the P4
> > > > compiler is generally unaware about this aspect.
> > > >
> > > > This commit introduces the auto-detection of the endianness of the
> > > > action arguments by examining the endianness of the their destination:
> > > > network byte order (NBO) when they get copied to headers and host
> byte
> > > > order (HBO) when they get copied to packet meta-data or mailboxes.
> > > >
> > > > The endianness specification of each action argument as part of the
> > > > rule specification, e.g. H(...) and N(...) is removed from the rule
> > > > file and auto-detected based on their destination. The DMA instruction
> > > > scope is made internal, so mov instructions need to be used. The
> > > > pattern of transferring complete headers from table entry action args
> > > > to headers is detected, and the associated set of mov instructions
> > > > plus header validate is internally detected and replaced with the
> > > > internal-only DMA instruction to preserve performance.
> > > >
> > > > Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu at intel.com>
> > > > ---
> > > >  examples/pipeline/examples/vxlan.spec      |  41 ++-
> > > >  examples/pipeline/examples/vxlan_table.py  |  44 ++--
> > > >  examples/pipeline/examples/vxlan_table.txt |  32 +--
> > > >  lib/librte_pipeline/rte_swx_ctl.c          |  15 +-
> > > >  lib/librte_pipeline/rte_swx_ctl.h          |   6 +
> > > >  lib/librte_pipeline/rte_swx_pipeline.c     | 282 ++++++++++++++++++-
> --
> > > >  lib/librte_pipeline/rte_swx_pipeline.h     |   4 -
> > >
> > > There are compilation issues in the CI:
> > > https://patches.dpdk.org/project/dpdk/patch/20210411232338.4005-2-
> > > cristian.dumitrescu at intel.com/
> > >
> >
> > Hi Thomas,
> >
> > The reason for the CI issues is because this patch set has dependencies on
> the previous patches that were pending, but now already applied by you
> (thank you!), so there should not be any real issues?
> 
> Yes I didn't see any issue locally, just wanted to confirm.
> 

Thanks, Thomas. I just double checked by applying this set on the main latest, and I could not see any apply or build issues.


More information about the dev mailing list