[dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD

[谢华伟(此时此刻）]

On 2021/1/13 1:37, Maxime Coquelin wrote:
>
> On 10/22/20 5:51 PM, 谢华伟(此时此刻） wrote:
>> From: "huawei.xhw" <huawei.xhw at alibaba-inc.com>
>>
>> Legacy virtio-pci only supports PIO BAR resource. As we need to create lots of
>> virtio devices and PIO resource on x86 is very limited, we expose MMIO BAR.
>>
>> Kernel supports both PIO  and MMIO BAR for legacy virtio-pci device. We handles
>> different type of BAR in the similar way.
>>
>> In previous implementation, with igb_uio we get PIO address from igb_uio
>> sysfs entry; with uio_pci_generic, we get PIO address from
>> /proc/ioports.
>> For PIO/MMIO RW, there is different path for different drivers and arch.
>> For VFIO, PIO/MMIO RW is through syscall, which has big performance
>> issue.
> Regarding the performance issue, do you have some numbers to share?
> AFAICS, it can only have an impact on performance when interrupt mode is
> used or queue notification is enabled.

I didn't have performance number, but would do it when have time.

Yes, it is not needed when virtio backend/device is working in polling mode.

But anyway, ioctl isn't needed at all.

/huawei

>
> Does your HW Virtio implementation requires notification?
>
> Is performance the only issue to have your HW working with Virtio PMD,
> or is this series also fixing some functionnal issues?

There is two purpose with this patch. One is to support MMIO, and the 
other is to

unify/simplify the way to get IO/MMIO resource and read/write IO/MMIO 
port for virtio PMD.

Current implementation is too complicated.

/huawei

>
> Best regards,
> Maxime



>> On X86, it assumes only PIO is supported.
>>
>> All of the above is too much twisted.
>> This patch unifies the way to get both PIO and MMIO address for different driver
>> and arch, all from standard resource attr under pci sysfs.
>>
>> We distinguish PIO and MMIO by their address like how kernel does. It is ugly but works.
>>
>> v2 changes:
>> 	 - add more explanation in the commit message
>>
>> v3 changes:
>> 	 - fix patch format issues
>>
>> v4 changes:
>> 	 - fixes for RTE_KDRV_UIO_GENERIC -> RTE_PCI_KDRV_UIO_GENERIC
>>
>> v5 changes:
>> 	 - split into three seperate patches
>>
>> huawei.xhw (3):
>>    PCI: use PCI standard sysfs entry to get PIO address
>>    PCI: support MMIO in rte_pci_ioport_map/unap/read/write
>>    PCI: don't use vfio ioctl call to access PIO resource
>>
>>   drivers/bus/pci/linux/pci.c     |  89 +-------------------
>>   drivers/bus/pci/linux/pci_uio.c | 177 ++++++++++++++++++++++++++++------------
>>   2 files changed, 128 insertions(+), 138 deletions(-)
>>