[dpdk-dev] [PATCH] net/enic: use 64B completion queue entries if available

Ferruh Yigit ferruh.yigit at intel.com
Mon Jan 18 16:05:04 CET 2021


On 1/7/2021 2:01 PM, Hyong Youb Kim wrote:
> Latest VIC adapters support 64B CQ (completion queue) entries as well
> as 16B entries available on all VIC models. 64B entries can greatly
> reduce cache contention (CPU stall cycles) between DMA writes (Rx
> packet descriptors) and polling CPU. The effect is very noticeable on
> Intel platforms with DDIO. As most UCS servers are based on Intel
> platforms, enable and use 64B CQ entries by default, if
> available. Also, add devarg 'cq64' so the user can explicitly disable
> 64B CQ.
> 
> Signed-off-by: Hyong Youb Kim <hyonkim at cisco.com>
> Reviewed-by: John Daley <johndale at cisco.com>

Applied to dpdk-next-net/main, thanks.



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