[dpdk-dev] [PATCH v2 08/13] net/mlx5: support TSO offload on Windows

Tal Shnaiderman talshn at nvidia.com
Tue Oct 12 14:45:49 CEST 2021


Support of the TSO offloading by checking
the relevant FW capability for NIC support.

Supported offloads:

DEV_TX_OFFLOAD_TCP_TSO
DEV_TX_OFFLOAD_VXLAN_TNL_TSO
DEV_TX_OFFLOAD_GRE_TNL_TSO
DEV_TX_OFFLOAD_GENEVE_TNL_TSO

Signed-off-by: Tal Shnaiderman <talshn at nvidia.com>
Acked-by: Matan Azrad <matan at nvidia.com>
Tested-by: Idan Hackmon <idanhac at nvidia.com>
---
 drivers/net/mlx5/windows/mlx5_os.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c
index fab7d7efcb..194cb7d9ad 100644
--- a/drivers/net/mlx5/windows/mlx5_os.c
+++ b/drivers/net/mlx5/windows/mlx5_os.c
@@ -165,6 +165,7 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 	device_attr->max_pd = 1 << hca_attr.log_max_pd;
 	device_attr->max_srq = 1 << hca_attr.log_max_srq;
 	device_attr->max_srq_wr = 1 << hca_attr.log_max_srq_sz;
+	device_attr->max_tso = 1 << hca_attr.max_lso_cap;
 	if (hca_attr.rss_ind_tbl_cap) {
 		device_attr->max_rwq_indirection_table_size =
 			1 << hca_attr.rss_ind_tbl_cap;
@@ -494,6 +495,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,
 		DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
 		config->hw_padding = 0;
 	}
+	config->tso = (sh->device_attr.max_tso > 0);
 	if (config->tso)
 		config->tso_max_payload_sz = sh->device_attr.max_tso;
 	DRV_LOG(DEBUG, "%sMPS is %s.",
-- 
2.16.1.windows.4



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