[PATCH v3 06/13] common/cnxk: fix schedule weight update

[Nithin Dabilpuram]

From: Satha Rao <skoteshwar at marvell.com>

Each TX schedule config mail box supports maximum 20 register updates.
This patch will send node weight updates in multiple mailbox when
TM created with more than 20 scheduler nodes.

Fixes: 464c9f919321 ("common/cnxk: support NIX TM dynamic update")
Cc: ndabilpuram at marvell.com

Signed-off-by: Satha Rao <skoteshwar at marvell.com>
---
 drivers/common/cnxk/roc_nix_queue.c  |  2 +-
 drivers/common/cnxk/roc_nix_tm_ops.c | 60 ++++++++++++++++++----------
 2 files changed, 41 insertions(+), 21 deletions(-)

diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
index 368f1a52f7..7318f26b57 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -916,7 +916,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq)
 	nb_sqb_bufs += NIX_SQB_LIST_SPACE;
 	/* Clamp up the SQB count */
 	nb_sqb_bufs = PLT_MIN(roc_nix->max_sqb_count,
-			      PLT_MAX(NIX_DEF_SQB, nb_sqb_bufs));
+			      (uint16_t)PLT_MAX(NIX_DEF_SQB, nb_sqb_bufs));
 
 	sq->nb_sqb_bufs = nb_sqb_bufs;
 	sq->sqes_per_sqb_log2 = (uint16_t)plt_log2_u32(sqes_per_sqb);
diff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c
index 7036495ad8..4bf7b1e104 100644
--- a/drivers/common/cnxk/roc_nix_tm_ops.c
+++ b/drivers/common/cnxk/roc_nix_tm_ops.c
@@ -891,19 +891,29 @@ roc_nix_tm_node_parent_update(struct roc_nix *roc_nix, uint32_t node_id,
 		TAILQ_FOREACH(sibling, list, node) {
 			if (sibling->parent != node->parent)
 				continue;
-			k += nix_tm_sw_xoff_prep(sibling, true, &req->reg[k],
-						 &req->regval[k]);
+			k += nix_tm_sw_xoff_prep(sibling, true, &req->reg[k], &req->regval[k]);
+			if (k >= MAX_REGS_PER_MBOX_MSG) {
+				req->num_regs = k;
+				rc = mbox_process(mbox);
+				if (rc)
+					return rc;
+				k = 0;
+				req = mbox_alloc_msg_nix_txschq_cfg(mbox);
+				req->lvl = node->hw_lvl;
+			}
+		}
+
+		if (k) {
+			req->num_regs = k;
+			rc = mbox_process(mbox);
+			if (rc)
+				return rc;
+			/* Update new weight for current node */
+			req = mbox_alloc_msg_nix_txschq_cfg(mbox);
 		}
-		req->num_regs = k;
-		rc = mbox_process(mbox);
-		if (rc)
-			return rc;
 
-		/* Update new weight for current node */
-		req = mbox_alloc_msg_nix_txschq_cfg(mbox);
 		req->lvl = node->hw_lvl;
-		req->num_regs =
-			nix_tm_sched_reg_prep(nix, node, req->reg, req->regval);
+		req->num_regs = nix_tm_sched_reg_prep(nix, node, req->reg, req->regval);
 		rc = mbox_process(mbox);
 		if (rc)
 			return rc;
@@ -916,19 +926,29 @@ roc_nix_tm_node_parent_update(struct roc_nix *roc_nix, uint32_t node_id,
 		TAILQ_FOREACH(sibling, list, node) {
 			if (sibling->parent != node->parent)
 				continue;
-			k += nix_tm_sw_xoff_prep(sibling, false, &req->reg[k],
-						 &req->regval[k]);
+			k += nix_tm_sw_xoff_prep(sibling, false, &req->reg[k], &req->regval[k]);
+			if (k >= MAX_REGS_PER_MBOX_MSG) {
+				req->num_regs = k;
+				rc = mbox_process(mbox);
+				if (rc)
+					return rc;
+				k = 0;
+				req = mbox_alloc_msg_nix_txschq_cfg(mbox);
+				req->lvl = node->hw_lvl;
+			}
+		}
+
+		if (k) {
+			req->num_regs = k;
+			rc = mbox_process(mbox);
+			if (rc)
+				return rc;
+			/* XON Parent node */
+			req = mbox_alloc_msg_nix_txschq_cfg(mbox);
 		}
-		req->num_regs = k;
-		rc = mbox_process(mbox);
-		if (rc)
-			return rc;
 
-		/* XON Parent node */
-		req = mbox_alloc_msg_nix_txschq_cfg(mbox);
 		req->lvl = node->parent->hw_lvl;
-		req->num_regs = nix_tm_sw_xoff_prep(node->parent, false,
-						    req->reg, req->regval);
+		req->num_regs = nix_tm_sw_xoff_prep(node->parent, false, req->reg, req->regval);
 		rc = mbox_process(mbox);
 		if (rc)
 			return rc;
-- 
2.25.1