[PATCH 4/4] net/cpfl: setup ctrl path

[Xing, Beilei]

> -----Original Message-----
> From: Qiao, Wenjing <wenjing.qiao at intel.com>
> Sent: Friday, August 11, 2023 5:31 PM
> To: Zhang, Yuying <yuying.zhang at intel.com>; Xing, Beilei
> <beilei.xing at intel.com>
> Cc: dev at dpdk.org; Liu, Mingxia <mingxia.liu at intel.com>; Qiao, Wenjing
> <wenjing.qiao at intel.com>; Zhang, Qi Z <qi.z.zhang at intel.com>
> Subject: [PATCH 4/4] net/cpfl: setup ctrl path
> 
> Setup the control vport and control queue for flow offloading.
> 
> Signed-off-by: Yuying Zhang <yuying.zhang at intel.com>
> Signed-off-by: Beilei Xing <beilei.xing at intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang at intel.com>
> Signed-off-by: Wenjing Qiao <wenjing.qiao at intel.com>
> ---
>  drivers/net/cpfl/cpfl_ethdev.c | 270 ++++++++++++++++++++++++++++++++-
> drivers/net/cpfl/cpfl_ethdev.h |  14 ++  drivers/net/cpfl/cpfl_vchnl.c  | 144
> ++++++++++++++++++
>  3 files changed, 425 insertions(+), 3 deletions(-)

<...>

> +
> +static void
> +cpfl_remove_cfgqs(struct cpfl_adapter_ext *adapter) {
> +	struct idpf_hw *hw = (struct idpf_hw *)(&adapter->base.hw);
> +	struct cpfl_ctlq_create_info *create_cfgq_info;
> +	int i;
> +
> +	create_cfgq_info = adapter->cfgq_info;
> +
> +	for (i = 0; i < CPFL_CFGQ_NUM; i++) {
> +		cpfl_vport_ctlq_remove(hw, adapter->ctlqp[i]);
> +		if (create_cfgq_info[i].ring_mem.va)
> +			idpf_free_dma_mem(&adapter->base.hw,
> &create_cfgq_info[i].ring_mem);
> +		if (create_cfgq_info[i].buf_mem.va)
> +			idpf_free_dma_mem(&adapter->base.hw,
> &create_cfgq_info[i].buf_mem);

 &adapter->base.hw can be replaced with hw.