[PATCH v4 3/4] bus/pci: introduce helper for MMIO read and write
Miao Li
miao.li at intel.com
Wed May 31 07:37:41 CEST 2023
From: Chenbo Xia <chenbo.xia at intel.com>
The MMIO regions may not be mmap-able for VFIO-PCI devices.
In this case, the driver should explicitly do read and write
to access these regions.
Signed-off-by: Chenbo Xia <chenbo.xia at intel.com>
Acked-by: Sunil Kumar Kori <skori at marvell.com>
Acked-by: Yahui Cao <yahui.cao at intel.com>
---
doc/guides/rel_notes/release_23_07.rst | 5 +++
drivers/bus/pci/bsd/pci.c | 22 ++++++++++++
drivers/bus/pci/linux/pci.c | 46 ++++++++++++++++++++++++
drivers/bus/pci/linux/pci_init.h | 10 ++++++
drivers/bus/pci/linux/pci_uio.c | 22 ++++++++++++
drivers/bus/pci/linux/pci_vfio.c | 36 +++++++++++++++++++
drivers/bus/pci/rte_bus_pci.h | 48 ++++++++++++++++++++++++++
drivers/bus/pci/version.map | 3 ++
8 files changed, 192 insertions(+)
diff --git a/doc/guides/rel_notes/release_23_07.rst b/doc/guides/rel_notes/release_23_07.rst
index a9b1293689..dba39134f1 100644
--- a/doc/guides/rel_notes/release_23_07.rst
+++ b/doc/guides/rel_notes/release_23_07.rst
@@ -55,6 +55,11 @@ New Features
Also, make sure to start the actual text at the margin.
=======================================================
+* **Added MMIO read and write APIs to PCI bus.**
+
+ Introduced ``rte_pci_mmio_read()`` and ``rte_pci_mmio_write()`` APIs to PCI
+ bus so that PCI drivers can access PCI memory resources when they are not
+ mapped to process address space.
Removed Items
-------------
diff --git a/drivers/bus/pci/bsd/pci.c b/drivers/bus/pci/bsd/pci.c
index a747eca58c..27f12590d4 100644
--- a/drivers/bus/pci/bsd/pci.c
+++ b/drivers/bus/pci/bsd/pci.c
@@ -489,6 +489,28 @@ int rte_pci_write_config(const struct rte_pci_device *dev,
return -1;
}
+/* Read PCI MMIO space. */
+int rte_pci_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offset)
+{
+ if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL ||
+ (uint64_t)offset + len > dev->mem_resource[bar].len)
+ return -1;
+ memcpy(buf, (uint8_t *)dev->mem_resource[bar].addr + offset, len);
+ return len;
+}
+
+/* Write PCI MMIO space. */
+int rte_pci_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offset)
+{
+ if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL ||
+ (uint64_t)offset + len > dev->mem_resource[bar].len)
+ return -1;
+ memcpy((uint8_t *)dev->mem_resource[bar].addr + offset, buf, len);
+ return len;
+}
+
int
rte_pci_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p)
diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c
index 04e21ae20f..3d237398d9 100644
--- a/drivers/bus/pci/linux/pci.c
+++ b/drivers/bus/pci/linux/pci.c
@@ -680,6 +680,52 @@ int rte_pci_write_config(const struct rte_pci_device *device,
}
}
+/* Read PCI MMIO space. */
+int rte_pci_mmio_read(const struct rte_pci_device *device, int bar,
+ void *buf, size_t len, off_t offset)
+{
+ char devname[RTE_DEV_NAME_MAX_LEN] = "";
+
+ switch (device->kdrv) {
+ case RTE_PCI_KDRV_IGB_UIO:
+ case RTE_PCI_KDRV_UIO_GENERIC:
+ return pci_uio_mmio_read(device, bar, buf, len, offset);
+#ifdef VFIO_PRESENT
+ case RTE_PCI_KDRV_VFIO:
+ return pci_vfio_mmio_read(device, bar, buf, len, offset);
+#endif
+ default:
+ rte_pci_device_name(&device->addr, devname,
+ RTE_DEV_NAME_MAX_LEN);
+ RTE_LOG(ERR, EAL,
+ "Unknown driver type for %s\n", devname);
+ return -1;
+ }
+}
+
+/* Write PCI MMIO space. */
+int rte_pci_mmio_write(const struct rte_pci_device *device, int bar,
+ const void *buf, size_t len, off_t offset)
+{
+ char devname[RTE_DEV_NAME_MAX_LEN] = "";
+
+ switch (device->kdrv) {
+ case RTE_PCI_KDRV_IGB_UIO:
+ case RTE_PCI_KDRV_UIO_GENERIC:
+ return pci_uio_mmio_write(device, bar, buf, len, offset);
+#ifdef VFIO_PRESENT
+ case RTE_PCI_KDRV_VFIO:
+ return pci_vfio_mmio_write(device, bar, buf, len, offset);
+#endif
+ default:
+ rte_pci_device_name(&device->addr, devname,
+ RTE_DEV_NAME_MAX_LEN);
+ RTE_LOG(ERR, EAL,
+ "Unknown driver type for %s\n", devname);
+ return -1;
+ }
+}
+
int
rte_pci_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p)
diff --git a/drivers/bus/pci/linux/pci_init.h b/drivers/bus/pci/linux/pci_init.h
index 9f6659ba6e..d842809ccd 100644
--- a/drivers/bus/pci/linux/pci_init.h
+++ b/drivers/bus/pci/linux/pci_init.h
@@ -37,6 +37,11 @@ int pci_uio_read_config(const struct rte_intr_handle *intr_handle,
int pci_uio_write_config(const struct rte_intr_handle *intr_handle,
const void *buf, size_t len, off_t offs);
+int pci_uio_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offset);
+int pci_uio_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offset);
+
int pci_uio_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p);
void pci_uio_ioport_read(struct rte_pci_ioport *p,
@@ -71,6 +76,11 @@ int pci_vfio_read_config(const struct rte_pci_device *dev,
int pci_vfio_write_config(const struct rte_pci_device *dev,
const void *buf, size_t len, off_t offs);
+int pci_vfio_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offset);
+int pci_vfio_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offset);
+
int pci_vfio_ioport_map(struct rte_pci_device *dev, int bar,
struct rte_pci_ioport *p);
void pci_vfio_ioport_read(struct rte_pci_ioport *p,
diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c
index d52125e49b..2bf16e9369 100644
--- a/drivers/bus/pci/linux/pci_uio.c
+++ b/drivers/bus/pci/linux/pci_uio.c
@@ -55,6 +55,28 @@ pci_uio_write_config(const struct rte_intr_handle *intr_handle,
return pwrite(uio_cfg_fd, buf, len, offset);
}
+int
+pci_uio_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offset)
+{
+ if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL ||
+ (uint64_t)offset + len > dev->mem_resource[bar].len)
+ return -1;
+ memcpy(buf, (uint8_t *)dev->mem_resource[bar].addr + offset, len);
+ return len;
+}
+
+int
+pci_uio_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offset)
+{
+ if (bar >= PCI_MAX_RESOURCE || dev->mem_resource[bar].addr == NULL ||
+ (uint64_t)offset + len > dev->mem_resource[bar].len)
+ return -1;
+ memcpy((uint8_t *)dev->mem_resource[bar].addr + offset, buf, len);
+ return len;
+}
+
static int
pci_uio_set_bus_master(int dev_fd)
{
diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index 5aef84b7d0..24b0795fbd 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -1258,6 +1258,42 @@ pci_vfio_ioport_unmap(struct rte_pci_ioport *p)
return -1;
}
+int
+pci_vfio_mmio_read(const struct rte_pci_device *dev, int bar,
+ void *buf, size_t len, off_t offs)
+{
+ uint64_t size, offset;
+ int fd;
+
+ fd = rte_intr_dev_fd_get(dev->intr_handle);
+
+ if (pci_vfio_get_region(dev, bar, &size, &offset) != 0)
+ return -1;
+
+ if ((uint64_t)len + offs > size)
+ return -1;
+
+ return pread64(fd, buf, len, offset + offs);
+}
+
+int
+pci_vfio_mmio_write(const struct rte_pci_device *dev, int bar,
+ const void *buf, size_t len, off_t offs)
+{
+ uint64_t size, offset;
+ int fd;
+
+ fd = rte_intr_dev_fd_get(dev->intr_handle);
+
+ if (pci_vfio_get_region(dev, bar, &size, &offset) != 0)
+ return -1;
+
+ if ((uint64_t)len + offs > size)
+ return -1;
+
+ return pwrite64(fd, buf, len, offset + offs);
+}
+
int
pci_vfio_is_enabled(void)
{
diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h
index b193114fe5..82da087f24 100644
--- a/drivers/bus/pci/rte_bus_pci.h
+++ b/drivers/bus/pci/rte_bus_pci.h
@@ -135,6 +135,54 @@ int rte_pci_read_config(const struct rte_pci_device *device,
int rte_pci_write_config(const struct rte_pci_device *device,
const void *buf, size_t len, off_t offset);
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change without prior notice
+ *
+ * Read from a MMIO pci resource.
+ *
+ * @param device
+ * A pointer to a rte_pci_device structure describing the device
+ * to use
+ * @param bar
+ * Index of the io pci resource we want to access.
+ * @param buf
+ * A data buffer where the bytes should be read into
+ * @param len
+ * The length of the data buffer.
+ * @param offset
+ * The offset into MMIO space described by @bar
+ * @return
+ * Number of bytes read on success, negative on error.
+ */
+__rte_experimental
+int rte_pci_mmio_read(const struct rte_pci_device *device, int bar,
+ void *buf, size_t len, off_t offset);
+
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change without prior notice
+ *
+ * Write to a MMIO pci resource.
+ *
+ * @param device
+ * A pointer to a rte_pci_device structure describing the device
+ * to use
+ * @param bar
+ * Index of the io pci resource we want to access.
+ * @param buf
+ * A data buffer containing the bytes should be written
+ * @param len
+ * The length of the data buffer.
+ * @param offset
+ * The offset into MMIO space described by @bar
+ * @return
+ * Number of bytes written on success, negative on error.
+ */
+__rte_experimental
+int rte_pci_mmio_write(const struct rte_pci_device *device, int bar,
+ const void *buf, size_t len, off_t offset);
+
/**
* Initialize a rte_pci_ioport object for a pci device io resource.
*
diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map
index 161ab86d3b..00fde139ca 100644
--- a/drivers/bus/pci/version.map
+++ b/drivers/bus/pci/version.map
@@ -21,6 +21,9 @@ EXPERIMENTAL {
# added in 21.08
rte_pci_set_bus_master;
+ # added in 23.07
+ rte_pci_mmio_read;
+ rte_pci_mmio_write;
};
INTERNAL {
--
2.25.1
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