[PATCH v2 11/15] pci: define some extended capability constants

[Xia, Chenbo]

Hi David,

> -----Original Message-----
> From: David Marchand <david.marchand at redhat.com>
> Sent: Monday, August 21, 2023 7:36 PM
> To: dev at dpdk.org
> Cc: thomas at monjalon.net; ferruh.yigit at amd.com; Xia, Chenbo
> <chenbo.xia at intel.com>; nipun.gupta at amd.com; Richardson, Bruce
> <bruce.richardson at intel.com>; McDaniel, Timothy
> <timothy.mcdaniel at intel.com>; Gaetan Rivet <grive at u256.net>
> Subject: [PATCH v2 11/15] pci: define some extended capability constants
> 
> Define some PCI extended capability constants and use them in existing
> drivers.
> 
> Signed-off-by: David Marchand <david.marchand at redhat.com>
> Acked-by: Bruce Richardson <bruce.richardson at intel.com>
> ---
>  drivers/event/dlb2/pf/dlb2_main.c | 7 ++-----
>  lib/pci/rte_pci.h                 | 4 +++-
>  2 files changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/event/dlb2/pf/dlb2_main.c
> b/drivers/event/dlb2/pf/dlb2_main.c
> index 8d960edef6..29e3001627 100644
> --- a/drivers/event/dlb2/pf/dlb2_main.c
> +++ b/drivers/event/dlb2/pf/dlb2_main.c
> @@ -27,9 +27,6 @@
>  #define NO_OWNER_VF 0	/* PF ONLY! */
>  #define NOT_VF_REQ false /* PF ONLY! */
> 
> -#define DLB2_PCI_EXT_CAP_ID_PRI   0x13
> -#define DLB2_PCI_EXT_CAP_ID_ACS   0xD
> -
>  #define DLB2_PCI_PRI_CTRL_ENABLE         0x1
>  #define DLB2_PCI_PRI_ALLOC_REQ           0xC
>  #define DLB2_PCI_PRI_CTRL                0x4
> @@ -263,7 +260,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
>  	if (rte_pci_read_config(pdev, &slt_word2, 2, off) != 2)
>  		slt_word2 = 0;
> 
> -	off = DLB2_PCI_EXT_CAP_ID_PRI;
> +	off = RTE_PCI_EXT_CAP_ID_PRI;
>  	pri_cap_offset = rte_pci_find_ext_capability(pdev, off);
> 
>  	if (pri_cap_offset >= 0) {
> @@ -490,7 +487,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
>  		}
>  	}
> 
> -	off = DLB2_PCI_EXT_CAP_ID_ACS;
> +	off = RTE_PCI_EXT_CAP_ID_ACS;
>  	acs_cap_offset = rte_pci_find_ext_capability(pdev, off);
> 
>  	if (acs_cap_offset >= 0) {
> diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
> index a82f073a7d..d2f7a96f17 100644
> --- a/lib/pci/rte_pci.h
> +++ b/lib/pci/rte_pci.h
> @@ -97,9 +97,11 @@ extern "C" {
> 
>  #define RTE_PCI_EXT_CAP_ID_ERR		0x01	/* Advanced Error
> Reporting */
>  #define RTE_PCI_EXT_CAP_ID_DSN		0x03	/* Device Serial Number */
> +#define RTE_PCI_EXT_CAP_ID_ACS		0x0d	/* Access Control Services
> */
>  #define RTE_PCI_EXT_CAP_ID_SRIOV	0x10	/* SR-IOV*/

Maybe we could also do the small clean-up: it should be one space after 'IOV' :)

With this fixed:

Reviewed-by: Chenbo Xia <chenbo.xia at intel.com>

> +#define RTE_PCI_EXT_CAP_ID_PRI		0x13	/* Page Request Interface
> */
> 
> -/* Single Root I/O Virtualization */
> +/* Single Root I/O Virtualization (RTE_PCI_EXT_CAP_ID_SRIOV) */
>  #define RTE_PCI_SRIOV_CAP		0x04	/* SR-IOV Capabilities */
>  #define RTE_PCI_SRIOV_CTRL		0x08	/* SR-IOV Control */
>  #define RTE_PCI_SRIOV_INITIAL_VF	0x0c	/* Initial VFs */
> --
> 2.41.0