[PATCH 2/5] net/mlx5/hws: support additional 4 C registers

[Itamar Gozlan]

New connectX devices have 4 additional registers which can be
used by the application. This support will allow matching on
these new registers.

Signed-off-by: Itamar Gozlan <igozlan at nvidia.com>
---
 drivers/common/mlx5/mlx5_prm.h        |  4 ++++
 drivers/net/mlx5/hws/mlx5dr_definer.c | 16 ++++++++++++++++
 drivers/net/mlx5/hws/mlx5dr_definer.h |  4 ++++
 3 files changed, 24 insertions(+)

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 51f426c614..4ead9ba2c7 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -857,6 +857,10 @@ enum modify_reg {
 	REG_C_5,
 	REG_C_6,
 	REG_C_7,
+	REG_C_8,
+	REG_C_9,
+	REG_C_10,
+	REG_C_11,
 };
 
 /* Modification sub command. */
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index b82af9d102..2f6f91892b 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -1412,6 +1412,22 @@ mlx5dr_definer_get_register_fc(struct mlx5dr_definer_conv_data *cd, int reg)
 		fc = &cd->fc[MLX5DR_DEFINER_FNAME_REG_7];
 		DR_CALC_SET_HDR(fc, registers, register_c_7);
 		break;
+	case REG_C_8:
+		fc = &cd->fc[MLX5DR_DEFINER_FNAME_REG_8];
+		DR_CALC_SET_HDR(fc, registers, register_c_8);
+		break;
+	case REG_C_9:
+		fc = &cd->fc[MLX5DR_DEFINER_FNAME_REG_9];
+		DR_CALC_SET_HDR(fc, registers, register_c_9);
+		break;
+	case REG_C_10:
+		fc = &cd->fc[MLX5DR_DEFINER_FNAME_REG_10];
+		DR_CALC_SET_HDR(fc, registers, register_c_10);
+		break;
+	case REG_C_11:
+		fc = &cd->fc[MLX5DR_DEFINER_FNAME_REG_11];
+		DR_CALC_SET_HDR(fc, registers, register_c_11);
+		break;
 	case REG_A:
 		fc = &cd->fc[MLX5DR_DEFINER_FNAME_REG_A];
 		DR_CALC_SET_HDR(fc, metadata, general_purpose);
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.h b/drivers/net/mlx5/hws/mlx5dr_definer.h
index bf026fa6bb..f5a541bc17 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.h
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.h
@@ -100,6 +100,10 @@ enum mlx5dr_definer_fname {
 	MLX5DR_DEFINER_FNAME_REG_5,
 	MLX5DR_DEFINER_FNAME_REG_6,
 	MLX5DR_DEFINER_FNAME_REG_7,
+	MLX5DR_DEFINER_FNAME_REG_8,
+	MLX5DR_DEFINER_FNAME_REG_9,
+	MLX5DR_DEFINER_FNAME_REG_10,
+	MLX5DR_DEFINER_FNAME_REG_11,
 	MLX5DR_DEFINER_FNAME_REG_A,
 	MLX5DR_DEFINER_FNAME_REG_B,
 	MLX5DR_DEFINER_FNAME_GRE_KEY_PRESENT,
-- 
2.38.1