[PATCH 02/10] net/nfp: add TLVs capability parsing
Ferruh Yigit
ferruh.yigit at amd.com
Wed Sep 27 16:19:13 CEST 2023
On 9/25/2023 7:06 AM, Chaoyong He wrote:
> From: Shihong Wang <shihong.wang at corigine.com>
>
> Add TLV capabilities to the BAR, TLVs is fit for expressing
> capabilities of applications running on programmable hardware.
>
Here application referred is bitstream or FW, right?
And PCIe BAR is used to exchange the capability information.
Not for this patch, but I wonder is there a value to add this kind of
parsing to the PCI code, if it is a generic usage, Chaoyong what do you
think?
> Declares a TLV capability start at offset 0x58, up to 0x0d90.
> The used space can be wrapped with RESERVED.
>
> Signed-off-by: Shihong Wang <shihong.wang at corigine.com>
> Signed-off-by: Chang Miao <chang.miao at corigine.com>
> Reviewed-by: Chaoyong He <chaoyong.he at corigine.com>
>
<...>
More information about the dev
mailing list