[PATCH] net/cnxk: fix TAG read data offset
pbhagavatula at marvell.com
pbhagavatula at marvell.com
Thu Sep 28 12:50:58 CEST 2023
From: Pavan Nikhilesh <pbhagavatula at marvell.com>
The workslot structure elements were shuffled around to maintain
uniformity between CN9K and CN10K which moved the TAG data offset
from first dword to third dword.
Fixes: 182767f70ef2 ("event/cnxk: add event port flow context APIs")
Signed-off-by: Pavan Nikhilesh <pbhagavatula at marvell.com>
---
Please squash to 182767f70ef2
drivers/net/cnxk/cn10k_tx.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
index 298d243aac..bb442fc6b5 100644
--- a/drivers/net/cnxk/cn10k_tx.h
+++ b/drivers/net/cnxk/cn10k_tx.h
@@ -1374,8 +1374,8 @@ cn10k_nix_xmit_pkts(void *tx_queue, uint64_t *ws, struct rte_mbuf **tx_pkts,
lnum++;
}
- if ((flags & NIX_TX_VWQE_F) && !(ws[1] & BIT_ULL(35)))
- ws[1] = roc_sso_hws_head_wait(ws[0]);
+ if ((flags & NIX_TX_VWQE_F) && !(ws[3] & BIT_ULL(35)))
+ ws[3] = roc_sso_hws_head_wait(ws[0]);
left -= burst;
tx_pkts += burst;
@@ -1531,8 +1531,8 @@ cn10k_nix_xmit_pkts_mseg(void *tx_queue, uint64_t *ws,
}
}
- if ((flags & NIX_TX_VWQE_F) && !(ws[1] & BIT_ULL(35)))
- ws[1] = roc_sso_hws_head_wait(ws[0]);
+ if ((flags & NIX_TX_VWQE_F) && !(ws[3] & BIT_ULL(35)))
+ ws[3] = roc_sso_hws_head_wait(ws[0]);
left -= burst;
tx_pkts += burst;
@@ -3122,8 +3122,8 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws,
if (flags & (NIX_TX_MULTI_SEG_F | NIX_TX_OFFLOAD_SECURITY_F))
wd.data[0] >>= 16;
- if ((flags & NIX_TX_VWQE_F) && !(ws[1] & BIT_ULL(35)))
- ws[1] = roc_sso_hws_head_wait(ws[0]);
+ if ((flags & NIX_TX_VWQE_F) && !(ws[3] & BIT_ULL(35)))
+ ws[3] = roc_sso_hws_head_wait(ws[0]);
left -= burst;
--
2.41.0
More information about the dev
mailing list