[PATCH v2 025/148] net/ice/base: use model-dependent number of PHY ports

[Anatoly Burakov]

From: Ian Stokes <ian.stokes at intel.com>

Set up and use model-dependent number of PHY ports.

Also fix iterations over PTP ports.

Define 'max_phy_port', a new ice_hw struct member to store the max port number
handled by given clock owner. Replace 'phy_ports' with 'max_phy_port' for max
range in iterations over PTP ports in case of ETH56G based devices.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov at intel.com>
Signed-off-by: Grzegorz Nitka <grzegorz.nitka at intel.com>
Signed-off-by: Ian Stokes <ian.stokes at intel.com>
---
 drivers/net/ice/base/ice_ptp_hw.c | 2 ++
 drivers/net/ice/base/ice_type.h   | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 8ce803bfb3..5ce48250b4 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -1814,6 +1814,8 @@ ice_ptp_init_phy_cfg(struct ice_hw *hw)
 		hw->phy_cfg = ICE_PHY_E810;
 	else
 		hw->phy_cfg = ICE_PHY_E822;
+	hw->phy_ports = ICE_NUM_EXTERNAL_PORTS;
+	hw->max_phy_port = ICE_NUM_EXTERNAL_PORTS;
 
 	return 0;
 }
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 7a1471e474..48f892bfd3 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1260,6 +1260,8 @@ struct ice_hw {
 
 	u8 pf_id;		/* device profile info */
 	enum ice_phy_cfg phy_cfg;
+	u8 phy_ports;
+	u8 max_phy_port;
 	u8 logical_pf_id;
 
 	u16 max_burst_size;	/* driver sets this value */
-- 
2.43.0