[PATCH v4 081/103] net/ice/base: fix compile issues on some targets

[Anatoly Burakov]

To avoid triggering compile errors reported on some targets, use
explicit type casts to specify type conversion.

Signed-off-by: Anatoly Burakov <anatoly.burakov at intel.com>
---
 drivers/net/ice/base/ice_flow.h   | 2 +-
 drivers/net/ice/base/ice_parser.c | 3 ++-
 drivers/net/ice/base/ice_ptp_hw.c | 9 +++++----
 drivers/net/ice/base/ice_switch.c | 7 ++++---
 4 files changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index c1658be477..8c66fb1b96 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -485,7 +485,7 @@ struct ice_flow_entry {
 	u8 acts_cnt;
 };
 
-#define ICE_FLOW_ENTRY_HNDL(e)	((intptr_t)e)
+#define ICE_FLOW_ENTRY_HNDL(e)	((u64)e)
 #define ICE_FLOW_ENTRY_PTR(h)	((struct ice_flow_entry *)(h))
 
 struct ice_flow_prof {
diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c
index 551e24a5f5..67e36107b5 100644
--- a/drivers/net/ice/base/ice_parser.c
+++ b/drivers/net/ice/base/ice_parser.c
@@ -146,7 +146,8 @@ void *ice_parser_create_table(struct ice_hw *hw, u32 sect_type,
 			if (no_offset)
 				idx++;
 			else
-				idx = hdr->offset + state.entry_idx;
+				idx = LE16_TO_CPU(hdr->offset) +
+							state.entry_idx;
 			parse_item(hw, idx,
 				   (void *)((uintptr_t)table + idx * item_size),
 				   data, item_size);
diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 8a6b18b099..6929d72ccb 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -4063,7 +4063,7 @@ ice_phy_calc_pmd_adj_e822(struct ice_hw *hw, u8 port,
 			return err;
 		}
 
-		rx_cycle = val & P_REG_RX_80_TO_160_CNT_RXCYC_M;
+		rx_cycle = (u8)(val & P_REG_RX_80_TO_160_CNT_RXCYC_M);
 		if (rx_cycle) {
 			mult = rx_cycle * 40;
 
@@ -5825,13 +5825,14 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time, bool wr_main_tmr)
 	/* Fill Rx and Tx ports and send msg to PHY */
 	switch (hw->phy_model) {
 	case ICE_PHY_ETH56G:
-		err = ice_ptp_prep_phy_time_eth56g(hw, time & 0xFFFFFFFF);
+		err = ice_ptp_prep_phy_time_eth56g(hw,
+						   (u32)(time & 0xFFFFFFFF));
 		break;
 	case ICE_PHY_E810:
-		err = ice_ptp_prep_phy_time_e810(hw, time & 0xFFFFFFFF);
+		err = ice_ptp_prep_phy_time_e810(hw, (u32)(time & 0xFFFFFFFF));
 		break;
 	case ICE_PHY_E822:
-		err = ice_ptp_prep_phy_time_e822(hw, time & 0xFFFFFFFF);
+		err = ice_ptp_prep_phy_time_e822(hw, (u32)(time & 0xFFFFFFFF));
 		break;
 	default:
 		err = ICE_ERR_NOT_SUPPORTED;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 04b76840dd..92405e1fdb 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7593,7 +7593,8 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 		}
 
 		for (i = 0; i < entry->r_group.n_val_pairs; i++) {
-			buf[recps].content.lkup_indx[i + 1] = entry->fv_idx[i];
+			buf[recps].content.lkup_indx[i + 1] =
+				(u8)entry->fv_idx[i];
 			buf[recps].content.mask[i + 1] =
 				CPU_TO_LE16(entry->fv_mask[i]);
 		}
@@ -7614,8 +7615,8 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 				((chain_idx << ICE_AQ_RECIPE_RESULT_DATA_S) &
 				 ICE_AQ_RECIPE_RESULT_DATA_M);
 			ice_clear_bit(chain_idx, result_idx_bm);
-			chain_idx = ice_find_first_bit(result_idx_bm,
-						       ICE_MAX_FV_WORDS);
+			chain_idx = (u8)ice_find_first_bit(result_idx_bm,
+							   ICE_MAX_FV_WORDS);
 		}
 
 		/* fill recipe dependencies */
-- 
2.43.0