[PATCH v3 2/3] crypto/ipsec_mb: add HMAC SM3 algorithm support

[Brian Dooley]

This patch introduces HMAC SM3 algorithm support to the AESNI_MB PMD.

Signed-off-by: Brian Dooley <brian.dooley at intel.com>
---
v3:
	Add documentation
---
 doc/guides/cryptodevs/aesni_mb.rst          |  1 +
 doc/guides/cryptodevs/features/aesni_mb.ini |  1 +
 doc/guides/rel_notes/release_24_11.rst      |  1 +
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c      |  3 +++
 drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h | 24 ++++++++++++++++++++-
 5 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index 951f8a7ca8..f1073c3c0b 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -57,6 +57,7 @@ Hash algorithms:
 * RTE_CRYPTO_AUTH_SNOW3G_UIA2
 * RTE_CRYPTO_AUTH_KASUMI_F9
 * RTE_CRYPTO_AUTH_SM3
+* RTE_CRYPTO_AUTH_SM3 HMAC
 
 AEAD algorithms:
 
diff --git a/doc/guides/cryptodevs/features/aesni_mb.ini b/doc/guides/cryptodevs/features/aesni_mb.ini
index abab926b36..b4e9a1f65b 100644
--- a/doc/guides/cryptodevs/features/aesni_mb.ini
+++ b/doc/guides/cryptodevs/features/aesni_mb.ini
@@ -65,6 +65,7 @@ ZUC EIA3     = Y
 SNOW3G UIA2  = Y
 KASUMI F9    = Y
 SM3          = Y
+SM3 HMAC     = Y
 
 ;
 ; Supported AEAD algorithms of the 'aesni_mb' crypto driver.
diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index cd49f605b4..b8b68780c5 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -57,6 +57,7 @@ New Features
 
 * **Updated IPsec_MB crypto driver.**
   * Added support for SM3 algorithm.
+  * Added support for SM3 HMAC algorithm.
 
 
 Removed Items
diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
index 4711b7f590..019867fe1c 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
@@ -381,6 +381,9 @@ aesni_mb_set_session_auth_parameters(IMB_MGR *mb_mgr,
 	case RTE_CRYPTO_AUTH_SM3:
 		sess->template_job.hash_alg = IMB_AUTH_SM3;
 		break;
+	case RTE_CRYPTO_AUTH_SM3_HMAC:
+		sess->template_job.hash_alg = IMB_AUTH_HMAC_SM3;
+		break;
 #endif
 	default:
 		IPSEC_MB_LOG(ERR,
diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
index 50f78bc3ff..51104f159c 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
@@ -754,6 +754,27 @@ static const struct rte_cryptodev_capabilities aesni_mb_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* HMAC SM3 */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_SM3_HMAC,
+				.block_size = 64,
+				.key_size = {
+					.min = 1,
+					.max = 65535,
+					.increment = 1
+				},
+				.digest_size = {
+					.min = 32,
+					.max = 32,
+					.increment = 1
+				},
+				.iv_size = { 0 }
+			}, }
+		}, }
+	},
 #endif
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
@@ -865,7 +886,8 @@ static const unsigned int auth_digest_byte_lengths[] = {
 		[IMB_AUTH_SNOW3G_UIA2_BITLEN]	= 4,
 		[IMB_AUTH_KASUMI_UIA1]		= 4,
 #if IMB_VERSION(1, 5, 0) <= IMB_VERSION_NUM
-		[IMB_AUTH_SM3]			= 32
+		[IMB_AUTH_SM3]			= 32,
+		[IMB_AUTH_HMAC_SM3]		= 32,
 #endif
 	/**< Vector mode dependent pointer table of the multi-buffer APIs */
 
-- 
2.25.1