[PATCH v3 07/12] baseband/acc: algorithm tuning for LDPC decoder
Hernan Vargas
hernan.vargas at intel.com
Wed Oct 9 23:12:57 CEST 2024
Reverting to MS1 version of the algorithm to improve MU1 fading
conditions.
Signed-off-by: Hernan Vargas <hernan.vargas at intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin at redhat.com>
---
drivers/baseband/acc/rte_vrb_pmd.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c
index 519385e82ed3..4d7535e9d99f 100644
--- a/drivers/baseband/acc/rte_vrb_pmd.c
+++ b/drivers/baseband/acc/rte_vrb_pmd.c
@@ -1363,7 +1363,7 @@ vrb_dev_info_get(struct rte_bbdev *dev, struct rte_bbdev_driver_info *dev_info)
RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS |
RTE_BBDEV_LDPC_DEC_INTERRUPTS,
.llr_size = 8,
- .llr_decimals = 2,
+ .llr_decimals = 1,
.num_buffers_src =
RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
.num_buffers_hard_out =
@@ -1737,8 +1737,8 @@ vrb_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc_fcw_ld *fcw,
fcw->so_bypass_intlv = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_SOFT_OUT_DEINTERLEAVER_BYPASS);
fcw->so_bypass_rm = 0;
- fcw->minsum_offset = 1;
- fcw->dec_llrclip = 2;
+ fcw->minsum_offset = 0;
+ fcw->dec_llrclip = 0;
}
/*
--
2.37.1
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