[PATCH v1 20/30] net/i40e/base: add PHY debug register dump

[Anatoly Burakov]

From: Radoslaw Tyl <radoslawx.tyl at intel.com>

Add definitions for register dump for some PHY registers in order to
assist field debugging of link issues.

Signed-off-by: Radoslaw Tyl <radoslawx.tyl at intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov at intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index f440f0cbd1..e8372575e4 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -1414,6 +1414,13 @@
 #define I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT 24
 #define I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_MASK \
 	I40E_MASK(0x7, I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT)
+#define I40E_PRTMAC_PCS_LINK_STATUS2			0x0008C220
+#define I40E_PRTMAC_PCS_LINK_CTRL			0x0008C260
+#define I40E_PRTMAC_PCS_XGMII_FIFO_STATUS		0x0008C320
+#define I40E_PRTMAC_PCS_AN_LP_STATUS			0x0008C680
+#define I40E_PRTMAC_PCS_KR_STATUS			0x0008CA00
+#define I40E_PRTMAC_PCS_FEC_KR_STATUS1			0x0008CC20
+#define I40E_PRTMAC_PCS_FEC_KR_STATUS2			0x0008CC40
 #define I40E_GL_FWRESETCNT                  0x00083100 /* Reset: POR */
 #define I40E_GL_FWRESETCNT_FWRESETCNT_SHIFT 0
 #define I40E_GL_FWRESETCNT_FWRESETCNT_MASK  I40E_MASK(0xFFFFFFFF, I40E_GL_FWRESETCNT_FWRESETCNT_SHIFT)
-- 
2.43.5