[PATCH V1 3/3] net/mlx5/hws: print CQE error syndrome and more information

Gavin Li gavinl at nvidia.com
Tue Sep 10 09:58:53 CEST 2024


From: "Minggang Li (Gavin)" <gavinl at nvidia.com>

Signed-off-by: Gavin Li <gavinl at nvidia.com>
Acked-by: Alex Vesker <valex at nvidia.com>
---
 drivers/net/mlx5/hws/mlx5dr_send.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_send.c b/drivers/net/mlx5/hws/mlx5dr_send.c
index 3022c50260..c931896a79 100644
--- a/drivers/net/mlx5/hws/mlx5dr_send.c
+++ b/drivers/net/mlx5/hws/mlx5dr_send.c
@@ -598,8 +598,15 @@ static void mlx5dr_send_engine_poll_cq(struct mlx5dr_send_engine *queue,
 	    cqe_owner != sw_own)
 		return;
 
-	if (unlikely(cqe_opcode != MLX5_CQE_REQ))
+	if (unlikely(cqe_opcode != MLX5_CQE_REQ)) {
+		struct mlx5_err_cqe *err_cqe = (struct mlx5_err_cqe *)cqe;
+
+		DR_LOG(ERR, "CQE ERR:0x%x, Vender_ERR:0x%x, OP:0x%x, QPN:0x%x, WQE_CNT:0x%x",
+			err_cqe->syndrome, err_cqe->vendor_err_synd, cqe_opcode,
+			(rte_be_to_cpu_32(err_cqe->s_wqe_opcode_qpn) & 0xffffff),
+			rte_be_to_cpu_16(err_cqe->wqe_counter));
 		queue->err = true;
+	}
 
 	rte_io_rmb();
 
-- 
2.34.1



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