[PATCH v2] acl: add RISC-V vector extension implementation

[Konstantin Ananyev]

> Implement ACL classify function for RISC-V architecture
> using RISC-V Vector Extension instruction set.
> 
> Signed-off-by: Sun Yuechi <sunyuechi at iscas.ac.cn>
> Signed-off-by: Zijian <zijian.oerv at isrc.iscas.ac.cn>
> ---
>  app/test-acl/main.c              |   4 +
>  app/test/test_acl.c              |   1 +
>  config/riscv/meson.build         |   1 +
>  examples/l3fwd/l3fwd_acl.c       |   4 +
>  lib/acl/acl.h                    |   4 +
>  lib/acl/acl_run.h                |   2 +
>  lib/acl/acl_run_rvv.c            |  18 ++
>  lib/acl/acl_run_rvv.h            | 326 +++++++++++++++++++++++++++++++
>  lib/acl/meson.build              |   2 +
>  lib/acl/rte_acl.c                |  34 ++++
>  lib/acl/rte_acl.h                |   1 +
>  lib/eal/riscv/include/rte_vect.h |   2 +-
>  12 files changed, 398 insertions(+), 1 deletion(-)
>  create mode 100644 lib/acl/acl_run_rvv.c
>  create mode 100644 lib/acl/acl_run_rvv.h
> 

Acked-by: Konstantin Ananyev <konstantin.ananyev at huawei.com>

One more thing, that I nearly fogot:
As it is a new feature, it is probably worth to add a new entry into Release Notes.
If you'll decide to go ahead with that - pls keep my Ack.
Konstantin

> --
> 2.52.0
>