[PATCH] raw/cnxk_bphy: fix missing doxygen comments
Marat Khalili
marat.khalili at huawei.com
Mon Aug 24 14:10:40 CEST 2026
> -----Original Message-----
> From: Akhil Goyal <gakhil at marvell.com>
> Sent: Friday 7 August 2026 11:17
> To: dev at dpdk.org
> Cc: jpalider at marvell.com; tduszynski at marvell.com; jerinj at marvell.com; thomas at monjalon.net; Akhil Goyal
> <gakhil at marvell.com>; stable at dpdk.org; Marat Khalili <marat.khalili at huawei.com>
> Subject: [PATCH] raw/cnxk_bphy: fix missing doxygen comments
>
> Documentation build for raw driver cnxk_bphy,
> if included in `doc/api/doxy-api.conf.in`,
> fails because of missing dozygen comments.
> Added comments to fix the doc build.
>
> Bugzilla ID: 1962
> Fixes: 2e8bd307fae3 ("common/cnxk: support switching CPRI/ETH back and forth")
> Fixes: bd2fd34ab86f ("common/cnxk: sync eth mode change command with firmware")
> Cc: stable at dpdk.org
>
> Reported-by: Marat Khalili <marat.khalili at huawei.com>
> Signed-off-by: Akhil Goyal <gakhil at marvell.com>
Thank you for handling this!
Acked-by: Marat Khalili <marat.khalili at huawei.com>
Tested-by: Marat Khalili <marat.khalili at huawei.com>
> ---
> doc/api/doxy-api.conf.in | 1 +
> drivers/raw/cnxk_bphy/rte_pmd_bphy.h | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in
> index bedd944681..94096ee710 100644
> --- a/doc/api/doxy-api.conf.in
> +++ b/doc/api/doxy-api.conf.in
> @@ -24,6 +24,7 @@ INPUT = @TOPDIR@/doc/api/doxy-api-index.md \
> @TOPDIR@/drivers/net/intel/ixgbe \
> @TOPDIR@/drivers/net/mlx5 \
> @TOPDIR@/drivers/net/softnic \
> + @TOPDIR@/drivers/raw/cnxk_bphy \
> @TOPDIR@/drivers/raw/dpaa2_cmdif \
> @TOPDIR@/drivers/raw/ifpga \
> @TOPDIR@/lib/eal/include \
> diff --git a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> index f668e6ea82..99504dc496 100644
> --- a/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> +++ b/drivers/raw/cnxk_bphy/rte_pmd_bphy.h
> @@ -174,6 +174,7 @@ enum cnxk_bphy_cgx_eth_link_mode {
> __CNXK_BPHY_CGX_ETH_LINK_MODE_MAX
> };
>
> +/** Available CPRI modes */
> enum cnxk_bphy_cgx_eth_mode_cpri {
> /** 2.4G Lane Rate */
> CNXK_BPHY_CGX_ETH_MODE_CPRI_2_4G_BIT,
> @@ -191,6 +192,7 @@ enum cnxk_bphy_cgx_eth_mode_cpri {
> CNXK_BPHY_CGX_ETH_MODE_CPRI_24_3G_BIT,
> };
>
> +/** Available mode groups */
> enum cnxk_bphy_cgx_mode_group {
> /** ETH group */
> CNXK_BPHY_CGX_MODE_GROUP_ETH,
> --
> 2.43.0
>
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