[PATCH v3 12/36] net/intel: create a common scalar Tx function

[Bruce Richardson]

On Fri, Feb 06, 2026 at 12:01:38PM +0000, Loftus, Ciara wrote:
> > Subject: [PATCH v3 12/36] net/intel: create a common scalar Tx function
> > 
> > Given the similarities between the transmit functions across various
> > Intel drivers, make a start on consolidating them by moving the ice Tx
> > function into common, for reuse by other drivers.
> > 
> > Signed-off-by: Bruce Richardson <bruce.richardson at intel.com>
> > ---
> >  drivers/net/intel/common/tx_scalar_fns.h | 218 ++++++++++++++++++
> >  drivers/net/intel/ice/ice_rxtx.c         | 270 +++++------------------
> >  2 files changed, 270 insertions(+), 218 deletions(-)
> > 
> > diff --git a/drivers/net/intel/common/tx_scalar_fns.h
> > b/drivers/net/intel/common/tx_scalar_fns.h
> > index f88ca7f25a..6d01c14283 100644
> > --- a/drivers/net/intel/common/tx_scalar_fns.h
> > +++ b/drivers/net/intel/common/tx_scalar_fns.h
> 
> <snip>
> 
> > +typedef void (*write_ts_tail_t)(struct ci_tx_queue *txq, uint16_t ts_id);
> > +
> > +struct ci_timesstamp_queue_fns {
> 
> typo: timesstamp
> 
> > +	get_ts_tail_t get_ts_tail;
> > +	write_ts_desc_t write_ts_desc;
> > +	write_ts_tail_t write_ts_tail;
> > +};
> > +
> > +static inline uint16_t
> > +ci_xmit_pkts(struct ci_tx_queue *txq,
> > +	     struct rte_mbuf **tx_pkts,
> > +	     uint16_t nb_pkts,
> > +	     ci_get_ctx_desc_fn get_ctx_desc,
> > +	     const struct ci_timesstamp_queue_fns *ts_fns)
> > +{
> > +	volatile struct ci_tx_desc *ci_tx_ring;
> > +	volatile struct ci_tx_desc *txd;
> > +	struct ci_tx_entry *sw_ring;
> > +	struct ci_tx_entry *txe, *txn;
> > +	struct rte_mbuf *tx_pkt;
> > +	struct rte_mbuf *m_seg;
> > +	uint16_t tx_id;
> > +	uint16_t ts_id = -1;
> > +	uint16_t nb_tx;
> > +	uint16_t nb_used;
> > +	uint16_t nb_ctx;
> > +	uint32_t td_cmd = 0;
> > +	uint32_t td_offset = 0;
> > +	uint32_t td_tag = 0;
> > +	uint16_t tx_last;
> > +	uint16_t slen;
> > +	uint16_t l2_len;
> > +	uint64_t buf_dma_addr;
> > +	uint64_t ol_flags;
> > +	union ci_tx_offload tx_offload = {0};
> > +
> > +	sw_ring = txq->sw_ring;
> > +	ci_tx_ring = txq->ci_tx_ring;
> > +	tx_id = txq->tx_tail;
> > +	txe = &sw_ring[tx_id];
> > +
> > +	if (ts_fns != NULL)
> > +		ts_id = ts_fns->get_ts_tail(txq);
> > +
> > +	/* Check if the descriptor ring needs to be cleaned. */
> > +	if (txq->nb_tx_free < txq->tx_free_thresh)
> > +		(void)ci_tx_xmit_cleanup(txq);
> > +
> > +	for (nb_tx = 0; nb_tx < nb_pkts; nb_tx++) {
> > +		uint64_t cd_qw0, cd_qw1;
> > +		tx_pkt = *tx_pkts++;
> > +
> > +		ol_flags = tx_pkt->ol_flags;
> > +		td_cmd = CI_TX_DESC_CMD_ICRC;
> 
> Why change this initialisation from 0 in the ice code to this value in the common code?
> 
The spec specifies that this bit is reserved and should be set to 1.