[PATCH v6 11/24] bus/fslmc: replace rte_atomic16 with stdatomic
Stephen Hemminger
stephen at networkplumber.org
Fri Jul 31 06:57:49 CEST 2026
The rte_atomicNN functions and types are deprecated.
The in_use and ref_count flags can be converted to stdatomic.
Note that rte_atomic16_init() and rte_atomic16_clear() were plain
stores with no ordering; only test_and_set() and dec() implied a
full barrier. Initialization happens before the device is put on the
list, so a relaxed store is used there. It is spelled out explicitly
because a plain assignment to an RTE_ATOMIC() object is a sequentially
consistent store when built with enable_stdatomic=true.
Claiming a device now pairs an acquire compare exchange with a release
store on the free path, which is what the test_and_set()/dec() pair was
providing.
Also drop the unneeded NULL check in the loop body: TAILQ_FOREACH
terminates when the iterator becomes NULL, so var is guaranteed
non-NULL inside the loop.
Signed-off-by: Stephen Hemminger <stephen at networkplumber.org>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 11 ++++++++---
drivers/bus/fslmc/portal/dpaa2_hw_dpci.c | 11 ++++++++---
drivers/bus/fslmc/portal/dpaa2_hw_dpcon.c | 11 ++++++++---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 14 ++++++++++----
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 9 +++++----
5 files changed, 39 insertions(+), 17 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
index 925e83e97d..d2ddb76baf 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
@@ -84,7 +84,7 @@ dpaa2_create_dpbp_device(int vdev_fd __rte_unused,
}
dpbp_node->dpbp_id = dpbp_id;
- rte_atomic16_init(&dpbp_node->in_use);
+ rte_atomic_store_explicit(&dpbp_node->in_use, 0, rte_memory_order_relaxed);
TAILQ_INSERT_TAIL(&dpbp_dev_list, dpbp_node, next);
@@ -103,7 +103,11 @@ struct dpaa2_dpbp_dev *dpaa2_alloc_dpbp_dev(void)
/* Get DPBP dev handle from list using index */
TAILQ_FOREACH(dpbp_dev, &dpbp_dev_list, next) {
- if (dpbp_dev && rte_atomic16_test_and_set(&dpbp_dev->in_use))
+ uint16_t expected = 0;
+
+ if (rte_atomic_compare_exchange_strong_explicit(&dpbp_dev->in_use,
+ &expected, 1, rte_memory_order_acquire,
+ rte_memory_order_relaxed))
break;
}
@@ -118,7 +122,8 @@ void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp)
/* Match DPBP handle and mark it free */
TAILQ_FOREACH(dpbp_dev, &dpbp_dev_list, next) {
if (dpbp_dev == dpbp) {
- rte_atomic16_dec(&dpbp_dev->in_use);
+ rte_atomic_store_explicit(&dpbp_dev->in_use, 0,
+ rte_memory_order_release);
return;
}
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
index b546da82f6..20371fe062 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
@@ -135,7 +135,7 @@ rte_dpaa2_create_dpci_device(int vdev_fd __rte_unused,
}
dpci_node->dpci_id = dpci_id;
- rte_atomic16_init(&dpci_node->in_use);
+ rte_atomic_store_explicit(&dpci_node->in_use, 0, rte_memory_order_relaxed);
TAILQ_INSERT_TAIL(&dpci_dev_list, dpci_node, next);
@@ -159,7 +159,11 @@ struct dpaa2_dpci_dev *rte_dpaa2_alloc_dpci_dev(void)
/* Get DPCI dev handle from list using index */
TAILQ_FOREACH(dpci_dev, &dpci_dev_list, next) {
- if (dpci_dev && rte_atomic16_test_and_set(&dpci_dev->in_use))
+ uint16_t expected = 0;
+
+ if (rte_atomic_compare_exchange_strong_explicit(&dpci_dev->in_use,
+ &expected, 1, rte_memory_order_acquire,
+ rte_memory_order_relaxed))
break;
}
@@ -174,7 +178,8 @@ void rte_dpaa2_free_dpci_dev(struct dpaa2_dpci_dev *dpci)
/* Match DPCI handle and mark it free */
TAILQ_FOREACH(dpci_dev, &dpci_dev_list, next) {
if (dpci_dev == dpci) {
- rte_atomic16_dec(&dpci_dev->in_use);
+ rte_atomic_store_explicit(&dpci_dev->in_use, 0,
+ rte_memory_order_release);
return;
}
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpcon.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpcon.c
index 6fd96ec0b9..eff8bc2445 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpcon.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpcon.c
@@ -81,7 +81,7 @@ rte_dpaa2_create_dpcon_device(int dev_fd __rte_unused,
dpcon_node->qbman_ch_id = attr.qbman_ch_id;
dpcon_node->num_priorities = attr.num_priorities;
dpcon_node->dpcon_id = dpcon_id;
- rte_atomic16_init(&dpcon_node->in_use);
+ rte_atomic_store_explicit(&dpcon_node->in_use, 0, rte_memory_order_relaxed);
TAILQ_INSERT_TAIL(&dpcon_dev_list, dpcon_node, next);
@@ -95,7 +95,11 @@ struct dpaa2_dpcon_dev *rte_dpaa2_alloc_dpcon_dev(void)
/* Get DPCON dev handle from list using index */
TAILQ_FOREACH(dpcon_dev, &dpcon_dev_list, next) {
- if (dpcon_dev && rte_atomic16_test_and_set(&dpcon_dev->in_use))
+ uint16_t expected = 0;
+
+ if (rte_atomic_compare_exchange_strong_explicit(&dpcon_dev->in_use,
+ &expected, 1, rte_memory_order_acquire,
+ rte_memory_order_relaxed))
break;
}
@@ -110,7 +114,8 @@ void rte_dpaa2_free_dpcon_dev(struct dpaa2_dpcon_dev *dpcon)
/* Match DPCON handle and mark it free */
TAILQ_FOREACH(dpcon_dev, &dpcon_dev_list, next) {
if (dpcon_dev == dpcon) {
- rte_atomic16_dec(&dpcon_dev->in_use);
+ rte_atomic_store_explicit(&dpcon_dev->in_use, 0,
+ rte_memory_order_release);
return;
}
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index e17050b625..9fe449ed38 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -352,7 +352,8 @@ static void dpaa2_put_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
* armed: intr_deinit returns early if intr is not enabled.
*/
dpaa2_dpio_intr_deinit(dpio_dev);
- rte_atomic16_clear(&dpio_dev->ref_count);
+ rte_atomic_store_explicit(&dpio_dev->ref_count, 0,
+ rte_memory_order_release);
}
}
@@ -364,7 +365,11 @@ static struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(bool ethrx)
/* Get DPIO dev handle from list using index */
TAILQ_FOREACH(dpio_dev, &dpio_dev_list, next) {
- if (dpio_dev && rte_atomic16_test_and_set(&dpio_dev->ref_count))
+ uint16_t expected = 0;
+
+ if (rte_atomic_compare_exchange_strong_explicit(&dpio_dev->ref_count,
+ &expected, 1, rte_memory_order_acquire,
+ rte_memory_order_relaxed))
break;
}
if (!dpio_dev) {
@@ -385,7 +390,8 @@ static struct dpaa2_dpio_dev *dpaa2_get_qbman_swp(bool ethrx)
ret = dpaa2_configure_stashing(dpio_dev, cpu_id, ethrx);
if (ret) {
DPAA2_BUS_ERR("dpaa2_configure_stashing failed");
- rte_atomic16_clear(&dpio_dev->ref_count);
+ rte_atomic_store_explicit(&dpio_dev->ref_count, 0,
+ rte_memory_order_release);
return NULL;
}
}
@@ -500,7 +506,7 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->dpio = NULL;
dpio_dev->hw_id = object_id;
- rte_atomic16_init(&dpio_dev->ref_count);
+ rte_atomic_store_explicit(&dpio_dev->ref_count, 0, rte_memory_order_relaxed);
/* Using single portal for all devices */
dpio_dev->mc_portal = dpaa2_get_mcp_ptr(MC_PORTAL_INDEX);
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index ef65e7895a..556e1b01c0 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -9,6 +9,7 @@
#define _DPAA2_HW_PVT_H_
#include <rte_compat.h>
+#include <rte_stdatomic.h>
#include <rte_eventdev.h>
#include <dpaax_iova_table.h>
@@ -112,7 +113,7 @@ struct dpaa2_dpio_dev {
TAILQ_ENTRY(dpaa2_dpio_dev) next;
/**< Pointer to Next device instance */
uint16_t index; /**< Index of a instance in the list */
- rte_atomic16_t ref_count;
+ RTE_ATOMIC(uint16_t) ref_count;
/**< How many thread contexts are sharing this.*/
uint16_t eqresp_ci;
uint16_t eqresp_pi;
@@ -143,7 +144,7 @@ struct dpaa2_dpbp_dev {
/**< Pointer to Next device instance */
struct fsl_mc_io dpbp; /** handle to DPBP portal object */
uint16_t token;
- rte_atomic16_t in_use;
+ RTE_ATOMIC(uint16_t) in_use;
uint32_t dpbp_id; /*HW ID for DPBP object */
};
@@ -266,7 +267,7 @@ struct dpaa2_dpci_dev {
/**< Pointer to Next device instance */
struct fsl_mc_io dpci; /** handle to DPCI portal object */
uint16_t token;
- rte_atomic16_t in_use;
+ RTE_ATOMIC(uint16_t) in_use;
uint32_t dpci_id; /*HW ID for DPCI object */
struct dpaa2_queue rx_queue[DPAA2_DPCI_MAX_QUEUES];
struct dpaa2_queue tx_queue[DPAA2_DPCI_MAX_QUEUES];
@@ -276,7 +277,7 @@ struct dpaa2_dpcon_dev {
TAILQ_ENTRY(dpaa2_dpcon_dev) next;
struct fsl_mc_io dpcon;
uint16_t token;
- rte_atomic16_t in_use;
+ RTE_ATOMIC(uint16_t) in_use;
uint32_t dpcon_id;
uint16_t qbman_ch_id;
uint8_t num_priorities;
--
2.53.0
More information about the dev
mailing list