[PATCH 2/4] net/bnxt: Support for PTP on Wh+ using HWRM interface

[Mohammad Shuab Siddique]

From: Kalesh AP <kalesh-anakkur.purayil at broadcom.com>

Get rid of old code relying on mapped registers and use HWRM
interface wherever applicable during PTP initialization for Wh+.

Fixes: b11cceb83a34 ("net/bnxt: support timesync")
Cc: stable at dpdk.org
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil at broadcom.com>
Signed-off-by: Mohammad Shuab Siddique <mohammad-shuab.siddique at broadcom.com>
---
 drivers/net/bnxt/bnxt_ethdev.c | 63 ++--------------------------------
 drivers/net/bnxt/bnxt_hwrm.c   | 31 ++---------------
 2 files changed, 4 insertions(+), 90 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index 7d70d0f3ec..14d8fa705d 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -3754,55 +3754,6 @@ bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev,
 	return ptypes;
 }
 
-static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,
-			 int reg_win)
-{
-	uint32_t reg_base = *reg_arr & 0xfffff000;
-	uint32_t win_off;
-	int i;
-
-	for (i = 0; i < count; i++) {
-		if ((reg_arr[i] & 0xfffff000) != reg_base)
-			return -ERANGE;
-	}
-	win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
-	rte_write32(reg_base, (uint8_t *)bp->bar0 + win_off);
-	return 0;
-}
-
-static int bnxt_map_ptp_regs(struct bnxt *bp)
-{
-	struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
-	uint32_t *reg_arr;
-	int rc, i;
-
-	reg_arr = ptp->rx_regs;
-	rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_RX_REGS, 5);
-	if (rc)
-		return rc;
-
-	reg_arr = ptp->tx_regs;
-	rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_TX_REGS, 6);
-	if (rc)
-		return rc;
-
-	for (i = 0; i < BNXT_PTP_RX_REGS; i++)
-		ptp->rx_mapped_regs[i] = 0x5000 + (ptp->rx_regs[i] & 0xfff);
-
-	for (i = 0; i < BNXT_PTP_TX_REGS; i++)
-		ptp->tx_mapped_regs[i] = 0x6000 + (ptp->tx_regs[i] & 0xfff);
-
-	return 0;
-}
-
-static void bnxt_unmap_ptp_regs(struct bnxt *bp)
-{
-	rte_write32(0, (uint8_t *)bp->bar0 +
-			 BNXT_GRCPF_REG_WINDOW_BASE_OUT + 16);
-	rte_write32(0, (uint8_t *)bp->bar0 +
-			 BNXT_GRCPF_REG_WINDOW_BASE_OUT + 20);
-}
-
 static uint64_t bnxt_cc_read(struct bnxt *bp)
 {
 	uint64_t ns;
@@ -3976,13 +3927,7 @@ bnxt_timesync_enable(struct rte_eth_dev *dev)
 	ptp->tx_tstamp_tc.cc_shift = shift;
 	ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
 
-	/* TODO Revisit for Thor 2 */
-	if (!BNXT_CHIP_P5(bp))
-		bnxt_map_ptp_regs(bp);
-	else
-		rc = bnxt_ptp_start(bp);
-
-	return rc;
+	return bnxt_ptp_start(bp);
 }
 
 static int
@@ -4001,12 +3946,8 @@ bnxt_timesync_disable(struct rte_eth_dev *dev)
 
 	bnxt_hwrm_ptp_cfg(bp);
 
-	/* TODO Revisit for Thor 2 */
 	bp->ptp_all_rx_tstamp = 0;
-	if (!BNXT_CHIP_P5(bp))
-		bnxt_unmap_ptp_regs(bp);
-	else
-		bnxt_ptp_stop(bp);
+	bnxt_ptp_stop(bp);
 
 	return 0;
 }
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index afc948ac29..68e75e43bd 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -1027,14 +1027,8 @@ static int bnxt_hwrm_ptp_qcfg(struct bnxt *bp)
 
 	HWRM_CHECK_RESULT();
 
-	/* TODO Revisit for Thor 2 */
-	if (BNXT_CHIP_P5(bp)) {
-		if (!(resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_HWRM_ACCESS))
-			return 0;
-	} else {
-		if (!(resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_DIRECT_ACCESS))
-			return 0;
-	}
+	if (!(resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_HWRM_ACCESS))
+		return 0;
 
 	if (resp->flags & HWRM_PORT_MAC_PTP_QCFG_OUTPUT_FLAGS_ONE_STEP_TX_TS)
 		bp->flags |= BNXT_FLAG_FW_CAP_ONE_STEP_TX_TS;
@@ -1043,27 +1037,6 @@ static int bnxt_hwrm_ptp_qcfg(struct bnxt *bp)
 	if (!ptp)
 		return -ENOMEM;
 
-	if (!BNXT_CHIP_P5(bp)) {
-		ptp->rx_regs[BNXT_PTP_RX_TS_L] =
-			rte_le_to_cpu_32(resp->rx_ts_reg_off_lower);
-		ptp->rx_regs[BNXT_PTP_RX_TS_H] =
-			rte_le_to_cpu_32(resp->rx_ts_reg_off_upper);
-		ptp->rx_regs[BNXT_PTP_RX_SEQ] =
-			rte_le_to_cpu_32(resp->rx_ts_reg_off_seq_id);
-		ptp->rx_regs[BNXT_PTP_RX_FIFO] =
-			rte_le_to_cpu_32(resp->rx_ts_reg_off_fifo);
-		ptp->rx_regs[BNXT_PTP_RX_FIFO_ADV] =
-			rte_le_to_cpu_32(resp->rx_ts_reg_off_fifo_adv);
-		ptp->tx_regs[BNXT_PTP_TX_TS_L] =
-			rte_le_to_cpu_32(resp->tx_ts_reg_off_lower);
-		ptp->tx_regs[BNXT_PTP_TX_TS_H] =
-			rte_le_to_cpu_32(resp->tx_ts_reg_off_upper);
-		ptp->tx_regs[BNXT_PTP_TX_SEQ] =
-			rte_le_to_cpu_32(resp->tx_ts_reg_off_seq_id);
-		ptp->tx_regs[BNXT_PTP_TX_FIFO] =
-			rte_le_to_cpu_32(resp->tx_ts_reg_off_fifo);
-	}
-
 	ptp->bp = bp;
 	bp->ptp_cfg = ptp;
 
-- 
2.47.3