[PATCH v2 1/3] dma/ae4dma: introduce AMD AE4DMA DMA PMD

fengchengwen fengchengwen at huawei.com
Wed Jun 24 02:38:45 CEST 2026


On 6/22/2026 8:06 PM, David Marchand wrote:
> On Mon, 25 May 2026 at 20:43, Raghavendra Ningoji
> <raghavendra.ningoji at amd.com> wrote:
>> Add the skeleton of a new dmadev poll-mode driver for the AMD AE4DMA
>> hardware DMA engine, providing only PCI probe/remove and per-queue
>> hardware initialisation. An AE4DMA engine exposes 16 hardware command
>> queues, each with a 32-entry descriptor ring; the PMD maps each
>> hardware channel to its own dmadev with a single virtual channel,
>> so a PCI function appears as 16 dmadevs named "<pci-bdf>-ch0" ..
>> "<pci-bdf>-ch15".
> I am not familiar with DMA drivers, I am not sure it is something acceptable.
> @Chengwen for info.

This is acceptable. For a DMA controller (which may be a PCI device), there
may be multiple hardware channels, and each hardware channel is presented as
a dmadev device. The device name can be in the format of BDF-chX.



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