[dpdk-stable] [PATCH v2] net/mlx5: fix Tx doorbell memory barrier

Ferruh Yigit ferruh.yigit at intel.com
Wed Oct 25 23:34:43 CEST 2017

On 10/25/2017 2:19 AM, Nélio Laranjeiro wrote:
> On Tue, Oct 24, 2017 at 05:27:25PM -0700, Yongseok Koh wrote:
>> Configuring UAR as IO-mapped makes maximum throughput decline by noticeable
>> amount. If UAR is configured as write-combining register, a write memory
>> barrier is needed on ringing a doorbell. rte_wmb() is mostly effective when
>> the size of a burst is comparatively small. Revert the register back to
>> write-combining and enforce a write memory barrier instead, except for
>> vectorized Tx burst routines. Application can change it by setting
>> MLX5_SHUT_UP_BF under its own necessity.
>> Fixes: 9f9bebae5530 ("net/mlx5: don't map doorbell register to write combining")
>> Cc: stable at dpdk.org
>> Cc: Sagi Grimberg <sagi at grimberg.me>
>> Cc: Alexander Solganik <solganik at gmail.com>
>> Signed-off-by: Yongseok Koh <yskoh at mellanox.com>
>> Acked-by: Shahaf Shuler <shahafs at mellanox.com>
> Acked-by: Nelio Laranjeiro <nelio.laranjeiro at 6wind.com>

Applied to dpdk-next-net/master, thanks.

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