[dpdk-stable] patch 'net/i40e: fix filter pctype' has been queued to stable release 19.11.4
luca.boccassi at gmail.com
luca.boccassi at gmail.com
Fri Jul 24 14:00:02 CEST 2020
Hi,
FYI, your patch has been queued to stable release 19.11.4
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/26/20. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Thanks.
Luca Boccassi
---
>From 2f6583d4cc1a38117c0e386b4a3e3ec675346022 Mon Sep 17 00:00:00 2001
From: Shougang Wang <shougangx.wang at intel.com>
Date: Wed, 15 Jul 2020 08:08:10 +0000
Subject: [PATCH] net/i40e: fix filter pctype
[ upstream commit 11b58ac709690cb4086a0a01f979b3d3f8ea7d21 ]
The i40e_filter_pctype TCP_SYN_NO_ACK, UNICAST_IPV4_UDP and
MULTICAST_IPV4_UDP for x722 were missing when translating RSS type to
i40e_filter_pctype. This patch fixes it.
Fixes: da7018ec29d4 ("net/i40e: fix queue region in RSS flow")
Signed-off-by: Shougang Wang <shougangx.wang at intel.com>
Reviewed-by: Wei Zhao <wei.zhao1 at intel.com>
---
drivers/net/i40e/i40e_flow.c | 45 ++++++++++++++++++++++++++++++------
1 file changed, 38 insertions(+), 7 deletions(-)
diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
index a83543c26..ae2fb4593 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
@@ -4325,11 +4325,12 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
const struct rte_flow_action *act;
const struct rte_flow_action_rss *rss;
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+ struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct i40e_queue_regions *info = &pf->queue_region;
struct i40e_rte_flow_rss_conf *rss_config =
&filter->rss_conf;
struct i40e_rte_flow_rss_conf *rss_info = &pf->rss_info;
- uint16_t i, j, n, tmp;
+ uint16_t i, j, n, m, tmp;
uint32_t index = 0;
static const struct {
@@ -4360,6 +4361,24 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
I40E_FILTER_PCTYPE_L2_PAYLOAD},
};
+ static const struct {
+ uint64_t rss_type;
+ enum i40e_filter_pctype pctype;
+ } pctype_match_table_x722[] = {
+ {ETH_RSS_NONFRAG_IPV4_TCP,
+ I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK},
+ {ETH_RSS_NONFRAG_IPV4_UDP,
+ I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP},
+ {ETH_RSS_NONFRAG_IPV4_UDP,
+ I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP},
+ {ETH_RSS_NONFRAG_IPV6_TCP,
+ I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK},
+ {ETH_RSS_NONFRAG_IPV6_UDP,
+ I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP},
+ {ETH_RSS_NONFRAG_IPV6_UDP,
+ I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP},
+ };
+
NEXT_ITEM_OF_ACTION(act, actions, index);
rss = act->conf;
@@ -4385,6 +4404,18 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
break;
}
}
+
+ if (hw->mac.type == I40E_MAC_X722)
+ for (j = 0; j < RTE_DIM(pctype_match_table_x722); j++) {
+ if (rss->types &
+ pctype_match_table_x722[j].rss_type) {
+ m = conf_info->region[0].flowtype_num;
+ conf_info->region[0].hw_flowtype[m] =
+ pctype_match_table_x722[j].pctype;
+ conf_info->region[0].flowtype_num++;
+ conf_info->queue_region_number = 1;
+ }
+ }
}
/**
@@ -4482,9 +4513,9 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
info->region[i].user_priority_num++;
}
- j = info->region[i].flowtype_num;
- tmp = conf_info->region[n].hw_flowtype[0];
- if (conf_info->region[n].flowtype_num) {
+ for (m = 0; m < conf_info->region[n].flowtype_num; m++) {
+ j = info->region[i].flowtype_num;
+ tmp = conf_info->region[n].hw_flowtype[m];
info->region[i].hw_flowtype[j] = tmp;
info->region[i].flowtype_num++;
}
@@ -4497,9 +4528,9 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
info->region[i].user_priority_num++;
}
- j = info->region[i].flowtype_num;
- tmp = conf_info->region[n].hw_flowtype[0];
- if (conf_info->region[n].flowtype_num) {
+ for (m = 0; m < conf_info->region[n].flowtype_num; m++) {
+ j = info->region[i].flowtype_num;
+ tmp = conf_info->region[n].hw_flowtype[m];
info->region[i].hw_flowtype[j] = tmp;
info->region[i].flowtype_num++;
}
--
2.20.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2020-07-24 12:53:54.891279246 +0100
+++ 0164-net-i40e-fix-filter-pctype.patch 2020-07-24 12:53:48.547011304 +0100
@@ -1,14 +1,15 @@
-From 11b58ac709690cb4086a0a01f979b3d3f8ea7d21 Mon Sep 17 00:00:00 2001
+From 2f6583d4cc1a38117c0e386b4a3e3ec675346022 Mon Sep 17 00:00:00 2001
From: Shougang Wang <shougangx.wang at intel.com>
Date: Wed, 15 Jul 2020 08:08:10 +0000
Subject: [PATCH] net/i40e: fix filter pctype
+[ upstream commit 11b58ac709690cb4086a0a01f979b3d3f8ea7d21 ]
+
The i40e_filter_pctype TCP_SYN_NO_ACK, UNICAST_IPV4_UDP and
MULTICAST_IPV4_UDP for x722 were missing when translating RSS type to
i40e_filter_pctype. This patch fixes it.
Fixes: da7018ec29d4 ("net/i40e: fix queue region in RSS flow")
-Cc: stable at dpdk.org
Signed-off-by: Shougang Wang <shougangx.wang at intel.com>
Reviewed-by: Wei Zhao <wei.zhao1 at intel.com>
@@ -17,10 +18,10 @@
1 file changed, 38 insertions(+), 7 deletions(-)
diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
-index 9a8bca46f..51d8fdd79 100644
+index a83543c26..ae2fb4593 100644
--- a/drivers/net/i40e/i40e_flow.c
+++ b/drivers/net/i40e/i40e_flow.c
-@@ -4851,11 +4851,12 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
+@@ -4325,11 +4325,12 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
const struct rte_flow_action *act;
const struct rte_flow_action_rss *rss;
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
@@ -29,12 +30,12 @@
struct i40e_rte_flow_rss_conf *rss_config =
&filter->rss_conf;
struct i40e_rte_flow_rss_conf *rss_info = &pf->rss_info;
-- uint16_t i, j, n, tmp, nb_types;
-+ uint16_t i, j, n, m, tmp, nb_types;
+- uint16_t i, j, n, tmp;
++ uint16_t i, j, n, m, tmp;
uint32_t index = 0;
- uint64_t hf_bit = 1;
-@@ -4887,6 +4888,24 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
+ static const struct {
+@@ -4360,6 +4361,24 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
I40E_FILTER_PCTYPE_L2_PAYLOAD},
};
@@ -59,7 +60,7 @@
NEXT_ITEM_OF_ACTION(act, actions, index);
rss = act->conf;
-@@ -4912,6 +4931,18 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
+@@ -4385,6 +4404,18 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
break;
}
}
@@ -78,7 +79,7 @@
}
/**
-@@ -5009,9 +5040,9 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
+@@ -4482,9 +4513,9 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
info->region[i].user_priority_num++;
}
@@ -91,7 +92,7 @@
info->region[i].hw_flowtype[j] = tmp;
info->region[i].flowtype_num++;
}
-@@ -5024,9 +5055,9 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
+@@ -4497,9 +4528,9 @@ i40e_flow_parse_rss_action(struct rte_eth_dev *dev,
info->region[i].user_priority_num++;
}
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