[dpdk-stable] patch 'crypto/nitrox: fix CSR register address generation' has been queued to stable release 19.11.3

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 19.11.3

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 05/21/20. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Thanks.

Luca Boccassi

---
>From b878b432b77ca835ffedc90b850ee61afa4ad6fb Mon Sep 17 00:00:00 2001
From: Nagadheeraj Rottela <rnagadheeraj at marvell.com>
Date: Fri, 27 Mar 2020 19:12:38 +0530
Subject: [PATCH] crypto/nitrox: fix CSR register address generation

[ upstream commit 76522b25b15316400aab26cc8187e19397998f53 ]

If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will
evaluate to incorrect values due to unintended sign extension from int
to unsigned long. To fix this, add UL suffix to the constants in these
macros. The same problem is with AQMQ_QSZX() macro also.

Coverity issue: 349899, 349905, 349911, 349921, 349923
Fixes: 32e4930d5a3b ("crypto/nitrox: add hardware queue management")
Fixes: 0a8fc2423bff ("crypto/nitrox: introduce Nitrox driver")

Signed-off-by: Nagadheeraj Rottela <rnagadheeraj at marvell.com>
Acked-by: Akhil Goyal <akhil.goyal at nxp.com>
---
 drivers/crypto/nitrox/nitrox_csr.h | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/crypto/nitrox/nitrox_csr.h b/drivers/crypto/nitrox/nitrox_csr.h
index 8cd92e38be..de7a3c6713 100644
--- a/drivers/crypto/nitrox/nitrox_csr.h
+++ b/drivers/crypto/nitrox/nitrox_csr.h
@@ -12,18 +12,18 @@
 #define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset))
 
 /* NPS packet registers */
-#define NPS_PKT_IN_INSTR_CTLX(_i)	(0x10060 + ((_i) * 0x40000))
-#define NPS_PKT_IN_INSTR_BADDRX(_i)	(0x10068 + ((_i) * 0x40000))
-#define NPS_PKT_IN_INSTR_RSIZEX(_i)	(0x10070 + ((_i) * 0x40000))
-#define NPS_PKT_IN_DONE_CNTSX(_i)	(0x10080 + ((_i) * 0x40000))
-#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i)	(0x10078 + ((_i) * 0x40000))
-#define NPS_PKT_IN_INT_LEVELSX(_i)		(0x10088 + ((_i) * 0x40000))
-#define NPS_PKT_SLC_CTLX(_i)		(0x10000 + ((_i) * 0x40000))
-#define NPS_PKT_SLC_CNTSX(_i)		(0x10008 + ((_i) * 0x40000))
-#define NPS_PKT_SLC_INT_LEVELSX(_i)	(0x10010 + ((_i) * 0x40000))
+#define NPS_PKT_IN_INSTR_CTLX(_i)	(0x10060UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_INSTR_BADDRX(_i)	(0x10068UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_INSTR_RSIZEX(_i)	(0x10070UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_DONE_CNTSX(_i)	(0x10080UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i)	(0x10078UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_INT_LEVELSX(_i)		(0x10088UL + ((_i) * 0x40000UL))
+#define NPS_PKT_SLC_CTLX(_i)		(0x10000UL + ((_i) * 0x40000UL))
+#define NPS_PKT_SLC_CNTSX(_i)		(0x10008UL + ((_i) * 0x40000UL))
+#define NPS_PKT_SLC_INT_LEVELSX(_i)	(0x10010UL + ((_i) * 0x40000UL))
 
 /* AQM Virtual Function Registers */
-#define AQMQ_QSZX(_i)			(0x20008 + ((_i)*0x40000))
+#define AQMQ_QSZX(_i)			(0x20008UL + ((_i) * 0x40000UL))
 
 static inline uint64_t
 nitrox_read_csr(uint8_t *bar_addr, uint64_t offset)
-- 
2.20.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2020-05-19 13:56:21.431637024 +0100
+++ 0064-crypto-nitrox-fix-CSR-register-address-generation.patch	2020-05-19 13:56:18.295503187 +0100
@@ -1,8 +1,10 @@
-From 76522b25b15316400aab26cc8187e19397998f53 Mon Sep 17 00:00:00 2001
+From b878b432b77ca835ffedc90b850ee61afa4ad6fb Mon Sep 17 00:00:00 2001
 From: Nagadheeraj Rottela <rnagadheeraj at marvell.com>
 Date: Fri, 27 Mar 2020 19:12:38 +0530
 Subject: [PATCH] crypto/nitrox: fix CSR register address generation
 
+[ upstream commit 76522b25b15316400aab26cc8187e19397998f53 ]
+
 If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will
 evaluate to incorrect values due to unintended sign extension from int
 to unsigned long. To fix this, add UL suffix to the constants in these
@@ -11,7 +13,6 @@
 Coverity issue: 349899, 349905, 349911, 349921, 349923
 Fixes: 32e4930d5a3b ("crypto/nitrox: add hardware queue management")
 Fixes: 0a8fc2423bff ("crypto/nitrox: introduce Nitrox driver")
-Cc: stable at dpdk.org
 
 Signed-off-by: Nagadheeraj Rottela <rnagadheeraj at marvell.com>
 Acked-by: Akhil Goyal <akhil.goyal at nxp.com>