[dpdk-stable] patch 'eal/x86: fix memcpy AVX-512 enablement' has been queued to stable release 19.11.6

[luca.boccassi at gmail.com]

Hi,

FYI, your patch has been queued to stable release 19.11.6

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 10/30/20. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Thanks.

Luca Boccassi

---
>From 73a7720e3abce74051e059370a1db04cfbd7b10a Mon Sep 17 00:00:00 2001
From: Bruce Richardson <bruce.richardson at intel.com>
Date: Mon, 12 Oct 2020 15:51:48 +0100
Subject: [PATCH] eal/x86: fix memcpy AVX-512 enablement

[ upstream commit e8a83681f458d95d197bd37208fed3c3900def03 ]

When testing on some x86 platforms, code compiled with meson was observed
running at a different power-license level to that compiled with make. This
is due to the fact that meson auto-detects the instruction sets available
on the system and enabled AVX512 rte_memcpy when AVX512 was available,
while on make, a build time AVX-512 flag needed to be explicitly set to
enable that AVX512 rte_memcpy code path.

In the absence of runtime path selection for rte_memcpy - which is
complicated by it being a static inline function in a header file - we can
fix this behaviour regression by similarly having a build-time option which
must be set to enable the AVX-512 memcpy path.

Fixes: a25a650be5f0 ("build: add infrastructure for meson and ninja builds")
Fixes: 3e1bb55fd6ef ("build/x86: add SSE flags")

Signed-off-by: Bruce Richardson <bruce.richardson at intel.com>
Tested-by: Yingya Han <yingyax.han at intel.com>
---
 lib/librte_eal/common/include/arch/x86/rte_memcpy.h | 2 +-
 lib/librte_eal/common/include/generic/rte_memcpy.h  | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h
index 9c67232df9..d01832fa15 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h
@@ -45,7 +45,7 @@ extern "C" {
 static __rte_always_inline void *
 rte_memcpy(void *dst, const void *src, size_t n);
 
-#ifdef RTE_MACHINE_CPUFLAG_AVX512F
+#if defined RTE_MACHINE_CPUFLAG_AVX512F && defined RTE_MEMCPY_AVX512
 
 #define ALIGNMENT_MASK 0x3F
 
diff --git a/lib/librte_eal/common/include/generic/rte_memcpy.h b/lib/librte_eal/common/include/generic/rte_memcpy.h
index 701e550c31..e7f0f8eaa9 100644
--- a/lib/librte_eal/common/include/generic/rte_memcpy.h
+++ b/lib/librte_eal/common/include/generic/rte_memcpy.h
@@ -95,6 +95,10 @@ rte_mov256(uint8_t *dst, const uint8_t *src);
  * @note This is implemented as a macro, so it's address should not be taken
  * and care is needed as parameter expressions may be evaluated multiple times.
  *
+ * @note For x86 platforms to enable the AVX-512 memcpy implementation, set
+ * -DRTE_MEMCPY_AVX512 macro in CFLAGS, or define the RTE_MEMCPY_AVX512 macro
+ * explicitly in the source file before including the rte_memcpy header file.
+ *
  * @param dst
  *   Pointer to the destination of the data.
  * @param src
-- 
2.20.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2020-10-28 10:35:16.696918899 +0000
+++ 0160-eal-x86-fix-memcpy-AVX-512-enablement.patch	2020-10-28 10:35:11.756833733 +0000
@@ -1,8 +1,10 @@
-From e8a83681f458d95d197bd37208fed3c3900def03 Mon Sep 17 00:00:00 2001
+From 73a7720e3abce74051e059370a1db04cfbd7b10a Mon Sep 17 00:00:00 2001
 From: Bruce Richardson <bruce.richardson at intel.com>
 Date: Mon, 12 Oct 2020 15:51:48 +0100
 Subject: [PATCH] eal/x86: fix memcpy AVX-512 enablement
 
+[ upstream commit e8a83681f458d95d197bd37208fed3c3900def03 ]
+
 When testing on some x86 platforms, code compiled with meson was observed
 running at a different power-license level to that compiled with make. This
 is due to the fact that meson auto-detects the instruction sets available
@@ -17,19 +19,31 @@
 
 Fixes: a25a650be5f0 ("build: add infrastructure for meson and ninja builds")
 Fixes: 3e1bb55fd6ef ("build/x86: add SSE flags")
-Cc: stable at dpdk.org
 
 Signed-off-by: Bruce Richardson <bruce.richardson at intel.com>
 Tested-by: Yingya Han <yingyax.han at intel.com>
 ---
- lib/librte_eal/include/generic/rte_memcpy.h | 4 ++++
- lib/librte_eal/x86/include/rte_memcpy.h     | 2 +-
+ lib/librte_eal/common/include/arch/x86/rte_memcpy.h | 2 +-
+ lib/librte_eal/common/include/generic/rte_memcpy.h  | 4 ++++
  2 files changed, 5 insertions(+), 1 deletion(-)
 
-diff --git a/lib/librte_eal/include/generic/rte_memcpy.h b/lib/librte_eal/include/generic/rte_memcpy.h
+diff --git a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h
+index 9c67232df9..d01832fa15 100644
+--- a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h
++++ b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h
+@@ -45,7 +45,7 @@ extern "C" {
+ static __rte_always_inline void *
+ rte_memcpy(void *dst, const void *src, size_t n);
+ 
+-#ifdef RTE_MACHINE_CPUFLAG_AVX512F
++#if defined RTE_MACHINE_CPUFLAG_AVX512F && defined RTE_MEMCPY_AVX512
+ 
+ #define ALIGNMENT_MASK 0x3F
+ 
+diff --git a/lib/librte_eal/common/include/generic/rte_memcpy.h b/lib/librte_eal/common/include/generic/rte_memcpy.h
 index 701e550c31..e7f0f8eaa9 100644
---- a/lib/librte_eal/include/generic/rte_memcpy.h
-+++ b/lib/librte_eal/include/generic/rte_memcpy.h
+--- a/lib/librte_eal/common/include/generic/rte_memcpy.h
++++ b/lib/librte_eal/common/include/generic/rte_memcpy.h
 @@ -95,6 +95,10 @@ rte_mov256(uint8_t *dst, const uint8_t *src);
   * @note This is implemented as a macro, so it's address should not be taken
   * and care is needed as parameter expressions may be evaluated multiple times.
@@ -41,19 +55,6 @@
   * @param dst
   *   Pointer to the destination of the data.
   * @param src
-diff --git a/lib/librte_eal/x86/include/rte_memcpy.h b/lib/librte_eal/x86/include/rte_memcpy.h
-index 008a3de67f..79f381dd9b 100644
---- a/lib/librte_eal/x86/include/rte_memcpy.h
-+++ b/lib/librte_eal/x86/include/rte_memcpy.h
-@@ -45,7 +45,7 @@ extern "C" {
- static __rte_always_inline void *
- rte_memcpy(void *dst, const void *src, size_t n);
- 
--#ifdef __AVX512F__
-+#if defined __AVX512F__ && defined RTE_MEMCPY_AVX512
- 
- #define ALIGNMENT_MASK 0x3F
- 
 -- 
 2.20.1