[dpdk-stable] patch 'net/mlx5: check FW miniCQE format capabilities' has been queued to stable release 20.11.1

Luca Boccassi bluca at debian.org
Tue Feb 9 11:42:58 CET 2021


On Tue, 2021-02-09 at 10:35 +0000, luca.boccassi at gmail.com wrote:
> Hi,
> 
> FYI, your patch has been queued to stable release 20.11.1
> 
> Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
> It will be pushed if I get no objections before 02/11/21. So please
> shout if anyone has objections.
> 
> Also note that after the patch there's a diff of the upstream commit vs the
> patch applied to the branch. This will indicate if there was any rebasing
> needed to apply to the stable branch. If there were code changes for rebasing
> (ie: not only metadata diffs), please double check that the rebase was
> correctly done.
> 
> Queued patches are on a temporary branch at:
> https://github.com/bluca/dpdk-stable
> 
> This queued commit can be viewed at:
> https://github.com/bluca/dpdk-stable/commit/de75752e7e707382086c7d0e88b4946b6e9ca7bf
> 
> Thanks.
> 
> Luca Boccassi
> 
> ---
> From de75752e7e707382086c7d0e88b4946b6e9ca7bf Mon Sep 17 00:00:00 2001
> From: Alexander Kozyrev <akozyrev at nvidia.com>
> Date: Tue, 2 Feb 2021 02:07:37 +0000
> Subject: [PATCH] net/mlx5: check FW miniCQE format capabilities
> 
> [ upstream commit 3d3f4e6d1aaaec77016a8b406371f1b491ae9044 ]
> 
> miniCQE formats for Flow Tag and L3/L4 Header compression are only
> supported by Mellanox FW starting version 16.29.392. There is no
> point to allow user to enable these formats if FW cannot provide them.
> Check FW capabilities and deny user requests if the selected miniCQE
> format is not supported by an underlying NIC.
> 
> Fixes: 54c2d46b160f ("net/mlx5: support flow tag and packet header miniCQEs")
> 
> Signed-off-by: Alexander Kozyrev <akozyrev at nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
> ---
>  drivers/common/mlx5/mlx5_devx_cmds.c |  5 +++++
>  drivers/common/mlx5/mlx5_devx_cmds.h |  3 +++
>  drivers/common/mlx5/mlx5_prm.h       |  5 ++++-
>  drivers/net/mlx5/linux/mlx5_os.c     | 32 ++++++++++++++++++----------
>  4 files changed, 33 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
> index a0277b7cc0..eafee65f22 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.c
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.c
> @@ -720,6 +720,11 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
>  	attr->flow_hit_aso = !!(MLX5_GET64(cmd_hca_cap, hcattr,
>  					   general_obj_types) &
>  				MLX5_GENERAL_OBJ_TYPES_CAP_FLOW_HIT_ASO);
> +	attr->cqe_compression = MLX5_GET(cmd_hca_cap, hcattr, cqe_compression);
> +	attr->mini_cqe_resp_flow_tag = MLX5_GET(cmd_hca_cap, hcattr,
> +						mini_cqe_resp_flow_tag);
> +	attr->mini_cqe_resp_l3_l4_tag = MLX5_GET(cmd_hca_cap, hcattr,
> +						 mini_cqe_resp_l3_l4_tag);
>  	if (attr->qos.sup) {
>  		MLX5_SET(query_hca_cap_in, in, op_mod,
>  			 MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP |
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h
> index bddeabf0ea..78202eba9d 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.h
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.h
> @@ -115,6 +115,9 @@ struct mlx5_hca_attr {
>  	uint32_t regex:1;
>  	uint32_t regexp_num_of_engines;
>  	uint32_t log_max_ft_sampler_num:8;
> +	uint32_t cqe_compression:1;
> +	uint32_t mini_cqe_resp_flow_tag:1;
> +	uint32_t mini_cqe_resp_l3_l4_tag:1;
>  	struct mlx5_hca_qos_attr qos;
>  	struct mlx5_hca_vdpa_attr vdpa;
>  };
> diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
> index 6f5e5dc5f6..00b425ac85 100644
> --- a/drivers/common/mlx5/mlx5_prm.h
> +++ b/drivers/common/mlx5/mlx5_prm.h
> @@ -1364,7 +1364,10 @@ struct mlx5_ifc_cmd_hca_cap_bits {
>  	u8 num_of_uars_per_page[0x20];
>  	u8 flex_parser_protocols[0x20];
>  	u8 reserved_at_560[0x20];
> -	u8 reserved_at_580[0x3c];
> +	u8 reserved_at_580[0x39];
> +	u8 mini_cqe_resp_l3_l4_tag[0x1];
> +	u8 mini_cqe_resp_flow_tag[0x1];
> +	u8 enhanced_cqe_compression[0x1];
>  	u8 mini_cqe_resp_stride_index[0x1];
>  	u8 cqe_128_always[0x1];
>  	u8 cqe_compression_128[0x1];

Please triple-check this one, as I counted manually to adjust the
padding.

-- 
Kind regards,
Luca Boccassi


More information about the stable mailing list