patch 'common/mlx5: glue MR registration with IOVA' has been queued to stable release 20.11.4

Xueming Li xuemingl at nvidia.com
Sun Nov 28 15:53:05 CET 2021


Hi,

FYI, your patch has been queued to stable release 20.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/30/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/steevenlee/dpdk

This queued commit can be viewed at:
https://github.com/steevenlee/dpdk/commit/2991d7abc22335185b28558708a171612a581d22

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 2991d7abc22335185b28558708a171612a581d22 Mon Sep 17 00:00:00 2001
From: Michael Baum <michaelba at nvidia.com>
Date: Tue, 9 Nov 2021 14:36:08 +0200
Subject: [PATCH] common/mlx5: glue MR registration with IOVA
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 6ebd062e0602f0571cf9abbe9eabd0e5f6ad0a39 ]

Add support for rdma-core API to register IOVA MR.
The API gets the process VA, size, and IOVA and returns a memory region
with space pointed by a specific IOVA.

So any access in this MR should come with an address that is relative to
the IOVA specified in the API.

Fixes: cc07a42da250 ("vdpa/mlx5: prepare memory regions")

Signed-off-by: Michael Baum <michaelba at nvidia.com>
Signed-off-by: Matan Azrad <matan at nvidia.com>
---
 drivers/common/mlx5/linux/meson.build |  2 ++
 drivers/common/mlx5/linux/mlx5_glue.c | 18 ++++++++++++++++++
 drivers/common/mlx5/linux/mlx5_glue.h |  3 +++
 3 files changed, 23 insertions(+)

diff --git a/drivers/common/mlx5/linux/meson.build b/drivers/common/mlx5/linux/meson.build
index c2d580c4a6..43d70c1324 100644
--- a/drivers/common/mlx5/linux/meson.build
+++ b/drivers/common/mlx5/linux/meson.build
@@ -188,6 +188,8 @@ has_sym_args = [
 	[ 'HAVE_DEVLINK', 'linux/devlink.h', 'DEVLINK_GENL_NAME' ],
         [ 'HAVE_MLX5_DR_CREATE_ACTION_ASO', 'infiniband/mlx5dv.h',
         'mlx5dv_dr_action_create_aso' ],
+        [ 'HAVE_MLX5_IBV_REG_MR_IOVA', 'infiniband/verbs.h',
+            'ibv_reg_mr_iova' ],
 ]
 config = configuration_data()
 foreach arg:has_sym_args
diff --git a/drivers/common/mlx5/linux/mlx5_glue.c b/drivers/common/mlx5/linux/mlx5_glue.c
index 09fdce1c22..97ac5d3b5e 100644
--- a/drivers/common/mlx5/linux/mlx5_glue.c
+++ b/drivers/common/mlx5/linux/mlx5_glue.c
@@ -224,6 +224,23 @@ mlx5_glue_reg_mr(struct ibv_pd *pd, void *addr, size_t length, int access)
 	return ibv_reg_mr(pd, addr, length, access);
 }
 
+static struct ibv_mr *
+mlx5_glue_reg_mr_iova(struct ibv_pd *pd, void *addr, size_t length,
+		      uint64_t iova, int access)
+{
+#ifdef HAVE_MLX5_IBV_REG_MR_IOVA
+		return ibv_reg_mr_iova(pd, addr, length, iova, access);
+#else
+	(void)pd;
+	(void)addr;
+	(void)length;
+	(void)iova;
+	(void)access;
+	errno = ENOTSUP;
+	return NULL;
+#endif
+}
+
 static struct ibv_mr *
 mlx5_glue_alloc_null_mr(struct ibv_pd *pd)
 {
@@ -1389,6 +1406,7 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {
 	.destroy_qp = mlx5_glue_destroy_qp,
 	.modify_qp = mlx5_glue_modify_qp,
 	.reg_mr = mlx5_glue_reg_mr,
+	.reg_mr_iova = mlx5_glue_reg_mr_iova,
 	.alloc_null_mr = mlx5_glue_alloc_null_mr,
 	.dereg_mr = mlx5_glue_dereg_mr,
 	.create_counter_set = mlx5_glue_create_counter_set,
diff --git a/drivers/common/mlx5/linux/mlx5_glue.h b/drivers/common/mlx5/linux/mlx5_glue.h
index f08c83768c..d48a06d443 100644
--- a/drivers/common/mlx5/linux/mlx5_glue.h
+++ b/drivers/common/mlx5/linux/mlx5_glue.h
@@ -196,6 +196,9 @@ struct mlx5_glue {
 			 int attr_mask);
 	struct ibv_mr *(*reg_mr)(struct ibv_pd *pd, void *addr,
 				 size_t length, int access);
+	struct ibv_mr *(*reg_mr_iova)(struct ibv_pd *pd, void *addr,
+				      size_t length, uint64_t iova,
+				      int access);
 	struct ibv_mr *(*alloc_null_mr)(struct ibv_pd *pd);
 	int (*dereg_mr)(struct ibv_mr *mr);
 	struct ibv_counter_set *(*create_counter_set)
-- 
2.34.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-11-28 22:41:03.641565773 +0800
+++ 0001-common-mlx5-glue-MR-registration-with-IOVA.patch	2021-11-28 22:41:03.183543455 +0800
@@ -1 +1 @@
-From 6ebd062e0602f0571cf9abbe9eabd0e5f6ad0a39 Mon Sep 17 00:00:00 2001
+From 2991d7abc22335185b28558708a171612a581d22 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 6ebd062e0602f0571cf9abbe9eabd0e5f6ad0a39 ]
@@ -14 +16,0 @@
-Cc: stable at dpdk.org
@@ -25 +27 @@
-index 2dcd27b778..7909f23e21 100644
+index c2d580c4a6..43d70c1324 100644
@@ -28,4 +30,4 @@
-@@ -200,6 +200,8 @@ has_sym_args = [
-             'MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR' ],
-         [ 'HAVE_MLX5_DR_ALLOW_DUPLICATE', 'infiniband/mlx5dv.h',
-             'mlx5dv_dr_domain_allow_duplicate_rules' ],
+@@ -188,6 +188,8 @@ has_sym_args = [
+ 	[ 'HAVE_DEVLINK', 'linux/devlink.h', 'DEVLINK_GENL_NAME' ],
+         [ 'HAVE_MLX5_DR_CREATE_ACTION_ASO', 'infiniband/mlx5dv.h',
+         'mlx5dv_dr_action_create_aso' ],
@@ -38 +40 @@
-index 037ca961a0..bc6622053f 100644
+index 09fdce1c22..97ac5d3b5e 100644
@@ -65 +67 @@
-@@ -1412,6 +1429,7 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {
+@@ -1389,6 +1406,7 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {
@@ -74 +76 @@
-index f39ef2dac7..4e6d31f263 100644
+index f08c83768c..d48a06d443 100644
@@ -77 +79 @@
-@@ -197,6 +197,9 @@ struct mlx5_glue {
+@@ -196,6 +196,9 @@ struct mlx5_glue {


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