patch 'net/mlx5: fix MPLS tunnel outer layer overwrite' has been queued to stable release 20.11.4

Xueming Li xuemingl at nvidia.com
Sun Nov 28 15:53:59 CET 2021


Hi,

FYI, your patch has been queued to stable release 20.11.4

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/30/21. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/steevenlee/dpdk

This queued commit can be viewed at:
https://github.com/steevenlee/dpdk/commit/4a5f3c979e5964b87b1f094536e2e8e189f9f1a9

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 4a5f3c979e5964b87b1f094536e2e8e189f9f1a9 Mon Sep 17 00:00:00 2001
From: Dariusz Sosnowski <dsosnowski at nvidia.com>
Date: Wed, 17 Nov 2021 11:59:33 +0200
Subject: [PATCH] net/mlx5: fix MPLS tunnel outer layer overwrite
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 421177ccd7f59ec8d898fd6aa6bc6fb9eb298a52 ]

mlx5 PMD incorrectly overwrote outer layer fields in MPLS tunnel
rte_flow patterns using defaults for MPLS tunnels. This included
overwriting UDP destination port in MPLSoUDP and GRE protocol field in
MPLSoGRE.

This patch fixes this behavior. If application provides the values in
flow pattern items preceding the MPLS flow item the provided values will
be used, otherwise the defaults will be applied.

Fixes: d1abe664ddde ("net/mlx5: add MPLS to Direct Verbs flow engine")

Signed-off-by: Dariusz Sosnowski <dsosnowski at nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo at nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 498b2137f7..8804b9816d 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -7364,16 +7364,22 @@ flow_dv_translate_item_mpls(void *matcher, void *key,
 
 	switch (prev_layer) {
 	case MLX5_FLOW_LAYER_OUTER_L4_UDP:
-		MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
-		MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
-			 MLX5_UDP_PORT_MPLS);
+		if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
+			MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
+				 0xffff);
+			MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
+				 MLX5_UDP_PORT_MPLS);
+		}
 		break;
 	case MLX5_FLOW_LAYER_GRE:
 		/* Fall-through. */
 	case MLX5_FLOW_LAYER_GRE_KEY:
-		MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
-		MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
-			 RTE_ETHER_TYPE_MPLS);
+		if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
+			MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
+				 0xffff);
+			MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
+				 RTE_ETHER_TYPE_MPLS);
+		}
 		break;
 	default:
 		break;
-- 
2.34.0

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2021-11-28 22:41:06.125022299 +0800
+++ 0055-net-mlx5-fix-MPLS-tunnel-outer-layer-overwrite.patch	2021-11-28 22:41:03.390206379 +0800
@@ -1 +1 @@
-From 421177ccd7f59ec8d898fd6aa6bc6fb9eb298a52 Mon Sep 17 00:00:00 2001
+From 4a5f3c979e5964b87b1f094536e2e8e189f9f1a9 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 421177ccd7f59ec8d898fd6aa6bc6fb9eb298a52 ]
@@ -16 +18,0 @@
-Cc: stable at dpdk.org
@@ -25 +27 @@
-index 7b32c06fc6..d079a52d30 100644
+index 498b2137f7..8804b9816d 100644
@@ -28 +30 @@
-@@ -9328,16 +9328,22 @@ flow_dv_translate_item_mpls(void *matcher, void *key,
+@@ -7364,16 +7364,22 @@ flow_dv_translate_item_mpls(void *matcher, void *key,


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