patch 'net/txgbe: fix register polling' has been queued to stable release 20.11.6

[Xueming Li]

Hi,

FYI, your patch has been queued to stable release 20.11.6

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 07/22/22. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://github.com/steevenlee/dpdk

This queued commit can be viewed at:
https://github.com/steevenlee/dpdk/commit/9b4779bfacef303e0f417337601365b6ddb00059

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From 9b4779bfacef303e0f417337601365b6ddb00059 Mon Sep 17 00:00:00 2001
From: Jiawen Wu <jiawenwu at trustnetic.com>
Date: Wed, 22 Jun 2022 14:56:09 +0800
Subject: [PATCH] net/txgbe: fix register polling
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit aa08f3eb4ecf0997fd30ac073fcd895db71ef8e3 ]

Fix to poll some specific registers, which expect bit value 0.

'w32w' is used in registers where the write command bit is set and
waits for the bit clear to complete the write.

Fixes: 24a4c76aff4d ("net/txgbe: add error types and registers")

Signed-off-by: Jiawen Wu <jiawenwu at trustnetic.com>
---
 drivers/net/txgbe/base/txgbe_regs.h | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h
index 3314975935..2802e59e16 100644
--- a/drivers/net/txgbe/base/txgbe_regs.h
+++ b/drivers/net/txgbe/base/txgbe_regs.h
@@ -1817,8 +1817,13 @@ po32m(struct txgbe_hw *hw, u32 reg, u32 mask, u32 expect, u32 *actual,
 	}
 
 	do {
-		all |= rd32(hw, reg);
-		value |= mask & all;
+		if (expect != 0) {
+			all |= rd32(hw, reg);
+			value |= mask & all;
+		} else {
+			all = rd32(hw, reg);
+			value = mask & all;
+		}
 		if (value == expect)
 			break;
 
@@ -1846,7 +1851,7 @@ po32m(struct txgbe_hw *hw, u32 reg, u32 mask, u32 expect, u32 *actual,
 
 #define wr32w(hw, reg, val, mask, slice) do { \
 	wr32((hw), reg, val); \
-	po32m((hw), reg, mask, mask, NULL, 5, slice); \
+	po32m((hw), reg, mask, 0, NULL, 5, slice); \
 } while (0)
 
 #define TXGBE_XPCS_IDAADDR    0x13000
-- 
2.35.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2022-07-20 15:00:59.710167757 +0800
+++ 0020-net-txgbe-fix-register-polling.patch	2022-07-20 15:00:58.704333841 +0800
@@ -1 +1 @@
-From aa08f3eb4ecf0997fd30ac073fcd895db71ef8e3 Mon Sep 17 00:00:00 2001
+From 9b4779bfacef303e0f417337601365b6ddb00059 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit aa08f3eb4ecf0997fd30ac073fcd895db71ef8e3 ]
@@ -12 +14,0 @@
-Cc: stable at dpdk.org
@@ -20 +22 @@
-index 3139796911..911bb6e04e 100644
+index 3314975935..2802e59e16 100644
@@ -23 +25 @@
-@@ -1864,8 +1864,13 @@ po32m(struct txgbe_hw *hw, u32 reg, u32 mask, u32 expect, u32 *actual,
+@@ -1817,8 +1817,13 @@ po32m(struct txgbe_hw *hw, u32 reg, u32 mask, u32 expect, u32 *actual,
@@ -39 +41 @@
-@@ -1898,7 +1903,7 @@ po32m(struct txgbe_hw *hw, u32 reg, u32 mask, u32 expect, u32 *actual,
+@@ -1846,7 +1851,7 @@ po32m(struct txgbe_hw *hw, u32 reg, u32 mask, u32 expect, u32 *actual,