patch 'net/nfp: fix 48-bit DMA support for NFDk' has been queued to stable release 22.11.2
Xueming Li
xuemingl at nvidia.com
Sun Apr 9 17:23:37 CEST 2023
Hi,
FYI, your patch has been queued to stable release 22.11.2
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 04/11/23. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging
This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/log/?h=22.11-staging/commit/90f12bb74f7da67b998d9ee233ac651e1cbdd11b
Thanks.
Xueming Li <xuemingl at nvidia.com>
---
>From 90f12bb74f7da67b998d9ee233ac651e1cbdd11b Mon Sep 17 00:00:00 2001
From: Peng Zhang <peng.zhang at corigine.com>
Date: Mon, 20 Feb 2023 17:02:54 +0800
Subject: [PATCH] net/nfp: fix 48-bit DMA support for NFDk
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Cc: Xueming Li <xuemingl at nvidia.com>
[ upstream commit fd392f844abc825d0ff2e8418a2f5ba9a76e4e14 ]
Initializing of the NFP PMD fails when a NFDk device is used in a PCIe
slot that supports 48-bit DMA address. The failure is due to an
incorrect check by the PMD that limits the support to 40-bit DMA
address. While this check is correct for NFD3 devices, it is incorrect
for NFDk that can support 48-bit DMA address.
Fix this by correcting the DMA mask check at initialization to allow for
different DMA address masks for NFD3 and NFDk.
The RX free list descriptor code is also updated to allow for 48-bit DMA
address. While this code is shared by the NFD3 and NFDk code paths,
this is not an issue as for 40-bit address the top bits are always 0.
Fixes: c73dced48c8c ("net/nfp: add NFDk Tx")
Signed-off-by: Peng Zhang <peng.zhang at corigine.com>
Reviewed-by: Chaoyong He <chaoyong.he at corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund at corigine.com>
---
drivers/net/nfp/flower/nfp_flower.c | 12 ++++--------
drivers/net/nfp/flower/nfp_flower_ctrl.c | 2 +-
drivers/net/nfp/nfp_common.c | 18 ++++++++++++++++++
drivers/net/nfp/nfp_common.h | 1 +
drivers/net/nfp/nfp_ethdev.c | 11 +++--------
drivers/net/nfp/nfp_ethdev_vf.c | 11 +++--------
drivers/net/nfp/nfp_rxtx.c | 4 ++--
drivers/net/nfp/nfp_rxtx.h | 4 ++--
8 files changed, 34 insertions(+), 29 deletions(-)
diff --git a/drivers/net/nfp/flower/nfp_flower.c b/drivers/net/nfp/flower/nfp_flower.c
index e447258d97..6857732028 100644
--- a/drivers/net/nfp/flower/nfp_flower.c
+++ b/drivers/net/nfp/flower/nfp_flower.c
@@ -451,7 +451,7 @@ nfp_flower_pf_recv_pkts(void *rx_queue,
rxds->vals[1] = 0;
dma_addr = rte_cpu_to_le_64(RTE_MBUF_DMA_ADDR_DEFAULT(new_mb));
rxds->fld.dd = 0;
- rxds->fld.dma_addr_hi = (dma_addr >> 32) & 0xff;
+ rxds->fld.dma_addr_hi = (dma_addr >> 32) & 0xffff;
rxds->fld.dma_addr_lo = dma_addr & 0xffffffff;
nb_hold++;
@@ -631,13 +631,6 @@ nfp_flower_init_vnic_common(struct nfp_net_hw *hw, const char *vnic_type)
pf_dev = hw->pf_dev;
pci_dev = hw->pf_dev->pci_dev;
- /* NFP can not handle DMA addresses requiring more than 40 bits */
- if (rte_mem_check_dma_mask(40)) {
- PMD_INIT_LOG(ERR, "Device %s can not be used: restricted dma mask to 40 bits!\n",
- pci_dev->device.name);
- return -ENODEV;
- };
-
hw->device_id = pci_dev->id.device_id;
hw->vendor_id = pci_dev->id.vendor_id;
hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
@@ -666,6 +659,9 @@ nfp_flower_init_vnic_common(struct nfp_net_hw *hw, const char *vnic_type)
hw->mtu = hw->max_mtu;
hw->flbufsz = DEFAULT_FLBUF_SIZE;
+ if (nfp_net_check_dma_mask(hw, pci_dev->name) != 0)
+ return -ENODEV;
+
/* read the Rx offset configured from firmware */
if (NFD_CFG_MAJOR_VERSION_of(hw->ver) < 2)
hw->rx_offset = NFP_NET_RX_OFFSET;
diff --git a/drivers/net/nfp/flower/nfp_flower_ctrl.c b/drivers/net/nfp/flower/nfp_flower_ctrl.c
index 3631e764fe..1c6340f3d7 100644
--- a/drivers/net/nfp/flower/nfp_flower_ctrl.c
+++ b/drivers/net/nfp/flower/nfp_flower_ctrl.c
@@ -123,7 +123,7 @@ nfp_flower_ctrl_vnic_recv(void *rx_queue,
rxds->vals[1] = 0;
dma_addr = rte_cpu_to_le_64(RTE_MBUF_DMA_ADDR_DEFAULT(new_mb));
rxds->fld.dd = 0;
- rxds->fld.dma_addr_hi = (dma_addr >> 32) & 0xff;
+ rxds->fld.dma_addr_hi = (dma_addr >> 32) & 0xffff;
rxds->fld.dma_addr_lo = dma_addr & 0xffffffff;
nb_hold++;
diff --git a/drivers/net/nfp/nfp_common.c b/drivers/net/nfp/nfp_common.c
index 71711bfa22..c962ed0fc0 100644
--- a/drivers/net/nfp/nfp_common.c
+++ b/drivers/net/nfp/nfp_common.c
@@ -1413,6 +1413,24 @@ nfp_net_set_vxlan_port(struct nfp_net_hw *hw,
RTE_LOG_REGISTER_SUFFIX(nfp_logtype_init, init, NOTICE);
RTE_LOG_REGISTER_SUFFIX(nfp_logtype_driver, driver, NOTICE);
RTE_LOG_REGISTER_SUFFIX(nfp_logtype_cpp, cpp, NOTICE);
+/*
+ * The firmware with NFD3 can not handle DMA address requiring more
+ * than 40 bits
+ */
+int
+nfp_net_check_dma_mask(struct nfp_net_hw *hw, char *name)
+{
+ if (NFD_CFG_CLASS_VER_of(hw->ver) == NFP_NET_CFG_VERSION_DP_NFD3 &&
+ rte_mem_check_dma_mask(40) != 0) {
+ PMD_DRV_LOG(ERR,
+ "The device %s can't be used: restricted dma mask to 40 bits!",
+ name);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
/*
* Local variables:
* c-file-style: "Linux"
diff --git a/drivers/net/nfp/nfp_common.h b/drivers/net/nfp/nfp_common.h
index 36c19b47e4..8cf99c0eae 100644
--- a/drivers/net/nfp/nfp_common.h
+++ b/drivers/net/nfp/nfp_common.h
@@ -447,6 +447,7 @@ void nfp_net_close_rx_queue(struct rte_eth_dev *dev);
void nfp_net_stop_tx_queue(struct rte_eth_dev *dev);
void nfp_net_close_tx_queue(struct rte_eth_dev *dev);
int nfp_net_set_vxlan_port(struct nfp_net_hw *hw, size_t idx, uint16_t port);
+int nfp_net_check_dma_mask(struct nfp_net_hw *hw, char *name);
#define NFP_NET_DEV_PRIVATE_TO_HW(adapter)\
(&((struct nfp_net_adapter *)adapter)->hw)
diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c
index f22ae24b53..cf7a4389b3 100644
--- a/drivers/net/nfp/nfp_ethdev.c
+++ b/drivers/net/nfp/nfp_ethdev.c
@@ -517,14 +517,6 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
/* Use backpointer to the CoreNIC app struct */
app_fw_nic = NFP_PRIV_TO_APP_FW_NIC(pf_dev->app_fw_priv);
- /* NFP can not handle DMA addresses requiring more than 40 bits */
- if (rte_mem_check_dma_mask(40)) {
- RTE_LOG(ERR, PMD,
- "device %s can not be used: restricted dma mask to 40 bits!\n",
- pci_dev->device.name);
- return -ENODEV;
- }
-
port = ((struct nfp_net_hw *)eth_dev->data->dev_private)->idx;
if (port < 0 || port > 7) {
PMD_DRV_LOG(ERR, "Port value is wrong");
@@ -572,6 +564,9 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
hw->ver = nn_cfg_readl(hw, NFP_NET_CFG_VERSION);
+ if (nfp_net_check_dma_mask(hw, pci_dev->name) != 0)
+ return -ENODEV;
+
if (nfp_net_ethdev_ops_mount(hw, eth_dev))
return -EINVAL;
diff --git a/drivers/net/nfp/nfp_ethdev_vf.c b/drivers/net/nfp/nfp_ethdev_vf.c
index d1427b63bc..865cac7741 100644
--- a/drivers/net/nfp/nfp_ethdev_vf.c
+++ b/drivers/net/nfp/nfp_ethdev_vf.c
@@ -291,14 +291,6 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)
pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
- /* NFP can not handle DMA addresses requiring more than 40 bits */
- if (rte_mem_check_dma_mask(40)) {
- RTE_LOG(ERR, PMD,
- "device %s can not be used: restricted dma mask to 40 bits!\n",
- pci_dev->device.name);
- return -ENODEV;
- }
-
hw = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
hw->ctrl_bar = (uint8_t *)pci_dev->mem_resource[0].addr;
@@ -312,6 +304,9 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)
hw->ver = nn_cfg_readl(hw, NFP_NET_CFG_VERSION);
+ if (nfp_net_check_dma_mask(hw, pci_dev->name) != 0)
+ return -ENODEV;
+
if (nfp_netvf_ethdev_ops_mount(hw, eth_dev))
return -EINVAL;
diff --git a/drivers/net/nfp/nfp_rxtx.c b/drivers/net/nfp/nfp_rxtx.c
index 9e20917b5e..ac0fa80d4c 100644
--- a/drivers/net/nfp/nfp_rxtx.c
+++ b/drivers/net/nfp/nfp_rxtx.c
@@ -48,7 +48,7 @@ nfp_net_rx_fill_freelist(struct nfp_net_rxq *rxq)
rxd = &rxq->rxds[i];
rxd->fld.dd = 0;
- rxd->fld.dma_addr_hi = (dma_addr >> 32) & 0xff;
+ rxd->fld.dma_addr_hi = (dma_addr >> 32) & 0xffff;
rxd->fld.dma_addr_lo = dma_addr & 0xffffffff;
rxe[i].mbuf = mbuf;
PMD_RX_LOG(DEBUG, "[%d]: %" PRIx64, i, dma_addr);
@@ -361,7 +361,7 @@ nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
rxds->vals[1] = 0;
dma_addr = rte_cpu_to_le_64(RTE_MBUF_DMA_ADDR_DEFAULT(new_mb));
rxds->fld.dd = 0;
- rxds->fld.dma_addr_hi = (dma_addr >> 32) & 0xff;
+ rxds->fld.dma_addr_hi = (dma_addr >> 32) & 0xffff;
rxds->fld.dma_addr_lo = dma_addr & 0xffffffff;
nb_hold++;
diff --git a/drivers/net/nfp/nfp_rxtx.h b/drivers/net/nfp/nfp_rxtx.h
index ced05fde90..e2b48374fe 100644
--- a/drivers/net/nfp/nfp_rxtx.h
+++ b/drivers/net/nfp/nfp_rxtx.h
@@ -227,8 +227,8 @@ struct nfp_net_rx_desc {
union {
/* Freelist descriptor */
struct {
- uint8_t dma_addr_hi;
- __le16 spare;
+ __le16 dma_addr_hi;
+ uint8_t spare;
uint8_t dd;
__le32 dma_addr_lo;
--
2.25.1
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2023-04-09 21:45:39.550102500 +0800
+++ 0029-net-nfp-fix-48-bit-DMA-support-for-NFDk.patch 2023-04-09 21:45:38.609042200 +0800
@@ -1 +1 @@
-From fd392f844abc825d0ff2e8418a2f5ba9a76e4e14 Mon Sep 17 00:00:00 2001
+From 90f12bb74f7da67b998d9ee233ac651e1cbdd11b Mon Sep 17 00:00:00 2001
@@ -7,0 +8,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit fd392f844abc825d0ff2e8418a2f5ba9a76e4e14 ]
@@ -23 +25,0 @@
-Cc: stable at dpdk.org
@@ -40 +42 @@
-index 42014295ab..2c797ae751 100644
+index e447258d97..6857732028 100644
@@ -43 +45 @@
-@@ -452,7 +452,7 @@ nfp_flower_pf_recv_pkts(void *rx_queue,
+@@ -451,7 +451,7 @@ nfp_flower_pf_recv_pkts(void *rx_queue,
@@ -52 +54 @@
-@@ -629,13 +629,6 @@ nfp_flower_init_vnic_common(struct nfp_net_hw *hw, const char *vnic_type)
+@@ -631,13 +631,6 @@ nfp_flower_init_vnic_common(struct nfp_net_hw *hw, const char *vnic_type)
@@ -66 +68 @@
-@@ -664,6 +657,9 @@ nfp_flower_init_vnic_common(struct nfp_net_hw *hw, const char *vnic_type)
+@@ -666,6 +659,9 @@ nfp_flower_init_vnic_common(struct nfp_net_hw *hw, const char *vnic_type)
@@ -77 +79 @@
-index 6e7545bc39..3e083d948e 100644
+index 3631e764fe..1c6340f3d7 100644
@@ -80 +82 @@
-@@ -122,7 +122,7 @@ nfp_flower_ctrl_vnic_recv(void *rx_queue,
+@@ -123,7 +123,7 @@ nfp_flower_ctrl_vnic_recv(void *rx_queue,
@@ -90 +92 @@
-index ac05aba92d..907777a9e4 100644
+index 71711bfa22..c962ed0fc0 100644
@@ -93,4 +95,4 @@
-@@ -1566,6 +1566,24 @@ nfp_net_set_vxlan_port(struct nfp_net_hw *hw,
- return ret;
- }
-
+@@ -1413,6 +1413,24 @@ nfp_net_set_vxlan_port(struct nfp_net_hw *hw,
+ RTE_LOG_REGISTER_SUFFIX(nfp_logtype_init, init, NOTICE);
+ RTE_LOG_REGISTER_SUFFIX(nfp_logtype_driver, driver, NOTICE);
+ RTE_LOG_REGISTER_SUFFIX(nfp_logtype_cpp, cpp, NOTICE);
@@ -119 +121 @@
-index 56b7edc951..980f3cad89 100644
+index 36c19b47e4..8cf99c0eae 100644
@@ -122,4 +124,4 @@
-@@ -454,6 +454,7 @@ int nfp_net_rx_desc_limits(struct nfp_net_hw *hw,
- int nfp_net_tx_desc_limits(struct nfp_net_hw *hw,
- uint16_t *min_tx_desc,
- uint16_t *max_tx_desc);
+@@ -447,6 +447,7 @@ void nfp_net_close_rx_queue(struct rte_eth_dev *dev);
+ void nfp_net_stop_tx_queue(struct rte_eth_dev *dev);
+ void nfp_net_close_tx_queue(struct rte_eth_dev *dev);
+ int nfp_net_set_vxlan_port(struct nfp_net_hw *hw, size_t idx, uint16_t port);
@@ -131 +133 @@
-index 3527804785..fed7b1ab13 100644
+index f22ae24b53..cf7a4389b3 100644
@@ -134 +136 @@
-@@ -519,14 +519,6 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
+@@ -517,14 +517,6 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
@@ -140,2 +142,2 @@
-- PMD_INIT_LOG(ERR,
-- "device %s can not be used: restricted dma mask to 40 bits!",
+- RTE_LOG(ERR, PMD,
+- "device %s can not be used: restricted dma mask to 40 bits!\n",
@@ -149 +151 @@
-@@ -574,6 +566,9 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
+@@ -572,6 +564,9 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
@@ -160 +162 @@
-index cbe5c5c5c8..c1f8a0fa0f 100644
+index d1427b63bc..865cac7741 100644
@@ -169,2 +171,2 @@
-- PMD_INIT_LOG(ERR,
-- "device %s can not be used: restricted dma mask to 40 bits!",
+- RTE_LOG(ERR, PMD,
+- "device %s can not be used: restricted dma mask to 40 bits!\n",
@@ -189 +191 @@
-index abecff3a87..17a04cec5e 100644
+index 9e20917b5e..ac0fa80d4c 100644
@@ -201 +203 @@
-@@ -454,7 +454,7 @@ nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
+@@ -361,7 +361,7 @@ nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
@@ -211 +213 @@
-index cb67657014..5e651518ed 100644
+index ced05fde90..e2b48374fe 100644
@@ -214 +216 @@
-@@ -288,8 +288,8 @@ struct nfp_net_rx_desc {
+@@ -227,8 +227,8 @@ struct nfp_net_rx_desc {
More information about the stable
mailing list