[PATCH 22.11] net/gve: fix RX buffer size alignment
Guo, Junfeng
junfeng.guo at intel.com
Wed Dec 13 03:07:25 CET 2023
> -----Original Message-----
> From: Joshua Washington <joshwash at google.com>
> Sent: Wednesday, December 13, 2023 04:07
> To: Guo, Junfeng <junfeng.guo at intel.com>; Li, Xiaoyun
> <xiaoyun.li at intel.com>; Rushil Gupta <rushilg at google.com>; Joshua
> Washington <joshwash at google.com>; Jeroen de Borst
> <jeroendb at google.com>
> Cc: stable at dpdk.org; Xueming Li <xuemingl at nvidia.com>
> Subject: [PATCH 22.11] net/gve: fix RX buffer size alignment
>
> The GVE driver has RX buffer size alignment requirements which will
> not always be respected when a user specifies an mbuf size. Assuming
> that an mbuf size is greater than the DPDK recommended default
> (2048 + 128), if the buffer size is not properly aligned with what the
> device expects, the device will silently fail to create any transmit or
> receive queues.
>
> Because no queues are created, there is no network traffic for the DPDK
> program, and errors like the following are returned when attempting to
> destroy queues:
>
> gve_adminq_parse_err(): AQ command failed with status -11
> gve_stop_tx_queues(): failed to destroy txqs
> gve_adminq_parse_err(): AQ command failed with status -11
> gve_stop_rx_queues(): failed to destroy rxqs
>
> This change aims to remedy this by restricting the RX receive buffer
> sizes to valid sizes for the GQ queue format, including both alignment
> and minimum and maximum supported buffer sizes.
>
> Fixes: 4bec2d0b5572 ("net/gve: support queue operations")
> Fixes: 1dc00f4fc74b ("net/gve: add Rx queue setup for DQO")
> Cc: junfeng.guo at intel.com
> Cc: stable at dpdk.org
>
> Signed-off-by: Joshua Washington <joshwash at google.com>
> Reviewed-by: Rushil Gupta <rushilg at google.com>
> ---
> drivers/net/gve/gve_ethdev.c | 2 +-
> drivers/net/gve/gve_ethdev.h | 4 +++-
> drivers/net/gve/gve_rx.c | 7 ++++++-
> 3 files changed, 10 insertions(+), 3 deletions(-)
>
> --
> 2.43.0.472.g3155946c3a-goog
Acked-by: Junfeng Guo <junfeng.guo at intel.com>
Regards,
Junfeng Guo
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