patch 'net/mlx5: fix parameters verification in HWS table create' has been queued to stable release 23.11.1

[Xueming Li]

Hi,

FYI, your patch has been queued to stable release 23.11.1

Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 04/15/24. So please
shout if anyone has objections.

Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.

Queued patches are on a temporary branch at:
https://git.dpdk.org/dpdk-stable/log/?h=23.11-staging

This queued commit can be viewed at:
https://git.dpdk.org/dpdk-stable/commit/?h=23.11-staging&id=b90c42e4ff19cd494711152d52dabd0abdce4692

Thanks.

Xueming Li <xuemingl at nvidia.com>

---
>From b90c42e4ff19cd494711152d52dabd0abdce4692 Mon Sep 17 00:00:00 2001
From: Gregory Etelson <getelson at nvidia.com>
Date: Wed, 28 Feb 2024 15:33:10 +0200
Subject: [PATCH] net/mlx5: fix parameters verification in HWS table create
Cc: Xueming Li <xuemingl at nvidia.com>

[ upstream commit 075796dcc692b50a7b3e89cf969210171d09a06c ]

Modified the conditionals in `flow_hw_table_create()` to use bitwise
AND instead of equality checks when assessing
`table_cfg->attr->specialize` bitmask.
This will allow for greater flexibility as the bitmask may encapsulate
multiple flags.
The patch maintains the previous behavior with single flag values,
while providing support for multiple flags.

Fixes: 240b77cfcba5 ("net/mlx5: enable hint in async flow table")

Signed-off-by: Gregory Etelson <getelson at nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski at nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 4927975461..93035c8548 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -4368,12 +4368,23 @@ flow_hw_table_create(struct rte_eth_dev *dev,
 	matcher_attr.rule.num_log = rte_log2_u32(nb_flows);
 	/* Parse hints information. */
 	if (attr->specialize) {
-		if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG)
-			matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_WIRE;
-		else if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG)
-			matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_VPORT;
-		else
-			DRV_LOG(INFO, "Unsupported hint value %x", attr->specialize);
+		uint32_t val = RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG |
+			       RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG;
+
+		if ((attr->specialize & val) == val) {
+			DRV_LOG(INFO, "Invalid hint value %x",
+				attr->specialize);
+			rte_errno = EINVAL;
+			goto it_error;
+		}
+		if (attr->specialize &
+		    RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG)
+			matcher_attr.optimize_flow_src =
+				MLX5DR_MATCHER_FLOW_SRC_WIRE;
+		else if (attr->specialize &
+			 RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG)
+			matcher_attr.optimize_flow_src =
+				MLX5DR_MATCHER_FLOW_SRC_VPORT;
 	}
 	/* Build the item template. */
 	for (i = 0; i < nb_item_templates; i++) {
-- 
2.34.1

---
  Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- -	2024-04-13 20:43:06.830815337 +0800
+++ 0058-net-mlx5-fix-parameters-verification-in-HWS-table-cr.patch	2024-04-13 20:43:04.997753931 +0800
@@ -1 +1 @@
-From 075796dcc692b50a7b3e89cf969210171d09a06c Mon Sep 17 00:00:00 2001
+From b90c42e4ff19cd494711152d52dabd0abdce4692 Mon Sep 17 00:00:00 2001
@@ -4,0 +5,3 @@
+Cc: Xueming Li <xuemingl at nvidia.com>
+
+[ upstream commit 075796dcc692b50a7b3e89cf969210171d09a06c ]
@@ -15 +17,0 @@
-Cc: stable at dpdk.org
@@ -24 +26 @@
-index 74a3133c13..76783145cf 100644
+index 4927975461..93035c8548 100644
@@ -27 +29 @@
-@@ -4397,12 +4397,23 @@ flow_hw_table_create(struct rte_eth_dev *dev,
+@@ -4368,12 +4368,23 @@ flow_hw_table_create(struct rte_eth_dev *dev,